omap3_dss: add optional framebuffer
The beagle board uses the background color to show an orange screen during startup. This patch adds the ability to add a frame buffer, with the intention not to break the beagle board use case (I don't have one). videomodes.c is not used. Scrolling depends on this patch: http://patchwork.ozlabs.org/patch/155662/ cc: trini@ti.com cc: s-paulraj@ti.com cc: khasim@ti.com Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
This commit is contained in:
Jeroen Hofstee
Anatolij Gustschin
parent
f714b0a911
commit
d9c13aac14
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@ -31,12 +31,18 @@
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/*
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* DSS Base Registers
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*/
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#define OMAP3_DSS_BASE 0x48050040
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#define OMAP3_DISPC_BASE 0x48050440
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#define OMAP3_DSS_BASE 0x48050000
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#define OMAP3_DISPC_BASE 0x48050400
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#define OMAP3_VENC_BASE 0x48050C00
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/* DSS Registers */
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struct dss_regs {
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u32 revision; /* 0x00 */
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u8 res1[12]; /* 0x04 */
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u32 sysconfig; /* 0x10 */
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u32 sysstatus; /* 0x14 */
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u32 irqstatus; /* 0x18 */
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u8 res2[36]; /* 0x1C */
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u32 control; /* 0x40 */
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u32 sdi_control; /* 0x44 */
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u32 pll_control; /* 0x48 */
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@ -44,6 +50,13 @@ struct dss_regs {
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/* DISPC Registers */
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struct dispc_regs {
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u32 revision; /* 0x00 */
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u8 res1[12]; /* 0x04 */
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u32 sysconfig; /* 0x10 */
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u32 sysstatus; /* 0x14 */
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u32 irqstatus; /* 0x18 */
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u32 irqenable; /* 0x1C */
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u8 res2[32]; /* 0x20 */
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u32 control; /* 0x40 */
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u32 config; /* 0x44 */
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u32 reserve_2; /* 0x48 */
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@ -60,6 +73,18 @@ struct dispc_regs {
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u32 global_alpha; /* 0x74 */
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u32 size_dig; /* 0x78 */
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u32 size_lcd; /* 0x7C */
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u32 gfx_ba0; /* 0x80 */
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u32 gfx_ba1; /* 0x84 */
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u32 gfx_position; /* 0x88 */
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u32 gfx_size; /* 0x8C */
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u8 unused[16]; /* 0x90 */
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u32 gfx_attributes; /* 0xA0 */
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u32 gfx_fifo_threshold; /* 0xA4 */
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u32 gfx_fifo_size_status; /* 0xA8 */
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u32 gfx_row_inc; /* 0xAC */
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u32 gfx_pixel_inc; /* 0xB0 */
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u32 gfx_window_skip; /* 0xB4 */
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u32 gfx_table_ba; /* 0xB8 */
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};
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/* VENC Registers */
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@ -123,6 +148,13 @@ struct venc_regs {
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#define TFTSTN_SHIFT 3
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#define DATALINES_SHIFT 8
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#define GFX_ENABLE 1
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#define GFX_FORMAT_SHIFT 1
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#define LOADMODE_SHIFT 1
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#define DSS_SOFTRESET (1 << 1)
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#define DSS_RESETDONE 1
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/* Enabling Display controller */
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#define LCD_ENABLE 1
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#define DIG_ENABLE (1 << 1)
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@ -161,6 +193,7 @@ struct panel_config {
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u32 data_lines;
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u32 load_mode;
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u32 panel_color;
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void *frame_buffer;
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};
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/*
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@ -42,7 +42,7 @@ COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
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COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o
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COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
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COBJS-$(CONFIG_VIDEO_MX5) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
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COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o videomodes.o
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COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
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COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
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COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
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COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
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@ -28,6 +28,7 @@
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/dss.h>
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#include <video_fb.h>
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/*
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* Configure VENC for a given Mode (NTSC / PAL)
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@ -105,6 +106,11 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
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void omap3_dss_panel_config(const struct panel_config *panel_cfg)
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{
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struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
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struct dss_regs *dss = (struct dss_regs *) OMAP3_DSS_BASE;
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writel(DSS_SOFTRESET, &dss->sysconfig);
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while (!(readl(&dss->sysstatus) & DSS_RESETDONE))
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;
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writel(panel_cfg->timing_h, &dispc->timing_h);
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writel(panel_cfg->timing_v, &dispc->timing_v);
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@ -115,6 +121,16 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
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writel(((panel_cfg->panel_type << TFTSTN_SHIFT) |
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(panel_cfg->data_lines << DATALINES_SHIFT)), &dispc->control);
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writel(panel_cfg->panel_color, &dispc->default_color0);
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writel((u32) panel_cfg->frame_buffer, &dispc->gfx_ba0);
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if (!panel_cfg->frame_buffer)
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return;
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writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);
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writel(8 << GFX_FORMAT_SHIFT | GFX_ENABLE, &dispc->gfx_attributes);
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writel(1, &dispc->gfx_row_inc);
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writel(1, &dispc->gfx_pixel_inc);
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writel(panel_cfg->lcd_size, &dispc->gfx_size);
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}
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/*
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@ -129,3 +145,31 @@ void omap3_dss_enable(void)
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l |= DISPC_ENABLE;
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writel(l, &dispc->control);
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}
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#ifdef CONFIG_CFB_CONSOLE
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int __board_video_init(void)
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{
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return -1;
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}
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int board_video_init(void)
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__attribute__((weak, alias("__board_video_init")));
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void *video_hw_init(void)
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{
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static GraphicDevice dssfb;
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GraphicDevice *pGD = &dssfb;
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struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
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if (board_video_init() || !readl(&dispc->gfx_ba0))
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return NULL;
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pGD->winSizeX = (readl(&dispc->size_lcd) & 0x7FF) + 1;
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pGD->winSizeY = ((readl(&dispc->size_lcd) >> 16) & 0x7FF) + 1;
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pGD->gdfBytesPP = 4;
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pGD->gdfIndex = GDF_32BIT_X888RGB;
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pGD->frameAdrs = readl(&dispc->gfx_ba0);
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return pGD;
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}
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#endif
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