nios2: convert altera_uart to driver model
Convert altera_uart to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>utp
Thomas Chou
parent
220e8021af
commit
da2f838d8a
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@ -0,0 +1,7 @@
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Altera UART
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Required properties:
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- compatible : should be "altr,uart-1.0"
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Optional properties:
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- clock-frequency : frequency of the clock input to the UART
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@ -61,6 +61,13 @@ config DEBUG_UART_ALTERA_JTAGUART
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You will need to provide parameters to make this work. The driver will
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be available until the real driver model serial is running.
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config DEBUG_UART_ALTERA_UART
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bool "Altera UART"
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help
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Select this to enable a debug UART using the altera_uart driver.
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You will need to provide parameters to make this work. The driver will
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be available until the real driver model serial is running.
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config DEBUG_UART_NS16550
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bool "ns16550"
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help
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@ -156,6 +163,13 @@ config ALTERA_JTAG_UART_BYPASS
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output will wait forever until a JTAG terminal is connected. If you
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not are sure, say Y.
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config ALTERA_UART
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bool "Altera UART support"
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depends on DM_SERIAL
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help
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Select this to enable an UART for Altera devices. Please find
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details on the "Embedded Peripherals IP User Guide" of Altera.
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config ROCKCHIP_SERIAL
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bool "Rockchip on-chip UART support"
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depends on ARCH_ROCKCHIP && DM_SERIAL
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@ -5,133 +5,149 @@
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <linux/compiler.h>
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#include <serial.h>
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typedef volatile struct {
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unsigned rxdata; /* Rx data reg */
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unsigned txdata; /* Tx data reg */
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unsigned status; /* Status reg */
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unsigned control; /* Control reg */
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unsigned divisor; /* Baud rate divisor reg */
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unsigned endofpacket; /* End-of-packet reg */
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} nios_uart_t;
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struct altera_uart_regs {
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u32 rxdata; /* Rx data reg */
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u32 txdata; /* Tx data reg */
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u32 status; /* Status reg */
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u32 control; /* Control reg */
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u32 divisor; /* Baud rate divisor reg */
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u32 endofpacket; /* End-of-packet reg */
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};
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struct altera_uart_platdata {
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struct altera_uart_regs *regs;
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unsigned int uartclk;
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};
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/* status register */
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#define NIOS_UART_PE (1 << 0) /* parity error */
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#define NIOS_UART_FE (1 << 1) /* frame error */
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#define NIOS_UART_BRK (1 << 2) /* break detect */
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#define NIOS_UART_ROE (1 << 3) /* rx overrun */
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#define NIOS_UART_TOE (1 << 4) /* tx overrun */
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#define NIOS_UART_TMT (1 << 5) /* tx empty */
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#define NIOS_UART_TRDY (1 << 6) /* tx ready */
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#define NIOS_UART_RRDY (1 << 7) /* rx ready */
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#define NIOS_UART_E (1 << 8) /* exception */
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#define NIOS_UART_DCTS (1 << 10) /* cts change */
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#define NIOS_UART_CTS (1 << 11) /* cts */
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#define NIOS_UART_EOP (1 << 12) /* eop detected */
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/* control register */
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#define NIOS_UART_IPE (1 << 0) /* parity error int ena*/
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#define NIOS_UART_IFE (1 << 1) /* frame error int ena */
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#define NIOS_UART_IBRK (1 << 2) /* break detect int ena */
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#define NIOS_UART_IROE (1 << 3) /* rx overrun int ena */
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#define NIOS_UART_ITOE (1 << 4) /* tx overrun int ena */
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#define NIOS_UART_ITMT (1 << 5) /* tx empty int ena */
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#define NIOS_UART_ITRDY (1 << 6) /* tx ready int ena */
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#define NIOS_UART_IRRDY (1 << 7) /* rx ready int ena */
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#define NIOS_UART_IE (1 << 8) /* exception int ena */
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#define NIOS_UART_TBRK (1 << 9) /* transmit break */
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#define NIOS_UART_IDCTS (1 << 10) /* cts change int ena */
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#define NIOS_UART_RTS (1 << 11) /* rts */
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#define NIOS_UART_IEOP (1 << 12) /* eop detected int ena */
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#define ALTERA_UART_TMT (1 << 5) /* tx empty */
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#define ALTERA_UART_TRDY (1 << 6) /* tx ready */
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#define ALTERA_UART_RRDY (1 << 7) /* rx ready */
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DECLARE_GLOBAL_DATA_PTR;
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/*------------------------------------------------------------------
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* UART the serial port
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*-----------------------------------------------------------------*/
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static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
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#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
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/*
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* Everything's already setup for fixed-baud PTF
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* assignment
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*/
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static void altera_serial_setbrg(void)
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static int altera_uart_setbrg(struct udevice *dev, int baudrate)
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{
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struct altera_uart_platdata *plat = dev->platdata;
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struct altera_uart_regs *const regs = plat->regs;
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u32 div;
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div = (plat->uartclk / baudrate) - 1;
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writel(div, ®s->divisor);
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return 0;
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}
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static int altera_serial_init(void)
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static int altera_uart_putc(struct udevice *dev, const char ch)
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{
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struct altera_uart_platdata *plat = dev->platdata;
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struct altera_uart_regs *const regs = plat->regs;
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if (!(readl(®s->status) & ALTERA_UART_TRDY))
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return -EAGAIN;
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writel(ch, ®s->txdata);
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return 0;
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}
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static int altera_uart_pending(struct udevice *dev, bool input)
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{
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struct altera_uart_platdata *plat = dev->platdata;
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struct altera_uart_regs *const regs = plat->regs;
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u32 st = readl(®s->status);
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if (input)
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return st & ALTERA_UART_RRDY ? 1 : 0;
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else
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return !(st & ALTERA_UART_TMT);
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}
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static int altera_uart_getc(struct udevice *dev)
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{
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struct altera_uart_platdata *plat = dev->platdata;
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struct altera_uart_regs *const regs = plat->regs;
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if (!(readl(®s->status) & ALTERA_UART_RRDY))
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return -EAGAIN;
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return readl(®s->rxdata) & 0xff;
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}
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static int altera_uart_probe(struct udevice *dev)
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{
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return 0;
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}
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#else
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static void altera_serial_setbrg(void)
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static int altera_uart_ofdata_to_platdata(struct udevice *dev)
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{
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unsigned div;
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struct altera_uart_platdata *plat = dev_get_platdata(dev);
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div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
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writel (div, &uart->divisor);
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}
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plat->regs = ioremap(dev_get_addr(dev),
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sizeof(struct altera_uart_regs));
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plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"clock-frequency", 0);
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static int altera_serial_init(void)
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{
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serial_setbrg();
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return 0;
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}
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#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
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/*-----------------------------------------------------------------------
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* UART CONSOLE
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*---------------------------------------------------------------------*/
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static void altera_serial_putc(char c)
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{
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if (c == '\n')
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serial_putc ('\r');
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while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
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WATCHDOG_RESET ();
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writel ((unsigned char)c, &uart->txdata);
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}
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static int altera_serial_tstc(void)
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{
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return (readl (&uart->status) & NIOS_UART_RRDY);
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}
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static int altera_serial_getc(void)
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{
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while (serial_tstc () == 0)
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WATCHDOG_RESET ();
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return (readl (&uart->rxdata) & 0x00ff );
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}
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static struct serial_device altera_serial_drv = {
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.name = "altera_serial",
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.start = altera_serial_init,
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.stop = NULL,
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.setbrg = altera_serial_setbrg,
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.putc = altera_serial_putc,
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.puts = default_serial_puts,
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.getc = altera_serial_getc,
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.tstc = altera_serial_tstc,
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static const struct dm_serial_ops altera_uart_ops = {
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.putc = altera_uart_putc,
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.pending = altera_uart_pending,
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.getc = altera_uart_getc,
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.setbrg = altera_uart_setbrg,
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};
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void altera_serial_initialize(void)
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static const struct udevice_id altera_uart_ids[] = {
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{ .compatible = "altr,uart-1.0", },
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{ }
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};
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U_BOOT_DRIVER(altera_uart) = {
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.name = "altera_uart",
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.id = UCLASS_SERIAL,
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.of_match = altera_uart_ids,
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.ofdata_to_platdata = altera_uart_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct altera_uart_platdata),
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.probe = altera_uart_probe,
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.ops = &altera_uart_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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#ifdef CONFIG_DEBUG_UART_ALTERA_UART
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#include <debug_uart.h>
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void debug_uart_init(void)
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{
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serial_register(&altera_serial_drv);
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struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
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u32 div;
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div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
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writel(div, ®s->divisor);
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}
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__weak struct serial_device *default_serial_console(void)
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static inline void _debug_uart_putc(int ch)
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{
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return &altera_serial_drv;
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struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
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while (1) {
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u32 st = readl(®s->status);
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if (st & ALTERA_UART_TRDY)
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break;
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}
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writel(ch, ®s->txdata);
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}
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DEBUG_UART_FUNCS
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#endif
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@ -23,14 +23,7 @@
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/*
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* SERIAL
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*/
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#if defined(CONFIG_ALTERA_JTAG_UART)
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#else
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# define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_UART_BASE
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#endif
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#define CONFIG_SYS_NIOS_FIXEDBAUD
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#define CONFIG_BAUDRATE CONFIG_SYS_UART_BAUD
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#define CONFIG_SYS_BAUDRATE_TABLE {CONFIG_BAUDRATE}
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress console info */
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/*
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