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Merge branch 'sf' of git://git.denx.de/u-boot-blackfin 

* 'sf' of git://git.denx.de/u-boot-blackfin:
  README: Add description of SPI Flash (SF) command configuration
  sf command: allow default bus and chip selects
  sf: eeprom_m95xxx: set a sane default timeout
  sf: eeprom_m95xxx: fix up style
utp
Wolfgang Denk 2012-02-13 23:15:25 +01:00
parent 06576b2efc f61ec45eb5
commit e9d44b35be
3 changed files with 56 additions and 27 deletions
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20
README
View File

@ -815,6 +815,7 @@ The following options need to be configured:
(requires CONFIG_CMD_I2C)
CONFIG_CMD_SETGETDCR Support for DCR Register access
(4xx only)
CONFIG_CMD_SF * Read/write/erase SPI NOR flash
CONFIG_CMD_SHA1SUM print sha1 memory digest
(requires CONFIG_CMD_MEMORY)
CONFIG_CMD_SOURCE "source" command Support
@ -2197,6 +2198,25 @@ The following options need to be configured:
allows to read/write in Dataflash via the standard
commands cp, md...
- Serial Flash support
CONFIG_CMD_SF
Defining this option enables SPI flash commands
'sf probe/read/write/erase/update'.
Usage requires an initial 'probe' to define the serial
flash parameters, followed by read/write/erase/update
commands.
The following defaults may be provided by the platform
to handle the common case when only a single serial
flash is present on the system.
CONFIG_SF_DEFAULT_BUS Bus identifier
CONFIG_SF_DEFAULT_CS Chip-select
CONFIG_SF_DEFAULT_MODE (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED in Hz
- SystemACE Support:
CONFIG_SYSTEMACE

35
common/cmd_sf.c
View File

@ -17,6 +17,12 @@
#ifndef CONFIG_SF_DEFAULT_MODE
# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
#endif
#ifndef CONFIG_SF_DEFAULT_CS
# define CONFIG_SF_DEFAULT_CS 0
#endif
#ifndef CONFIG_SF_DEFAULT_BUS
# define CONFIG_SF_DEFAULT_BUS 0
#endif
static struct spi_flash *flash;
@ -63,27 +69,26 @@ static int sf_parse_len_arg(char *arg, ulong *len)
static int do_spi_flash_probe(int argc, char * const argv[])
{
unsigned int bus = 0;
unsigned int cs;
unsigned int bus = CONFIG_SF_DEFAULT_BUS;
unsigned int cs = CONFIG_SF_DEFAULT_CS;
unsigned int speed = CONFIG_SF_DEFAULT_SPEED;
unsigned int mode = CONFIG_SF_DEFAULT_MODE;
char *endp;
struct spi_flash *new;
if (argc < 2)
return -1;
cs = simple_strtoul(argv[1], &endp, 0);
if (*argv[1] == 0 || (*endp != 0 && *endp != ':'))
return -1;
if (*endp == ':') {
if (endp[1] == 0)
if (argc >= 2) {
cs = simple_strtoul(argv[1], &endp, 0);
if (*argv[1] == 0 || (*endp != 0 && *endp != ':'))
return -1;
if (*endp == ':') {
if (endp[1] == 0)
return -1;
bus = cs;
cs = simple_strtoul(endp + 1, &endp, 0);
if (*endp != 0)
return -1;
bus = cs;
cs = simple_strtoul(endp + 1, &endp, 0);
if (*endp != 0)
return -1;
}
}
if (argc >= 3) {
@ -299,7 +304,7 @@ usage:
U_BOOT_CMD(
sf, 5, 1, do_spi_flash,
"SPI flash sub-system",
"probe [bus:]cs [hz] [mode] - init flash device on given SPI bus\n"
"probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus\n"
" and chip select\n"
"sf read addr offset len - read `len' bytes starting at\n"
" `offset' to memory at `addr'\n"

28
drivers/mtd/spi/eeprom_m95xxx.c
View File

@ -37,33 +37,37 @@
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
#endif
ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)
#ifndef CONFIG_SYS_SPI_WRITE_TOUT
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#endif
ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
{
struct spi_slave *slave;
u8 cmd = SPI_EEPROM_READ;
slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, 1, 1000000,
CONFIG_DEFAULT_SPI_MODE);
if(!slave)
if (!slave)
return 0;
spi_claim_bus(slave);
/* command */
if(spi_xfer(slave, 8, &cmd, NULL, SPI_XFER_BEGIN))
if (spi_xfer(slave, 8, &cmd, NULL, SPI_XFER_BEGIN))
return -1;
/*
* if alen == 3, addr[0] is the block number, we never use it here. All we
* need are the lower 16 bits
* if alen == 3, addr[0] is the block number, we never use it here.
* All we need are the lower 16 bits.
*/
if (alen == 3)
addr++;
/* address, and data */
if(spi_xfer(slave, 16, addr, NULL, 0))
if (spi_xfer(slave, 16, addr, NULL, 0))
return -1;
if(spi_xfer(slave, 8 * len, NULL, buffer, SPI_XFER_END))
if (spi_xfer(slave, 8 * len, NULL, buffer, SPI_XFER_END))
return -1;
spi_release_bus(slave);
@ -71,7 +75,7 @@ ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)
return len;
}
ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
{
struct spi_slave *slave;
char buf[3];
@ -85,7 +89,7 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
spi_claim_bus(slave);
buf[0] = SPI_EEPROM_WREN;
if(spi_xfer(slave, 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END))
if (spi_xfer(slave, 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END))
return -1;
buf[0] = SPI_EEPROM_WRITE;
@ -98,9 +102,9 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
memcpy(buf + 1, addr, alen);
/* command + addr, then data */
if(spi_xfer(slave, 24, buf, NULL, SPI_XFER_BEGIN))
if (spi_xfer(slave, 24, buf, NULL, SPI_XFER_BEGIN))
return -1;
if(spi_xfer(slave, len * 8, buffer, NULL, SPI_XFER_END))
if (spi_xfer(slave, len * 8, buffer, NULL, SPI_XFER_END))
return -1;
start = get_timer(0);
@ -115,7 +119,7 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
} while (get_timer(start) < CONFIG_SYS_SPI_WRITE_TOUT);
if (buf[1] & 1)
printf ("*** spi_write: Time out while writing!\n");
printf("*** spi_write: Timeout while writing!\n");
spi_release_bus(slave);
spi_free_slave(slave);