Code cleanup, especially MIPS for GCC 4.x

board/esd/cpci2dp/cpci2dp.c

@@ -152,8 +152,7 @@ int testdram (void)
 int eeprom_write_enable (unsigned dev_addr, int state) {
 	if (CFG_I2C_EEPROM_ADDR != dev_addr) {
 		return -1;
-	}
+	} else {
-	else {
 		switch (state) {
 		case 1:
 			/* Enable write access, clear bit GPIO_SINT2. */
@@ -186,19 +185,16 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, -1);
 		if (state < 0) {
 			puts ("Query of write access state failed.\n");
-		}
+		} else {
-		else {
 			printf ("Write access for device 0x%0x is %sabled.\n",
 				CFG_I2C_EEPROM_ADDR, state ? "en" : "dis");
 			state = 0;
 		}
-	}
+	} else {
-	else {
 		if ('0' == argv[1][0]) {
 			/* Disable write access. */
 			state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 0);
-		}
+		} else {
-		else {
 			/* Enable write access. */
 			state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 1);
 		}

board/incaip/flash.c

@@ -190,7 +190,7 @@ void flash_print_info (flash_info_t *info)
 	int i;
 	uchar *boottype;
 	uchar *bootletter;
-	uchar *fmt;
+	char *fmt;
 	uchar botbootletter[] = "B";
 	uchar topbootletter[] = "T";
 	uchar botboottype[] = "bottom boot sector";

board/incaip/incaip.c

@@ -68,7 +68,7 @@ long int initdram(int board_type)
 		{
 			*INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
 			                           (rows << 4) | cols;
-			size = get_ram_size((ulong *)CFG_SDRAM_BASE,
+			size = get_ram_size((long *)CFG_SDRAM_BASE,
 			                                     max_sdram_size());
 
 			if (size > max_size)

board/incaip/lowlevel_init.S

@@ -66,6 +66,7 @@
 	.globl	ebu_init
 	.ent	ebu_init
 ebu_init:
+__ebu_init:
 
 	li	t1, EBU_MODUL_BASE
 	li	t2, 0xA0000041
@@ -118,6 +119,7 @@ ebu_init:
 	.globl	cgu_init
 	.ent	cgu_init
 cgu_init:
+__cgu_init:
 
 	li	t1, CGU_MODUL_BASE
 
@@ -182,6 +184,7 @@ cgu_init:
 	.globl	sdram_init
 	.ent	sdram_init
 sdram_init:
+__sdram_init:
 
 	li	t1, MC_MODUL_BASE
 
@@ -281,11 +284,11 @@ lowlevel_init:
 	/* We rely on the fact that neither ebu_init() nor cgu_init() nor sdram_init()
 	 * modify t0 and a0.
 	 */
-	bal	cgu_init
+	bal	__cgu_init
 	nop
-	bal	ebu_init
+	bal	__ebu_init
 	nop
-	bal	sdram_init
+	bal	__sdram_init
 	nop
 	move	ra, t0
 

board/tqm834x/config.mk

@@ -21,4 +21,3 @@
 #
 
 TEXT_BASE   =   0x80000000
-

cpu/mcf52x2/fec.c

@@ -567,4 +567,3 @@ int mcf52x2_miiphy_initialize(bd_t *bis)
 #endif
 	return 0;
 }
-

cpu/mips/incaip_clock.c

@@ -102,7 +102,7 @@ int incaip_set_cpuclk (void)
 	extern void ebu_init(long);
 	extern void cgu_init(long);
 	extern void sdram_init(long);
-	uchar tmp[64];
+	char tmp[64];
 	ulong cpuclk;
 
 	if (getenv_r ("cpuclk", tmp, sizeof (tmp)) > 0) {

cpu/ppc4xx/spd_sdram.c

@@ -184,7 +184,7 @@ long int spd_sdram(int(read_spd)(uint addr))
 	 */
 
 	tmp = read_spd(127) & 0x6;
-	if (tmp == 0x02){      	   /* only cas = 2 supported */
+	if (tmp == 0x02) {		/* only cas = 2 supported */
 		min_cas = 2;
 /*		t_ck = read_spd(9); */
 /*		t_ac = read_spd(10); */

include/configs/TQM834x.h

@@ -95,9 +95,9 @@
  * When CFG_MAX_FLASH_BANKS_DETECT is defined, the actual number of Flash
  * banks has to be determined at runtime and stored in a gloabl variable
  * tqm834x_num_flash_banks. The value of CFG_MAX_FLASH_BANKS_DETECT is only
- * used insted of CFG_MAX_FLASH_BANKS to allocate the array flash_info, and
+ * used instead of CFG_MAX_FLASH_BANKS to allocate the array flash_info, and
  * should be made sufficiently large to accomodate the number of banks that
- * might acutally be detected.  Since most (all?) Flash related functions use
+ * might actually be detected.  Since most (all?) Flash related functions use
  * CFG_MAX_FLASH_BANKS as the number of actual banks on the board, it is
  * defined as tqm834x_num_flash_banks.
  */

lib_mips/board.c

@@ -125,7 +125,7 @@ static void display_flash_config(ulong size)
 
 static int init_baudrate (void)
 {
-	uchar tmp[64];	/* long enough for environment variables */
+	char tmp[64];	/* long enough for environment variables */
 	int i = getenv_r ("baudrate", tmp, sizeof (tmp));
 
 	gd->baudrate = (i > 0)

lib_mips/mips_linux.c

@@ -94,7 +94,7 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
 		checksum = ntohl (hdr->ih_hcrc);
 		hdr->ih_hcrc = 0;
 
-		if (crc32 (0, (char *) data, len) != checksum) {
+		if (crc32 (0, (uchar *) data, len) != checksum) {
 			printf ("Bad Header Checksum\n");
 			SHOW_BOOT_PROGRESS (-11);
 			do_reset (cmdtp, flag, argc, argv);
@@ -111,7 +111,7 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
 			ulong csum = 0;
 
 			printf ("   Verifying Checksum ... ");
-			csum = crc32 (0, (char *) data, len);
+			csum = crc32 (0, (uchar *) data, len);
 			if (csum != ntohl (hdr->ih_dcrc)) {
 				printf ("Bad Data CRC\n");
 				SHOW_BOOT_PROGRESS (-12);

lib_ppc/board.c

@@ -581,7 +581,6 @@ void board_init_f (ulong bootflag)
 	/* NOTREACHED - relocate_code() does not return */
 }
 
-
 /************************************************************************
  *
  * This is the next part if the initialization sequence: we are now
@@ -591,7 +590,6 @@ void board_init_f (ulong bootflag)
  *
  ************************************************************************
  */
-
 void board_init_r (gd_t *id, ulong dest_addr)
 {
 	cmd_tbl_t *cmdtp;
@@ -1124,8 +1122,6 @@ static inline void mdm_readline(char *buf, int bufsiz)
 	}
 }
 
-
-
 extern void  dbg(const char *fmt, ...);
 int mdm_init (void)
 {