diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c index 2995c8f105..ed3fa6ef9a 100644 --- a/board/hale/tt01/tt01.c +++ b/board/hale/tt01/tt01.c @@ -26,6 +26,8 @@ #include #include #include +#include +#include #include #include #include @@ -175,8 +177,6 @@ int board_init(void) int board_late_init(void) { - pmic_init(); - #ifdef CONFIG_HW_WATCHDOG mxc_hw_watchdog_enable(); #endif @@ -190,6 +190,36 @@ int checkboard(void) return 0; } +#ifdef CONFIG_MXC_MMC +int board_mmc_init(bd_t *bis) +{ + u32 val; + struct pmic *p; + + /* + * this is the first driver to use the pmic, so call + * pmic_init() here. board_late_init() is too late for + * the MMC driver. + */ + pmic_init(); + p = get_pmic(); + + /* configure pins for SDHC1 only */ + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC)); + + /* turn on power V_MMC1 */ + if (pmic_reg_read(p, REG_MODE_1, &val) < 0) + pmic_reg_write(p, REG_MODE_1, val | VMMC1EN); + + return mxc_mmc_init(bis); +} +#endif + int board_eth_init(bd_t *bis) { int rc = 0; diff --git a/include/configs/tt01.h b/include/configs/tt01.h index 7e293c676c..35d2bd820f 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -180,6 +180,11 @@ #define CONFIG_SMC911X_BASE (CS4_BASE+0x200000) #define CONFIG_SMC911X_16_BIT +/* mmc driver */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_MXC_MMC +#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR /* * Command definition */ @@ -229,6 +234,13 @@ #define CONFIG_CMDLINE_EDITING +/* MMC boot support */ +#define CONFIG_CMD_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT + #define CONFIG_NAND_MXC #define CONFIG_SYS_MAX_NAND_DEVICE 1