ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
Signed-off-by: Stefan Roese <sr@denx.de>
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parent
43cbce69d4
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f4d14c5550
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@ -40,6 +40,8 @@
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static char *config_labels[] = {
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static char *config_labels[] = {
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"CPU: 600 PLB: 200 OPB: 100 EBC: 100",
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"CPU: 600 PLB: 200 OPB: 100 EBC: 100",
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"CPU: 800 PLB: 200 OPB: 100 EBC: 100",
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"CPU: 800 PLB: 200 OPB: 100 EBC: 100",
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"CPU:1000 PLB: 200 OPB: 100 EBC: 100",
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"CPU:1066 PLB: 266 OPB: 88 EBC: 88",
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NULL
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NULL
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};
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};
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@ -54,6 +56,16 @@ static u8 boot_configs[][17] = {
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0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08,
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0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08,
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0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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},
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},
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{
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(NAND_COMPATIBLE | NOR_COMPATIBLE),
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0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0, 0x40, 0x08,
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0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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},
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{
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(NAND_COMPATIBLE | NOR_COMPATIBLE),
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0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0, 0x40, 0x08,
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0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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},
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{
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{
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0,
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0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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