Merge branch 'master' of git://git.denx.de/u-boot-arm
commit
fce0a90a68
8
Kconfig
8
Kconfig
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@ -58,6 +58,14 @@ config CC_OPTIMIZE_FOR_SIZE
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endmenu # General setup
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endmenu # General setup
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menuconfig EXPERT
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bool "Configure standard U-Boot features (expert users)"
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help
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This option allows certain base U-Boot options and settings
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to be disabled or tweaked. This is for specialized
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environments which can tolerate a "non-standard" U-Boot.
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Only use this if you really know what you are doing.
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menu "Boot images"
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menu "Boot images"
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config SPL_BUILD
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config SPL_BUILD
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@ -415,6 +415,8 @@ config TARGET_INTEGRATORCP_CM946ES
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config TARGET_VEXPRESS_CA15_TC2
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config TARGET_VEXPRESS_CA15_TC2
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bool "Support vexpress_ca15_tc2"
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bool "Support vexpress_ca15_tc2"
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select CPU_V7
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select CPU_V7
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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config TARGET_VEXPRESS_CA5X2
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config TARGET_VEXPRESS_CA5X2
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bool "Support vexpress_ca5x2"
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bool "Support vexpress_ca5x2"
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@ -826,6 +828,8 @@ source "arch/arm/cpu/arm926ejs/versatile/Kconfig"
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source "arch/arm/cpu/armv7/zynq/Kconfig"
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source "arch/arm/cpu/armv7/zynq/Kconfig"
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source "arch/arm/cpu/armv7/Kconfig"
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source "board/aristainetos/Kconfig"
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source "board/aristainetos/Kconfig"
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source "board/BuR/kwb/Kconfig"
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source "board/BuR/kwb/Kconfig"
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source "board/BuR/tseries/Kconfig"
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source "board/BuR/tseries/Kconfig"
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@ -0,0 +1,34 @@
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if CPU_V7
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config CPU_V7_HAS_NONSEC
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bool
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config CPU_V7_HAS_VIRT
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bool
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config ARMV7_NONSEC
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boolean "Enable support for booting in non-secure mode" if EXPERT
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depends on CPU_V7_HAS_NONSEC
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default y
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---help---
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Say Y here to enable support for booting in non-secure / SVC mode.
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config ARMV7_BOOT_SEC_DEFAULT
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boolean "Boot in secure mode by default" if EXPERT
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depends on ARMV7_NONSEC
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default n
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---help---
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Say Y here to boot in secure mode by default even if non-secure mode
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is supported. This option is useful to boot kernels which do not
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suppport booting in non-secure mode. Only set this if you need it.
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This can be overriden at run-time by setting the bootm_boot_mode env.
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variable to "sec" or "nonsec".
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config ARMV7_VIRT
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boolean "Enable support for hardware virtualization" if EXPERT
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depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
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default y
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---help---
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Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
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endif
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@ -26,6 +26,8 @@ config TARGET_ODROID
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config TARGET_ARNDALE
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config TARGET_ARNDALE
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bool "Exynos5250 Arndale board"
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bool "Exynos5250 Arndale board"
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUPPORT_SPL
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select SUPPORT_SPL
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select OF_CONTROL if !SPL_BUILD
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select OF_CONTROL if !SPL_BUILD
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@ -237,6 +237,26 @@ static void boot_prep_linux(bootm_headers_t *images)
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}
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}
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}
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}
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#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
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static bool boot_nonsec(void)
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{
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char *s = getenv("bootm_boot_mode");
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#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
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bool nonsec = false;
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#else
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bool nonsec = true;
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#endif
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if (s && !strcmp(s, "sec"))
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nonsec = false;
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if (s && !strcmp(s, "nonsec"))
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nonsec = true;
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return nonsec;
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}
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#endif
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/* Subcommand: GO */
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/* Subcommand: GO */
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static void boot_jump_linux(bootm_headers_t *images, int flag)
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static void boot_jump_linux(bootm_headers_t *images, int flag)
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{
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{
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@ -285,12 +305,13 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
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if (!fake) {
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if (!fake) {
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#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
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#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
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armv7_init_nonsec();
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if (boot_nonsec()) {
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secure_ram_addr(_do_nonsec_entry)(kernel_entry,
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armv7_init_nonsec();
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0, machid, r2);
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secure_ram_addr(_do_nonsec_entry)(kernel_entry,
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#else
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0, machid, r2);
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kernel_entry(0, machid, r2);
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} else
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#endif
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#endif
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kernel_entry(0, machid, r2);
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}
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}
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#endif
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#endif
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}
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}
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@ -21,6 +21,8 @@ config MACH_SUN6I
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config MACH_SUN7I
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config MACH_SUN7I
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bool "sun7i (Allwinner A20)"
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bool "sun7i (Allwinner A20)"
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select CPU_V7
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select CPU_V7
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUPPORT_SPL
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select SUPPORT_SPL
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config MACH_SUN8I
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config MACH_SUN8I
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@ -60,6 +60,4 @@
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/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
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/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
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#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
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#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
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#define CONFIG_ARMV7_VIRT
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#endif /* __CONFIG_H */
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#endif /* __CONFIG_H */
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@ -22,8 +22,6 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#endif
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#define CONFIG_ARMV7_VIRT 1
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#define CONFIG_ARMV7_NONSEC 1
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#define CONFIG_ARMV7_PSCI 1
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#define CONFIG_ARMV7_PSCI 1
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#define CONFIG_ARMV7_PSCI_NR_CPUS 2
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#define CONFIG_ARMV7_PSCI_NR_CPUS 2
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#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
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#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
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#define CONFIG_SYSFLAGS_ADDR 0x1c010030
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#define CONFIG_SYSFLAGS_ADDR 0x1c010030
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#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
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#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
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#define CONFIG_ARMV7_VIRT
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#endif
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#endif
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