Marek Vasut 29aa439759 arm: socfpga: Fix ArriaV SoCDK PLL config ... Pull out the ArriaV SoCDK clock config from ancient Altera U-Boot "rel_socfpga_v2013.01.01_15.05.01_pr" and implant those values into mainline to get a booting ArriaV SoCDK. Signed-off-by: Marek Vasut <marex@denx.de>		2015-08-23 11:56:21 +02:00
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iocsr_config.h	arm: socfpga: Switch to filtered QTS files	2015-08-23 11:56:20 +02:00
pinmux_config.h	arm: socfpga: Make the pinmux table const u8	2015-08-23 11:56:20 +02:00
pll_config.h	arm: socfpga: Fix ArriaV SoCDK PLL config	2015-08-23 11:56:21 +02:00
sdram_config.h	arm: socfpga: Switch to filtered QTS files	2015-08-23 11:56:20 +02:00