400 lines
9.2 KiB
Plaintext
400 lines
9.2 KiB
Plaintext
/*
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* Copyright 2017 NXP
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "imx7d.dtsi"
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/ {
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model = "Freescale i.MX7 SabreSD Board";
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compatible = "fsl,imx7d-sdb", "fsl,imx7d";
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memory {
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reg = <0x80000000 0x80000000>;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_usb_otg1_vbus: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "usb_otg1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg2_vbus: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "usb_otg2_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_can2_3v3: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "can2-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 14 GPIO_ACTIVE_LOW>;
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};
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reg_vref_1v8: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "vref-1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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reg_sd1_vmmc: regulator@5 {
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compatible = "regulator-fixed";
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regulator-name = "VDD_SD1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <200000>;
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off-on-delay = <20000>;
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enable-active-high;
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};
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};
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};
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&cpu0 {
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/*arm-supply = <&sw1a_reg>;*/
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c2>;
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scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c3>;
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scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c4>;
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scl-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&lcdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcdif>;
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/*enable-gpio = <&gpio_spi 7 GPIO_ACTIVE_LOW>; TODO */
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display = <&display0>;
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status = "okay";
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display0: display@0 {
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bits-per-pixel = <16>;
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bus-width = <24>;
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <40000000>;
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hactive = <334>;
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vactive = <1405>;
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hfront-porch = <1>;
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hback-porch = <1>;
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hsync-len = <1>;
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vback-porch = <1>;
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vfront-porch = <1>;
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vsync-len = <1>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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};
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&sdma {
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status = "okay";
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};
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&iomuxc_lpsr {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg2_pwr_2>;
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imx7d-sdb {
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pinctrl_usbotg2_pwr_2: usbotg2-2 {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x14
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
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>;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
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assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
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status = "okay";
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};
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&usbotg1 {
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vbus-supply = <®_usb_otg1_vbus>;
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srp-disable;
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hnp-disable;
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adp-disable;
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status = "okay";
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};
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&usbotg2 {
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vbus-supply = <®_usb_otg2_vbus>;
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dr_mode = "host";
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_wifi &pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_wifi &pinctrl_usdhc2_100mhz>;
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pinctrl-2 = <&pinctrl_wifi &pinctrl_usdhc2_200mhz>;
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enable-sdio-wakeup;
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keep-power-in-suspend;
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non-removable;
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cd-post;
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pm-ignore-notify;
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wifi-host;
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status = "disabled";
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
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assigned-clock-rates = <400000000>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wifi>;
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imx7d-sdb {
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pinctrl_wifi: wifigrp {
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fsl,pins = <
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MX7D_PAD_SD1_WP__CCM_CLKO2 0x00000014
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
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MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
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MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
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MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f
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MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f
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>;
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};
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pinctrl_lcdif: lcdifgrp {
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fsl,pins = <
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MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
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MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
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MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
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MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
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MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
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MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
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MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
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MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
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MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
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MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
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MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
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MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
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MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
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MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
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MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
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MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
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MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
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MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
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MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79
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MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79
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MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79
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MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79
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MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79
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MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79
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MX7D_PAD_LCD_CLK__LCD_CLK 0x79
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MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
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MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
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MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
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MX7D_PAD_LCD_RESET__LCD_RESET 0x79
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
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MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
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>;
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};
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pinctrl_usbotg2_pwr_1: usbotg2-1 {
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fsl,pins = <
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MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x59
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MX7D_PAD_SD2_CLK__SD2_CLK 0x19
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
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MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x19 /* WL_REG_ON */
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MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x19 /* WL_HOST_WAKE */
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x59
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MX7D_PAD_SD3_CLK__SD3_CLK 0x19
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
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>;
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};
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};
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};
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