52 lines
1.1 KiB
C
52 lines
1.1 KiB
C
/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* for now: just dummy functions to satisfy the linker */
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#include <common.h>
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__weak void flush_cache(unsigned long start, unsigned long size)
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{
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#if defined(CONFIG_CPU_ARM1136)
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#if !defined(CONFIG_SYS_ICACHE_OFF)
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asm("mcr p15, 0, r1, c7, c5, 0"); /* invalidate I cache */
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#endif
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#if !defined(CONFIG_SYS_DCACHE_OFF)
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asm("mcr p15, 0, r1, c7, c14, 0"); /* Clean+invalidate D cache */
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#endif
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#endif /* CONFIG_CPU_ARM1136 */
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#ifdef CONFIG_CPU_ARM926EJS
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/* test and clean, page 2-23 of arm926ejs manual */
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asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
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/* disable write buffer as well (page 2-22) */
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asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
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#endif /* CONFIG_CPU_ARM926EJS */
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return;
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}
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/*
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* Default implementation:
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* do a range flush for the entire range
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*/
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__weak void flush_dcache_all(void)
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{
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flush_cache(0, ~0);
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}
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/*
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* Default implementation of enable_caches()
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* Real implementation should be in platform code
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*/
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__weak void enable_caches(void)
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{
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puts("WARNING: Caches not enabled\n");
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}
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