30 lines
721 B
C
30 lines
721 B
C
/*
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* Configuration for Xilinx ZynqMP zc1751 XM015 DC1
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*
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* (C) Copyright 2015 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
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#define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
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#define CONFIG_ZYNQ_SDHCI0
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#define CONFIG_ZYNQ_SDHCI1
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#define CONFIG_AHCI
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
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#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm015 dc1"
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#define CONFIG_KERNEL_FDT_OFST_SIZE \
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"kernel_offset=0x400000\0" \
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"fdt_offset=0x2400000\0" \
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"kernel_size=0x2000000\0" \
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"fdt_size=0x80000\0" \
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"board=zc1751-dc1\0"
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */
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