31 lines
746 B
C
31 lines
746 B
C
/*
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* Configuration for Xilinx ZynqMP zc1751 XM019 DC5
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*
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* (C) Copyright 2015 Xilinx, Inc.
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* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
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#define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
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#define CONFIG_ZYNQ_SDHCI0
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#define CONFIG_ZYNQ_I2C0
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#define CONFIG_ZYNQ_I2C1
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#define CONFIG_SYS_I2C_ZYNQ
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#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5"
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#define CONFIG_KERNEL_FDT_OFST_SIZE \
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"kernel_offset=0x400000\0" \
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"fdt_offset=0x2400000\0" \
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"kernel_size=0x2000000\0" \
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"fdt_size=0x80000\0" \
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"board=zc1751-dc5\0"
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */
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