![Stefan Roese](/assets/img/avatar_default.png)
By changing the cmd_mtdparts to only use the MTD infrastructure and not the direct interface to the CFI NOR FLASH driver we now need to add the MTD infrastructure to all boards using those mtdparts commands. This patch adds those components: CONFIG_MTD_DEVICE (for all FLASH types) plus CONFIG_FLASH_CFI_MTD (for NOR FLASH) To all board maintainers: Please test this on your platforms and report any problems/issues found. Thanks. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ron Madrid <info@sheldoninst.com> Cc: Georg Schardt <schardt@team-ctech.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Martin Krause <martin.krause@tqs.de> Cc: Gary Jennejohn <garyj@denx.de> Cc: Ricardo Ribalda <ricardo.ribalda@uam.es>
742 lines
23 KiB
C
742 lines
23 KiB
C
/*
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* (C) Copyright 2003-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004-2006
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
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#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
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#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
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#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
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/* On a Cameron or on a FO300 board or ... */
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#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
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#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
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#endif
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#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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#define CONFIG_HIGH_BATS 1 /* High BATs supported */
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/*
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* Serial console configuration
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*/
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#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
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#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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#define CONFIG_BOOTCOUNT_LIMIT 1
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#ifdef CONFIG_FO300
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#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
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#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
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#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
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#if 0
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#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
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/* switch is closed */
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#endif
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#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
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/* switch is open */
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#endif /* CONFIG_FO300 */
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#ifdef CONFIG_STK52XX
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#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
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#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
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#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
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#define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
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#define CONFIG_BOARD_EARLY_INIT_R
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#endif /* CONFIG_STK52XX */
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/*
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* PCI Mapping:
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* 0x40000000 - 0x4fffffff - PCI Memory
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* 0x50000000 - 0x50ffffff - PCI IO Space
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*/
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#ifdef CONFIG_STK52XX
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#define CONFIG_PCI 1
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#define CONFIG_PCI_PNP 1
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/* #define CONFIG_PCI_SCAN_SHOW 1 */
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#define CONFIG_PCI_MEM_BUS 0x40000000
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#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
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#define CONFIG_PCI_MEM_SIZE 0x10000000
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#define CONFIG_PCI_IO_BUS 0x50000000
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#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
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#define CONFIG_PCI_IO_SIZE 0x01000000
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#define CONFIG_NET_MULTI 1
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#define CONFIG_EEPRO100 1
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#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
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#define CONFIG_NS8382X 1
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#endif /* CONFIG_STK52XX */
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/*
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* Video console
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*/
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#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_SM501
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#define CONFIG_VIDEO_SM501_32BPP
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VIDEO_LOGO
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#ifndef CONFIG_FO300
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#define CONFIG_CONSOLE_EXTRA_INFO
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#else
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#define CONFIG_VIDEO_BMP_LOGO
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#endif
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_VIDEO_SW_CURSOR
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#endif /* #ifndef CONFIG_TQM5200S */
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/* Partitions */
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#define CONFIG_MAC_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_ISO_PARTITION
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/* USB */
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#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_OHCI_BE_CONTROLLER
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#define CONFIG_USB_STORAGE
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_USB
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#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
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#endif
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#ifndef CONFIG_CAM5200
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/* POST support */
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#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
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CONFIG_SYS_POST_CPU | \
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CONFIG_SYS_POST_I2C)
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#endif
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#ifdef CONFIG_POST
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/* preserve space for the post_word at end of on-chip SRAM */
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#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
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#endif
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_SNTP
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#define CONFIG_CMD_BSP
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#ifdef CONFIG_VIDEO
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#define CONFIG_CMD_BMP
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#endif
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#ifdef CONFIG_PCI
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#define CONFIG_CMD_PCI
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#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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#endif
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#if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#endif
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#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
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#define CONFIG_CFG_USB
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#define CONFIG_CFG_FAT
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#endif
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#ifdef CONFIG_POST
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#define CONFIG_CMD_DIAG
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#endif
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#define CONFIG_TIMESTAMP /* display image timestamps */
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#if (TEXT_BASE != 0xFFF00000)
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# define CONFIG_SYS_LOWBOOT 1 /* Boot low */
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#endif
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/*
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* Autobooting
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*/
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_PREBOOT "echo;" \
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"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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"echo"
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#undef CONFIG_BOOTARGS
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#if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
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# define ENV_UPDT \
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"update=protect off FFF00000 +${filesize};" \
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"erase FFF00000 +${filesize};" \
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"cp.b 200000 FFF00000 ${filesize};" \
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"protect on FFF00000 +${filesize}\0"
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#else /* default lowboot configuration */
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# define ENV_UPDT \
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"update=protect off FC000000 +${filesize};" \
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"erase FC000000 +${filesize};" \
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"cp.b 200000 FC000000 ${filesize};" \
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"protect on FC000000 +${filesize}\0"
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#endif
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#if defined(CONFIG_TQM5200)
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#define CUSTOM_ENV_SETTINGS \
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"hostname=tqm5200\0" \
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"bootfile=/tftpboot/tqm5200/uImage\0" \
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"fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
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"u-boot=/tftpboot/tqm5200/u-boot.bin\0"
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#elif defined(CONFIG_CAM5200)
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#define CUSTOM_ENV_SETTINGS \
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"bootfile=cam5200/uImage\0" \
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"u-boot=cam5200/u-boot.bin\0" \
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"setup=tftp 200000 cam5200/setup.img; source 200000\0"
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#endif
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#if defined(CONFIG_TQM5200_B)
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#define ENV_FLASH_LAYOUT \
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"fdt_addr=FC100000\0" \
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"kernel_addr=FC140000\0" \
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"ramdisk_addr=FC600000\0"
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#else /* !CONFIG_TQM5200_B */
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#define ENV_FLASH_LAYOUT \
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"fdt_addr=FC0A0000\0" \
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"kernel_addr=FC0C0000\0" \
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"ramdisk_addr=FC300000\0"
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"console=ttyPSC0\0" \
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ENV_FLASH_LAYOUT \
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"kernel_addr_r=400000\0" \
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"fdt_addr_r=600000\0" \
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"rootpath=/opt/eldk/ppc_6xx\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addcons=setenv bootargs ${bootargs} " \
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"console=${console},${baudrate}\0" \
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"flash_self_old=sete console ttyS0; run ramargs addip addcons;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"flash_self=run ramargs addip addcons;" \
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"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
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"flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
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"bootm ${kernel_addr}\0" \
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"flash_nfs=run nfsargs addip addcons;" \
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"bootm ${kernel_addr} - ${fdt_addr}\0" \
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"net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
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"sete console ttyS0; run nfsargs addip addcons;bootm\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
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"tftp ${fdt_addr_r} ${fdt_file}; " \
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"run nfsargs addip addcons; " \
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"bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
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CUSTOM_ENV_SETTINGS \
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"load=tftp 200000 ${u-boot}\0" \
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ENV_UPDT \
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""
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#define CONFIG_BOOTCOMMAND "run net_nfs"
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/*
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* IPB Bus clocking configuration.
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*/
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#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
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#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
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/*
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* PCI Bus clocking configuration
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*
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* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
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* CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
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* 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
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*/
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#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
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#endif
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/*
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* I2C configuration
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*/
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#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
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#ifdef CONFIG_TQM5200_REV100
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#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
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#else
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#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
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#endif
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/*
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* I2C clock frequency
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*
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* Please notice, that the resulting clock frequency could differ from the
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* configured value. This is because the I2C clock is derived from system
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* clock over a frequency divider with only a few divider values. U-boot
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* calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
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* approximation allways lies below the configured value, never above.
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*/
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#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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/*
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* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
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* also). For other EEPROMs configuration should be verified. On Mini-FAP the
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* EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
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* same configuration could be used.
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*/
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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/*
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* HW-Monitor configuration on Mini-FAP
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*/
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#if defined (CONFIG_MINIFAP)
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#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
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#endif
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/* List of I2C addresses to be verified by POST */
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#if defined (CONFIG_MINIFAP)
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#undef I2C_ADDR_LIST
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#define I2C_ADDR_LIST { CONFIG_SYS_I2C_EEPROM_ADDR, \
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CONFIG_SYS_I2C_HWMON_ADDR, \
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CONFIG_SYS_I2C_SLAVE }
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#endif
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/*
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* Flash configuration
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*/
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#define CONFIG_SYS_FLASH_BASE 0xFC000000
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#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
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(= chip selects) */
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#define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
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#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#define CONFIG_SYS_FLASH_ADDR0 0x555
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#define CONFIG_SYS_FLASH_ADDR1 0x2AA
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#define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#else
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/* use CFI flash driver */
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#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
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#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
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(= chip selects) */
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#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
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#endif
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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#if defined (CONFIG_CAM5200)
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# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
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#elif defined(CONFIG_TQM5200_B)
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# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
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#else
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# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
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#endif
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/* Dynamic MTD partition support */
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define CONFIG_FLASH_CFI_MTD
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#define MTDIDS_DEFAULT "nor0=TQM5200-0"
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#ifdef CONFIG_STK52XX
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# if defined(CONFIG_TQM5200_B)
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# if defined(CONFIG_SYS_LOWBOOT)
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# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
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"256k(dtb)," \
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"2304k(kernel)," \
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"2560k(small-fs)," \
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"2m(initrd)," \
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"8m(misc)," \
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"16m(big-fs)"
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# else /* highboot */
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# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
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"3584k(small-fs)," \
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"2m(initrd)," \
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"8m(misc)," \
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"15m(big-fs)," \
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"1m(firmware)"
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# endif /* CONFIG_SYS_LOWBOOT */
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# else /* !CONFIG_TQM5200_B */
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# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
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"128k(dtb)," \
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"2304k(kernel)," \
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"2m(initrd)," \
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"4m(small-fs)," \
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"8m(misc)," \
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"15m(big-fs)"
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# endif /* CONFIG_TQM5200_B */
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#elif defined (CONFIG_CAM5200)
|
|
# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
|
|
"1792k(kernel)," \
|
|
"5632k(rootfs)," \
|
|
"24m(home)"
|
|
#elif defined (CONFIG_FO300)
|
|
# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
|
|
"1408k(kernel)," \
|
|
"2m(initrd)," \
|
|
"4m(small-fs)," \
|
|
"8m(misc)," \
|
|
"16m(big-fs)"
|
|
#else
|
|
# error "Unknown Carrier Board"
|
|
#endif /* CONFIG_STK52XX */
|
|
|
|
/*
|
|
* Environment settings
|
|
*/
|
|
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
#define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
|
|
#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
|
|
#define CONFIG_ENV_SECT_SIZE 0x40000
|
|
#else
|
|
#define CONFIG_ENV_SECT_SIZE 0x20000
|
|
#endif /* CONFIG_TQM5200_B */
|
|
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
|
|
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
|
|
|
|
/*
|
|
* Memory map
|
|
*/
|
|
#define CONFIG_SYS_MBAR 0xF0000000
|
|
#define CONFIG_SYS_SDRAM_BASE 0x00000000
|
|
#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
|
|
|
|
/* Use ON-Chip SRAM until RAM will be available */
|
|
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
|
|
#ifdef CONFIG_POST
|
|
/* preserve space for the post_word at end of on-chip SRAM */
|
|
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
|
|
#else
|
|
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
|
|
#endif
|
|
|
|
|
|
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
|
|
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
|
|
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
|
|
|
|
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
|
|
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
|
|
# define CONFIG_SYS_RAMBOOT 1
|
|
#endif
|
|
|
|
#if defined (CONFIG_CAM5200)
|
|
# define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
|
#elif defined(CONFIG_TQM5200_B)
|
|
# define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
|
|
#else
|
|
# define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
|
|
#endif
|
|
|
|
#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
|
|
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
|
|
|
/*
|
|
* Ethernet configuration
|
|
*/
|
|
#define CONFIG_MPC5xxx_FEC 1
|
|
#define CONFIG_MPC5xxx_FEC_MII100
|
|
/*
|
|
* Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
|
|
*/
|
|
/* #define CONFIG_MPC5xxx_FEC_MII10 */
|
|
#define CONFIG_PHY_ADDR 0x00
|
|
|
|
/*
|
|
* GPIO configuration
|
|
*
|
|
* use CS1: Bit 0 (mask: 0x80000000):
|
|
* 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
|
|
* use ALT CAN position: Bits 2-3 (mask: 0x30000000):
|
|
* 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
|
|
* SPI on PSC3 according to PSC3 setting. Use for CAM5200.
|
|
* 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
|
|
* Use for REV200 STK52XX boards and FO300 boards. Do not use
|
|
* with REV100 modules (because, there I2C1 is used as I2C bus).
|
|
* use ATA: Bits 6-7 (mask 0x03000000):
|
|
* 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
|
|
* Use for CAM5200 board.
|
|
* 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
|
|
* use PSC6: Bits 9-11 (mask 0x00700000):
|
|
* 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
|
|
* UART, CODEC or IrDA.
|
|
* GPIO on PSC6_3 is used in post_hotkeys_pressed() to
|
|
* enable extended POST tests.
|
|
* Use for MINI-FAP and TQM5200_IB boards.
|
|
* 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
|
|
* Extended POST test is not available.
|
|
* Use for STK52xx, FO300 and CAM5200 boards.
|
|
* use PCI_DIS: Bit 16 (mask 0x00008000):
|
|
* 1 -> disable PCI controller (on CAM5200 board).
|
|
* use USB: Bits 18-19 (mask 0x00003000):
|
|
* 10 -> two UARTs (on FO300 and CAM5200).
|
|
* use PSC3: Bits 20-23 (mask: 0x00000f00):
|
|
* 0000 -> All PSC3 pins are GPIOs.
|
|
* 1100 -> UART/SPI (on FO300 board).
|
|
* 0100 -> UART (on CAM5200 board).
|
|
* use PSC2: Bits 25:27 (mask: 0x00000030):
|
|
* 000 -> All PSC2 pins are GPIOs.
|
|
* 100 -> UART (on CAM5200 board).
|
|
* 001 -> CAN1/2 on PSC2 pins.
|
|
* Use for REV100 STK52xx boards
|
|
* 01x -> Use AC97 (on FO300 board).
|
|
* use PSC1: Bits 29-31 (mask: 0x00000007):
|
|
* 100 -> UART (on all boards).
|
|
*/
|
|
#if defined (CONFIG_MINIFAP)
|
|
# define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
|
|
#elif defined (CONFIG_STK52XX)
|
|
# if defined (CONFIG_STK52XX_REV100)
|
|
# define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
|
|
# else /* STK52xx REV200 and above */
|
|
# if defined (CONFIG_TQM5200_REV100)
|
|
# error TQM5200 REV100 not supported on STK52XX REV200 or above
|
|
# else/* TQM5200 REV200 and above */
|
|
# define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
|
|
# endif
|
|
# endif
|
|
#elif defined (CONFIG_FO300)
|
|
# define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
|
|
#elif defined (CONFIG_CAM5200)
|
|
# define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
|
|
#else /* TMQ5200 Inbetriebnahme-Board */
|
|
# define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
|
|
#endif
|
|
|
|
/*
|
|
* RTC configuration
|
|
*/
|
|
#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
|
|
# define CONFIG_RTC_M41T11 1
|
|
# define CONFIG_SYS_I2C_RTC_ADDR 0x68
|
|
# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
|
|
year */
|
|
#else
|
|
# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
|
|
#endif
|
|
|
|
/*
|
|
* Miscellaneous configurable options
|
|
*/
|
|
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
|
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
|
|
|
|
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
|
|
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
|
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
|
|
|
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
|
|
#if defined(CONFIG_CMD_KGDB)
|
|
#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_KGDB)
|
|
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
|
#else
|
|
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
|
#endif
|
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
|
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
|
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
|
|
|
/* Enable an alternate, more extensive memory test */
|
|
#define CONFIG_SYS_ALT_MEMTEST
|
|
|
|
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
|
|
#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
|
|
|
|
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
|
|
|
|
/*
|
|
* Enable loopw command.
|
|
*/
|
|
#define CONFIG_LOOPW
|
|
|
|
/*
|
|
* Various low-level settings
|
|
*/
|
|
#if defined(CONFIG_MPC5200)
|
|
#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
|
|
#define CONFIG_SYS_HID0_FINAL HID0_ICE
|
|
#else
|
|
#define CONFIG_SYS_HID0_INIT 0
|
|
#define CONFIG_SYS_HID0_FINAL 0
|
|
#endif
|
|
|
|
#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
|
|
#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
|
|
#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
|
|
#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
|
|
#else
|
|
#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
|
|
#endif
|
|
#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
|
|
#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
|
|
|
|
#define CONFIG_LAST_STAGE_INIT
|
|
|
|
/*
|
|
* SRAM - Do not map below 2 GB in address space, because this area is used
|
|
* for SDRAM autosizing.
|
|
*/
|
|
#define CONFIG_SYS_CS2_START 0xE5000000
|
|
#define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
|
|
#define CONFIG_SYS_CS2_CFG 0x0004D930
|
|
|
|
/*
|
|
* Grafic controller - Do not map below 2 GB in address space, because this
|
|
* area is used for SDRAM autosizing.
|
|
*/
|
|
#define SM501_FB_BASE 0xE0000000
|
|
#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
|
|
#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
|
|
#define CONFIG_SYS_CS1_CFG 0x8F48FF70
|
|
#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
|
|
|
|
#define CONFIG_SYS_CS_BURST 0x00000000
|
|
#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
|
|
|
|
#if defined(CONFIG_CAM5200)
|
|
#define CONFIG_SYS_CS4_START 0xB0000000
|
|
#define CONFIG_SYS_CS4_SIZE 0x00010000
|
|
#define CONFIG_SYS_CS4_CFG 0x01019C10
|
|
|
|
#define CONFIG_SYS_CS5_START 0xD0000000
|
|
#define CONFIG_SYS_CS5_SIZE 0x01208000
|
|
#define CONFIG_SYS_CS5_CFG 0x1414BF10
|
|
#endif
|
|
|
|
#define CONFIG_SYS_RESET_ADDRESS 0xff000000
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* USB stuff
|
|
*-----------------------------------------------------------------------
|
|
*/
|
|
#define CONFIG_USB_CLOCK 0x0001BBBB
|
|
#define CONFIG_USB_CONFIG 0x00001000
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* IDE/ATA stuff Supports IDE harddisk
|
|
*-----------------------------------------------------------------------
|
|
*/
|
|
|
|
#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
|
|
|
|
#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
|
|
#undef CONFIG_IDE_LED /* LED for ide not supported */
|
|
|
|
#define CONFIG_IDE_RESET /* reset for ide supported */
|
|
#define CONFIG_IDE_PREINIT
|
|
|
|
#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
|
|
#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
|
|
|
|
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
|
|
|
|
#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
|
|
|
|
/* Offset for data I/O */
|
|
#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
|
|
|
|
/* Offset for normal register accesses */
|
|
#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
|
|
|
|
/* Offset for alternate registers */
|
|
#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
|
|
|
|
/* Interval between registers */
|
|
#define CONFIG_SYS_ATA_STRIDE 4
|
|
|
|
/* Support ATAPI devices */
|
|
#define CONFIG_ATAPI 1
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Open firmware flat tree support
|
|
*-----------------------------------------------------------------------
|
|
*/
|
|
#define CONFIG_OF_LIBFDT 1
|
|
#define CONFIG_OF_BOARD_SETUP 1
|
|
|
|
#define OF_CPU "PowerPC,5200@0"
|
|
#define OF_SOC "soc5200@f0000000"
|
|
#define OF_TBCLK (bd->bi_busfreq / 4)
|
|
#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
|
|
|
|
#endif /* __CONFIG_H */
|