158 lines
4.2 KiB
C
158 lines
4.2 KiB
C
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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* Copyright 2016 reMarkable AS
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*
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* Configuration settings for the reMarkable
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ZERO_GRAVITAS_H
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#define __ZERO_GRAVITAS_H
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#include "mx6_common.h"
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#ifdef CONFIG_SPL
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_BOARD_LOAD_IMAGE
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#include "imx6_spl.h"
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#endif
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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#define CONFIG_MXC_EPDC
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#define CONFIG_WAVEFORM_BUF_SIZE SZ_4M
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SOURCE
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_LCD
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#define CONFIG_CMD_BMP
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#define LCD_BPP LCD_COLOR16
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/* Size of malloc() pool, needs space for EPDC working buffer */
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#define CONFIG_SYS_MALLOC_LEN (SZ_32M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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/* Enable reading of serial tag from OCOTP */
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#define CONFIG_SERIAL_TAG
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"vcom=-1250000\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"initrd=0x89000000\0" \
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"fdt_file=zero-gravitas.dtb\0" \
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"fdt_addr=0x88000000\0" \
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"ip_dyn=yes\0" \
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"mmcdev=1\0" \
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"mmcpart=1\0" \
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"splashimage=0x80000000\0" \
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"splashpos=m,m\0" \
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"mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot} max17135:vcom=${vcom};\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi;\0" \
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"memboot=echo Booting from memory...; " \
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"setenv bootargs console=${console},${baudrate}" \
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"max17135:vcom=${vcom} " \
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"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
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"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
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"g_mass_storage.iSerialNumber=\"\" rdinit=/sbin/init; "\
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"bootz ${loadaddr} ${initrd} ${fdt_addr};\0" \
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#define CONFIG_BOOTCOMMAND \
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"run memboot; " \
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"mmc dev ${mmcdev}; " \
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"if mmc rescan; then " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"fi; " \
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"fi;" \
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"echo WARN: unable to boot from either RAM or eMMC; "
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
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#define CONFIG_STACKSIZE SZ_128K
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_512M
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Environment organization */
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#define CONFIG_ENV_IS_IN_MMC
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#ifdef CONFIG_CMD_SF
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#define CONFIG_MXC_SPI
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#endif
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
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#endif
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#define CONFIG_IMX_THERMAL
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#endif /* __ZERO_GRAVITAS_H */
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