add baud and parity control

master
George Hotz 2017-04-25 15:16:23 -07:00
parent 526a52c845
commit 2b93c6d85a
2 changed files with 31 additions and 1 deletions

View File

@ -532,6 +532,27 @@ int usb_cb_control_msg(USB_Setup_TypeDef *setup, uint8_t *resp) {
ur = get_ring_by_number(setup->b.wValue.w);
uart_set_baud(ur->uart, setup->b.wIndex.w);
break;
case 0xe2: // uart set parity
ur = get_ring_by_number(setup->b.wValue.w);
switch (setup->b.wIndex.w) {
case 0:
// disable parity
ur->uart->CR1 &= ~USART_CR1_PCE;
break;
case 1:
// even parity
ur->uart->CR1 &= ~USART_CR1_PS;
ur->uart->CR1 |= USART_CR1_PCE;
break;
case 2:
// odd parity
ur->uart->CR1 |= USART_CR1_PS;
ur->uart->CR1 |= USART_CR1_PCE;
break;
default:
break;
}
break;
case 0xf0: // k-line wValue pulse on uart2
if (setup->b.wValue.w == 1) {
GPIOC->ODR &= ~(1 << 10);

View File

@ -79,7 +79,7 @@ class Panda(object):
"started_signal_detected": a[5],
"started_alt": a[6]}
# ******************* can *******************
# ******************* configuration *******************
def set_gmlan(self, on):
if on:
@ -87,6 +87,15 @@ class Panda(object):
else:
self.handle.controlWrite(usb1.TYPE_VENDOR | usb1.RECIPIENT_DEVICE, 0xdb, 0, 0, '')
def set_uart_baud(self, uart, rate):
self.handle.controlWrite(usb1.TYPE_VENDOR | usb1.RECIPIENT_DEVICE, 0xe1, uart, rate, '')
def set_uart_parity(self, uart, parity):
# parity, 0=off, 1=even, 2=odd
self.handle.controlWrite(usb1.TYPE_VENDOR | usb1.RECIPIENT_DEVICE, 0xe2, uart, parity, '')
# ******************* can *******************
def can_send_many(self, arr):
snds = []
for addr, _, dat, bus in arr: