froze up, maybe thats the fix
parent
1465aa478f
commit
7fa4808cf8
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@ -170,7 +170,7 @@ void uart_dma_drain() {
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enter_critical_section();
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// disable DMA
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q->uart->CR3 &= ~USART_CR3_DMAR;
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//q->uart->CR3 &= ~USART_CR3_DMAR;
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DMA2_Stream5->CR &= ~DMA_SxCR_EN;
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while (DMA2_Stream5->CR & DMA_SxCR_EN);
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@ -193,7 +193,7 @@ void uart_dma_drain() {
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// enable DMA
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DMA2_Stream5->CR |= DMA_SxCR_EN;
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q->uart->CR3 |= USART_CR3_DMAR;
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//q->uart->CR3 |= USART_CR3_DMAR;
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exit_critical_section();
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}
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@ -226,8 +226,7 @@ void uart_init(USART_TypeDef *u, int baud) {
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DMA2_Stream5->PAR = (uint32_t)&(USART1->DR);
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// channel4, increment memory, periph -> memory, enable
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DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_EN;
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DMA2_Stream5->CR |= DMA_SxCR_HTIE;
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DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_HTIE | DMA_SxCR_EN;
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// this one uses DMA receiver
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u->CR3 = USART_CR3_DMAR;
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