632 lines
18 KiB
C
632 lines
18 KiB
C
// **** supporting defines ****
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typedef struct
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{
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__IO uint32_t HPRT;
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}
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USB_OTG_HostPortTypeDef;
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USB_OTG_GlobalTypeDef *USBx = USB_OTG_FS;
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#define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t)USBx + USB_OTG_HOST_BASE))
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#define USBx_HOST_PORT ((USB_OTG_HostPortTypeDef *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE))
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#define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t)USBx + USB_OTG_DEVICE_BASE))
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#define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
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#define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
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#define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
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#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
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#define USB_REQ_GET_STATUS 0x00
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#define USB_REQ_CLEAR_FEATURE 0x01
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#define USB_REQ_SET_FEATURE 0x03
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#define USB_REQ_SET_ADDRESS 0x05
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#define USB_REQ_GET_DESCRIPTOR 0x06
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#define USB_REQ_SET_DESCRIPTOR 0x07
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#define USB_REQ_GET_CONFIGURATION 0x08
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#define USB_REQ_SET_CONFIGURATION 0x09
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#define USB_REQ_GET_INTERFACE 0x0A
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#define USB_REQ_SET_INTERFACE 0x0B
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#define USB_REQ_SYNCH_FRAME 0x0C
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#define USB_DESC_TYPE_DEVICE 1
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#define USB_DESC_TYPE_CONFIGURATION 2
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#define USB_DESC_TYPE_STRING 3
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#define USB_DESC_TYPE_INTERFACE 4
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#define USB_DESC_TYPE_ENDPOINT 5
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#define USB_DESC_TYPE_DEVICE_QUALIFIER 6
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#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7
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#define STS_GOUT_NAK 1
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#define STS_DATA_UPDT 2
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#define STS_XFER_COMP 3
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#define STS_SETUP_COMP 4
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#define STS_SETUP_UPDT 6
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#define USBD_FS_TRDT_VALUE 5
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#define USB_OTG_SPEED_FULL 3
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// interfaces
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void usb_cb_enumeration_complete();
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void usb_cb_control_msg();
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void usb_cb_ep1_in(int len);
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void usb_cb_ep2_out(uint8_t *usbdata, int len);
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void usb_cb_ep3_out(uint8_t *usbdata, int len);
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uint8_t device_desc[] = {
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0x12,0x01,0x00,0x01,
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0xFF,0xFF,0xFF,0x40,
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(USB_VID>>0)&0xFF,(USB_VID>>8)&0xFF,
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(USB_PID>>0)&0xFF,(USB_PID>>8)&0xFF,
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#ifdef STM32F4
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0x00,0x23,
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#else
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0x00,0x22,
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#endif
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0x01,0x02,
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0x03,0x01};
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uint8_t configuration_desc[] = {
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0x09, 0x02, 0x27, 0x00,
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0x01, 0x01, 0x00, 0xc0,
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0x32,
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// interface 0
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0x09, 0x04, 0x00, 0x00,
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0x03, 0xff, 0xFF, 0xFF,
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0x00,
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// endpoint 1, read CAN
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0x07, 0x05, 0x81, 0x02, 0x40, 0x00, 0x00,
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// endpoint 2, send serial
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0x07, 0x05, 0x02, 0x02, 0x40, 0x00, 0x00,
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// endpoint 3, send CAN
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0x07, 0x05, 0x03, 0x02, 0x40, 0x00, 0x00,
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};
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uint8_t string_0_desc[] = {
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0x04, 0x03, 0x09, 0x04
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};
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uint16_t string_1_desc[] = {
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0x0312,
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'c', 'o', 'm', 'm', 'a', '.', 'a', 'i'
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};
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#ifdef PANDA
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uint16_t string_2_desc[] = {
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0x030c,
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'p', 'a', 'n', 'd', 'a'
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};
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#else
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uint16_t string_2_desc[] = {
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0x030c,
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'N', 'E', 'O', 'v', '1'
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};
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#endif
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uint16_t string_3_desc[] = {
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0x030a,
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'n', 'o', 'n', 'e'
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};
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typedef union
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{
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uint16_t w;
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struct BW
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{
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uint8_t msb;
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uint8_t lsb;
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}
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bw;
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}
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uint16_t_uint8_t;
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typedef union _USB_Setup
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{
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uint32_t d8[2];
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struct _SetupPkt_Struc
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{
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uint8_t bmRequestType;
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uint8_t bRequest;
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uint16_t_uint8_t wValue;
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uint16_t_uint8_t wIndex;
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uint16_t_uint8_t wLength;
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} b;
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}
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USB_Setup_TypeDef;
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// current packet
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USB_Setup_TypeDef setup;
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uint8_t usbdata[0x100];
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// packet read and write
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void *USB_ReadPacket(void *dest, uint16_t len) {
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uint32_t i=0;
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uint32_t count32b = (len + 3) / 4;
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for ( i = 0; i < count32b; i++, dest += 4 ) {
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// packed?
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*(__attribute__((__packed__)) uint32_t *)dest = USBx_DFIFO(0);
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}
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return ((void *)dest);
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}
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void USB_WritePacket(const uint8_t *src, uint16_t len, uint32_t ep) {
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#ifdef DEBUG_USB
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puts("writing ");
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hexdump(src, len);
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#endif
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uint32_t count32b = 0, i = 0;
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count32b = (len + 3) / 4;
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// bullshit
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USBx_INEP(ep)->DIEPTSIZ = (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) | (len & USB_OTG_DIEPTSIZ_XFRSIZ);
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USBx_INEP(ep)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
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// load the FIFO
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for (i = 0; i < count32b; i++, src += 4) {
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USBx_DFIFO(ep) = *((__attribute__((__packed__)) uint32_t *)src);
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}
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}
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void usb_reset() {
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// unmask endpoint interrupts, so many sets
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USBx_DEVICE->DAINT = 0xFFFFFFFF;
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USBx_DEVICE->DAINTMSK = 0xFFFFFFFF;
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//USBx_DEVICE->DOEPMSK = (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM);
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//USBx_DEVICE->DIEPMSK = (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM | USB_OTG_DIEPMSK_ITTXFEMSK);
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//USBx_DEVICE->DIEPMSK = (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM);
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// all interrupts for debugging
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USBx_DEVICE->DIEPMSK = 0xFFFFFFFF;
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USBx_DEVICE->DOEPMSK = 0xFFFFFFFF;
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// clear interrupts
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USBx_INEP(0)->DIEPINT = 0xFF;
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USBx_OUTEP(0)->DOEPINT = 0xFF;
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// unset the address
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USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD;
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// set up USB FIFOs
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// RX start address is fixed to 0
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USBx->GRXFSIZ = 0x40;
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// 0x100 to offset past GRXFSIZ
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USBx->DIEPTXF0_HNPTXFSIZ = (0x40 << 16) | 0x40;
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// EP1, massive
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USBx->DIEPTXF[0] = (0x40 << 16) | 0x80;
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// flush TX fifo
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USBx->GRSTCTL = USB_OTG_GRSTCTL_TXFFLSH | USB_OTG_GRSTCTL_TXFNUM_4;
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while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
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// flush RX FIFO
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USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
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while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
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// no global NAK
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USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
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// ready to receive setup packets
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USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (3 * 8);
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}
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char to_hex_char(int a) {
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if (a < 10) {
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return '0' + a;
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} else {
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return 'a' + (a-10);
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}
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}
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void usb_setup() {
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int i;
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uint8_t resp[0x80];
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// setup packet is ready
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switch (setup.b.bRequest) {
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case USB_REQ_SET_CONFIGURATION:
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// enable other endpoints, has to be here?
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USBx_INEP(1)->DIEPCTL = (0x40 & USB_OTG_DIEPCTL_MPSIZ) | (2 << 18) | (1 << 22) |
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USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DIEPCTL_USBAEP;
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USBx_INEP(1)->DIEPINT = 0xFF;
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USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x40;
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USBx_OUTEP(2)->DOEPCTL = (0x40 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) |
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USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP;
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USBx_OUTEP(2)->DOEPINT = 0xFF;
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USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
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USBx_OUTEP(3)->DOEPCTL = (0x40 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) |
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USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP;
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USBx_OUTEP(3)->DOEPINT = 0xFF;
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// mark ready to receive
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USBx_OUTEP(2)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
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USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
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// TODO: is this the right place for this?
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usb_cb_enumeration_complete();
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USB_WritePacket(0, 0, 0);
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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break;
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case USB_REQ_SET_ADDRESS:
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// set now?
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USBx_DEVICE->DCFG |= ((setup.b.wValue.w & 0x7f) << 4);
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#ifdef DEBUG_USB
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puts(" set address\n");
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#endif
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USB_WritePacket(0, 0, 0);
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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break;
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case USB_REQ_GET_DESCRIPTOR:
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switch (setup.b.wValue.bw.lsb) {
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case USB_DESC_TYPE_DEVICE:
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//puts(" writing device descriptor\n");
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// setup transfer
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USB_WritePacket(device_desc, min(sizeof(device_desc), setup.b.wLength.w), 0);
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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//puts("D");
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break;
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case USB_DESC_TYPE_CONFIGURATION:
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USB_WritePacket(configuration_desc, min(sizeof(configuration_desc), setup.b.wLength.w), 0);
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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break;
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case USB_DESC_TYPE_STRING:
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switch (setup.b.wValue.bw.msb) {
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case 0:
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USB_WritePacket(string_0_desc, min(sizeof(string_0_desc), setup.b.wLength.w), 0);
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break;
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case 1:
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USB_WritePacket(string_1_desc, min(sizeof(string_1_desc), setup.b.wLength.w), 0);
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break;
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case 2:
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USB_WritePacket(string_2_desc, min(sizeof(string_2_desc), setup.b.wLength.w), 0);
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break;
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case 3:
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#ifdef PANDA
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resp[0] = 0x02 + 12*4;
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resp[1] = 0x03;
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// 96 bits = 12 bytes
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for (i = 0; i < 12; i++){
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uint8_t cc = ((uint8_t *)UID_BASE)[i];
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resp[2 + i*4 + 0] = to_hex_char((cc>>4)&0xF);
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resp[2 + i*4 + 1] = '\0';
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resp[2 + i*4 + 2] = to_hex_char((cc>>0)&0xF);
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resp[2 + i*4 + 3] = '\0';
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}
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USB_WritePacket(resp, min(resp[0], setup.b.wLength.w), 0);
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#else
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USB_WritePacket(string_3_desc, min(sizeof(string_3_desc), setup.b.wLength.w), 0);
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#endif
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break;
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default:
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// nothing
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USB_WritePacket(0, 0, 0);
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break;
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}
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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break;
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default:
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// nothing here?
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USB_WritePacket(0, 0, 0);
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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break;
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}
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break;
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case USB_REQ_GET_STATUS:
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// empty resp?
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resp[0] = 0;
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resp[1] = 0;
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USB_WritePacket((void*)&resp, 2, 0);
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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break;
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default:
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usb_cb_control_msg();
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}
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}
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void usb_init() {
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// full speed PHY, do reset and remove power down
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puth(USBx->GRSTCTL);
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puts(" resetting PHY\n");
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while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
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puts("AHB idle\n");
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// reset PHY here
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USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
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while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
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puts("reset done\n");
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// internal PHY, force device mode
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USBx->GUSBCFG = USB_OTG_GUSBCFG_PHYSEL | USB_OTG_GUSBCFG_FDMOD;
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// slowest timings
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USBx->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
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// power up the PHY
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#ifdef STM32F4
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USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
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//USBx->GCCFG |= USB_OTG_GCCFG_VBDEN | USB_OTG_GCCFG_SDEN |USB_OTG_GCCFG_PDEN | USB_OTG_GCCFG_DCDEN;
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/* B-peripheral session valid override enable*/
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USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
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USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
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#else
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USBx->GCCFG = USB_OTG_GCCFG_PWRDWN | USB_OTG_GCCFG_NOVBUSSENS;
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#endif
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// be a device, slowest timings
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//USBx->GUSBCFG = USB_OTG_GUSBCFG_FDMOD | USB_OTG_GUSBCFG_PHYSEL | USB_OTG_GUSBCFG_TRDT | USB_OTG_GUSBCFG_TOCAL;
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//USBx->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
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//USBx->GUSBCFG = USB_OTG_GUSBCFG_PHYSEL | USB_OTG_GUSBCFG_TRDT | USB_OTG_GUSBCFG_TOCAL;
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// **** for debugging, doesn't seem to work ****
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//USBx->GUSBCFG |= USB_OTG_GUSBCFG_CTXPKT;
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// reset PHY clock
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USBx_PCGCCTL = 0;
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// enable the fancy OTG things
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// DCFG_FRAME_INTERVAL_80 is 0
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//USBx->GUSBCFG |= USB_OTG_GUSBCFG_HNPCAP | USB_OTG_GUSBCFG_SRPCAP;
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USBx_DEVICE->DCFG |= USB_OTG_SPEED_FULL | USB_OTG_DCFG_NZLSOHSK;
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//USBx_DEVICE->DCFG = USB_OTG_DCFG_NZLSOHSK | USB_OTG_DCFG_DSPD;
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//USBx_DEVICE->DCFG = USB_OTG_DCFG_DSPD;
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// clear pending interrupts
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USBx->GINTSTS = 0xBFFFFFFFU;
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// setup USB interrupts
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// all interrupts except TXFIFO EMPTY
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//USBx->GINTMSK = 0xFFFFFFFF & ~(USB_OTG_GINTMSK_NPTXFEM | USB_OTG_GINTMSK_PTXFEM | USB_OTG_GINTSTS_SOF | USB_OTG_GINTSTS_EOPF);
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//USBx->GINTMSK = 0xFFFFFFFF & ~(USB_OTG_GINTMSK_NPTXFEM | USB_OTG_GINTMSK_PTXFEM);
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USBx->GINTMSK = USB_OTG_GINTMSK_USBRST | USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_OTGINT |
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USB_OTG_GINTMSK_RXFLVLM | USB_OTG_GINTMSK_GONAKEFFM | USB_OTG_GINTMSK_GINAKEFFM |
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USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IEPINT | USB_OTG_GINTMSK_USBSUSPM |
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USB_OTG_GINTMSK_CIDSCHGM | USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_MMISM;
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USBx->GAHBCFG = USB_OTG_GAHBCFG_GINT;
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// DCTL startup value is 2 on new chip, 0 on old chip
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// THIS IS FUCKING BULLSHIT
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USBx_DEVICE->DCTL = 0;
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}
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// ***************************** USB port *****************************
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void usb_irqhandler(void) {
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//USBx->GINTMSK = 0;
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unsigned int gintsts = USBx->GINTSTS;
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unsigned int gotgint = USBx->GOTGINT;
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unsigned int daint = USBx_DEVICE->DAINT;
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// gintsts SUSPEND? 04008428
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#ifdef DEBUG_USB
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puth(gintsts);
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puts(" ");
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/*puth(USBx->GCCFG);
|
|
puts(" ");*/
|
|
puth(gotgint);
|
|
puts(" ep ");
|
|
puth(daint);
|
|
puts(" USB interrupt!\n");
|
|
#endif
|
|
|
|
if (gintsts & USB_OTG_GINTSTS_CIDSCHG) {
|
|
puts("connector ID status change\n");
|
|
}
|
|
|
|
if (gintsts & USB_OTG_GINTSTS_ESUSP) {
|
|
puts("ESUSP detected\n");
|
|
}
|
|
|
|
if (gintsts & USB_OTG_GINTSTS_USBRST) {
|
|
puts("USB reset\n");
|
|
usb_reset();
|
|
}
|
|
|
|
if (gintsts & USB_OTG_GINTSTS_ENUMDNE) {
|
|
puts("enumeration done ");
|
|
// Full speed, ENUMSPD
|
|
puth(USBx_DEVICE->DSTS);
|
|
puts("\n");
|
|
}
|
|
|
|
if (gintsts & USB_OTG_GINTSTS_OTGINT) {
|
|
puts("OTG int:");
|
|
puth(USBx->GOTGINT);
|
|
puts("\n");
|
|
|
|
// getting ADTOCHG
|
|
//USBx->GOTGINT = USBx->GOTGINT;
|
|
}
|
|
|
|
// RX FIFO first
|
|
if (gintsts & USB_OTG_GINTSTS_RXFLVL) {
|
|
// 1. Read the Receive status pop register
|
|
volatile unsigned int rxst = USBx->GRXSTSP;
|
|
|
|
#ifdef DEBUG_USB
|
|
puts(" RX FIFO:");
|
|
puth(rxst);
|
|
puts(" status: ");
|
|
puth((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17);
|
|
puts(" len: ");
|
|
puth((rxst & USB_OTG_GRXSTSP_BCNT) >> 4);
|
|
puts("\n");
|
|
#endif
|
|
|
|
|
|
if (((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) {
|
|
int endpoint = (rxst & USB_OTG_GRXSTSP_EPNUM);
|
|
int len = (rxst & USB_OTG_GRXSTSP_BCNT) >> 4;
|
|
USB_ReadPacket(&usbdata, len);
|
|
#ifdef DEBUG_USB
|
|
puts(" data ");
|
|
puth(len);
|
|
puts("\n");
|
|
hexdump(&usbdata, len);
|
|
#endif
|
|
|
|
if (endpoint == 2) {
|
|
usb_cb_ep2_out(usbdata, len);
|
|
}
|
|
|
|
if (endpoint == 3) {
|
|
usb_cb_ep3_out(usbdata, len);
|
|
}
|
|
} else if (((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) {
|
|
USB_ReadPacket(&setup, 8);
|
|
#ifdef DEBUG_USB
|
|
puts(" setup ");
|
|
hexdump(&setup, 8);
|
|
puts("\n");
|
|
#endif
|
|
}
|
|
}
|
|
|
|
/*if (gintsts & USB_OTG_GINTSTS_HPRTINT) {
|
|
// host
|
|
puts("HPRT:");
|
|
puth(USBx_HOST_PORT->HPRT);
|
|
puts("\n");
|
|
if (USBx_HOST_PORT->HPRT & USB_OTG_HPRT_PCDET) {
|
|
USBx_HOST_PORT->HPRT |= USB_OTG_HPRT_PRST;
|
|
USBx_HOST_PORT->HPRT |= USB_OTG_HPRT_PCDET;
|
|
}
|
|
|
|
}*/
|
|
|
|
if ((gintsts & USB_OTG_GINTSTS_BOUTNAKEFF) || (gintsts & USB_OTG_GINTSTS_GINAKEFF)) {
|
|
// no global NAK, why is this getting set?
|
|
#ifdef DEBUG_USB
|
|
puts("GLOBAL NAK\n");
|
|
#endif
|
|
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK | USB_OTG_DCTL_CGINAK;
|
|
}
|
|
|
|
if (gintsts & USB_OTG_GINTSTS_SRQINT) {
|
|
// we want to do "A-device host negotiation protocol" since we are the A-device
|
|
puts("start request\n");
|
|
puth(USBx->GOTGCTL);
|
|
puts("\n");
|
|
//USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
|
|
//USBx_HOST_PORT->HPRT = USB_OTG_HPRT_PPWR | USB_OTG_HPRT_PENA;
|
|
//USBx->GOTGCTL |= USB_OTG_GOTGCTL_SRQ;
|
|
}
|
|
|
|
// out endpoint hit
|
|
if (gintsts & USB_OTG_GINTSTS_OEPINT) {
|
|
#ifdef DEBUG_USB
|
|
puts(" 0:");
|
|
puth(USBx_OUTEP(0)->DOEPINT);
|
|
puts(" 2:");
|
|
puth(USBx_OUTEP(2)->DOEPINT);
|
|
puts(" 3:");
|
|
puth(USBx_OUTEP(3)->DOEPINT);
|
|
puts(" ");
|
|
puth(USBx_OUTEP(3)->DOEPCTL);
|
|
puts(" 4:");
|
|
puth(USBx_OUTEP(4)->DOEPINT);
|
|
puts(" OUT ENDPOINT\n");
|
|
#endif
|
|
|
|
if (USBx_OUTEP(2)->DOEPINT & USB_OTG_DOEPINT_XFRC) {
|
|
#ifdef DEBUG_USB
|
|
puts(" OUT2 PACKET XFRC\n");
|
|
#endif
|
|
USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x40;
|
|
USBx_OUTEP(2)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
|
|
}
|
|
|
|
if (USBx_OUTEP(3)->DOEPINT & USB_OTG_DOEPINT_XFRC) {
|
|
#ifdef DEBUG_USB
|
|
puts(" OUT3 PACKET XFRC\n");
|
|
#endif
|
|
USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
|
|
USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
|
|
} else if (USBx_OUTEP(3)->DOEPINT & 0x2000) {
|
|
#ifdef DEBUG_USB
|
|
puts(" OUT3 PACKET WTF\n");
|
|
#endif
|
|
// if NAK was set trigger this, unknown interrupt
|
|
USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
|
|
USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
|
|
} else if (USBx_OUTEP(3)->DOEPINT) {
|
|
puts("OUTEP3 error ");
|
|
puth(USBx_OUTEP(3)->DOEPINT);
|
|
puts("\n");
|
|
}
|
|
|
|
if (USBx_OUTEP(0)->DOEPINT & USB_OTG_DIEPINT_XFRC) {
|
|
// ready for next packet
|
|
USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (1 * 8);
|
|
}
|
|
|
|
// respond to setup packets
|
|
if (USBx_OUTEP(0)->DOEPINT & USB_OTG_DOEPINT_STUP) {
|
|
usb_setup();
|
|
}
|
|
|
|
USBx_OUTEP(0)->DOEPINT = USBx_OUTEP(0)->DOEPINT;
|
|
USBx_OUTEP(2)->DOEPINT = USBx_OUTEP(2)->DOEPINT;
|
|
USBx_OUTEP(3)->DOEPINT = USBx_OUTEP(3)->DOEPINT;
|
|
}
|
|
|
|
|
|
// in endpoint hit
|
|
if (gintsts & USB_OTG_GINTSTS_IEPINT) {
|
|
#ifdef DEBUG_USB
|
|
puts(" ");
|
|
puth(USBx_INEP(0)->DIEPINT);
|
|
puts(" ");
|
|
puth(USBx_INEP(1)->DIEPINT);
|
|
puts(" IN ENDPOINT\n");
|
|
#endif
|
|
|
|
// this happens first
|
|
if (USBx_INEP(1)->DIEPINT & USB_OTG_DIEPINT_XFRC) {
|
|
#ifdef DEBUG_USB
|
|
puts(" IN PACKET SEND\n");
|
|
#endif
|
|
//USBx_DEVICE->DIEPEMPMSK = ~(1 << 1);
|
|
}
|
|
|
|
// *** IN token received when TxFIFO is empty
|
|
if (USBx_INEP(1)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) {
|
|
#ifdef DEBUG_USB
|
|
puts(" IN PACKET QUEUE\n");
|
|
#endif
|
|
// TODO: always assuming max len, can we get the length?
|
|
usb_cb_ep1_in(0x40);
|
|
}
|
|
|
|
// clear interrupts
|
|
USBx_INEP(0)->DIEPINT = USBx_INEP(0)->DIEPINT;
|
|
USBx_INEP(1)->DIEPINT = USBx_INEP(1)->DIEPINT;
|
|
}
|
|
|
|
|
|
// clear all interrupts we handled
|
|
USBx_DEVICE->DAINT = daint;
|
|
USBx->GOTGINT = gotgint;
|
|
USBx->GINTSTS = gintsts;
|
|
|
|
//USBx->GINTMSK = 0xFFFFFFFF & ~(USB_OTG_GINTMSK_NPTXFEM | USB_OTG_GINTMSK_PTXFEM | USB_OTG_GINTSTS_SOF | USB_OTG_GINTSTS_EOPF);
|
|
}
|
|
|