diff --git a/docs/Embedded Engineering Making Opensource USB C industrial camera with Interchangeable C mount lens, Interchangeable MIPI Sensor with Lattice Crosslink NX FPGA and Cypress FX3 USB 3.0 controller.html b/docs/Embedded Engineering Making Opensource USB C industrial camera with Interchangeable C mount lens, Interchangeable MIPI Sensor with Lattice Crosslink NX FPGA and Cypress FX3 USB 3.0 controller.html
new file mode 100644
index 0000000..ab1086a
--- /dev/null
+++ b/docs/Embedded Engineering Making Opensource USB C industrial camera with Interchangeable C mount lens, Interchangeable MIPI Sensor with Lattice Crosslink NX FPGA and Cypress FX3 USB 3.0 controller.html
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Absolutely interesting! Very good job! Thanks for share!!
ReplyDeleteVery Impressive!
ReplyDeleteHi !
ReplyDeleteThe project is super !
Is it possible to add an imx335 industrial sensor to the project ?
IMX335 + is also MIPI CSI sensor, So it can be added, I just did a quick search +and found sensor itself is not available for purchase but you can buy +IMX335 based cameras pretty cheap and get camera sensor out of it. Yes +you can have IMX335 As long as you have sensor and Sensor PCB for it.
DeleteAny intentions to support any of the global shutter IMX modules?
ReplyDeleteThere noting special need to be done to support any new MIPI sensor.
DeleteAs + long as i could lay my hand on the sensor or even Raspberry Pi style +camera module. I could integrate driver into USB part and its done.
Do you have any suggestion of any easily available sensor?
DeleteExcellent,Is it possible to scale for other Humidity, measuring and texture and servo motor control sensors?
ReplyDeleteDo you have any specific part number in mind, I assume Humidity sensor would not generate enough data to justify use of an FPGA
DeleteI haven't any idea about parts .
ReplyDeleteBut our target is to building of hyperspectral cameras the near-infrared
- 900 – 1700 nm
-SWIR (1000 – 2500 nm)
- (2700 – 5300 nm) spectral range .
These wavelengths are part of the thermal range, so-called MWIR.
the + targets’ chemical composition for analysis, or detect moisture or +foreign objects in the target. For instance, it should can be used to +detect the sugar level on berries or potatoes or moisture percentage on +baked goods, or to identify different plastic types for recycling.
Please advice.
Sorry + for delayed response, I Have few questions before i could possible +answer your question. Is this near infrared camera sensor a normal +camera sensor with specif filters or specific filters removed a normal +camera sensor?
Deleteit is normal camera sensor then you do not need to do much.
But + if it is special camera sensor but has MIPI CSI 2 as interface and Does + output mipi RAW style format, then also you can pretty much use design +as it.
But if you have special camera with LVDS, Parallel or SLVS-EC then you need some modification to hardware and software.
If you are talking about specific solutions then you have to talk about what exactly you are dealing with.
Holy + Sh*t... this is incredible. You should seriously write a book for +serious hobbyist to build such advanced cameras from scratch as like +what you have did.
ReplyDeleteWould like to congratulate you for such remarkable DIY camera build you made.
I + have been searching on google for tutorials on how to build cameras +from scratch and couldn't find any. Luckily I found this tutorial.
Thanks for this great DIY documentation.
Hi ,
ReplyDeleteCan i ask one thing? Sorry i am not familiar with fpeg.So my question may sound silly...
+ Why you don't consider cypress cx3? Using cx3 as bridge and connect +with sensor via 4 lane. Is it more easily to archive then your way?
Why you need FPGA and cypress-fx? It is more difficult to study and make thing goes well as i think…
And cognation! good work.
My company is producting ccm camera and usb camera/
Current our compnay is using other company's product to test mipi 4 lane sensor. It’s bandwidth is 2.5Gs/s.
+ I ask because my boss want us survey how to build our own tester for +saving money and for me, I can learn skill which is fun fo me.
So i have 3 opions , I do not know which is beter, can you give me some advice?
1 jetson nano/rpi cm4 + sensor transfer board + custermor sensor board.
: Mipi protocol + usb protocol+ linux driver + open source mipi 2 lane codes(I can not found 4 lane source code for now)
2 cypress cx3 + sensor transfer board + customer sensor board.
: Mipi protocol + usb protocol + cypress sdk
3. Like your demo
Lattice Crosslink NX FPGA+ Cypress FX3 USB 3.0+ sensor transfer board + customer sensor board.
: Mipi protocol + usb protocol + FPGA+ cypress sdk
Thanks in advance
Terry
Primary + difference between FX3 and CX3 in this application would be, Solution +FX3 + FPGA will not need any custom application at the PC side. Solution + with FX3 implements standard UVC device. As UVC does not support RAW or + RGB so solution with CX3 would need to implement a custom +application/driver solution on the PC side. As almost all of the MIPI +CSI-2 Camera only output RAW bayer. RAW bayer need to be converted to +useable format before anything can be done with it.
DeleteAll three possible solution have few limitations and also few advantages.
1. + With Jetson or RPI , Easy to make will be for sure, Why would really +need all 4 Lanes? 4 Lanes "May" give just few more FPS. a custom Jetson +board will support 4 Lanes camera, Or a Raspberry Pi module also support + 4 Lane camera. Latency may be an issue depending on how you using it +and also because image has to go throw whole Linux ISP.
2. +Cypress CX3, Will need custom driver and/or custom application on the +PC/USB host side. If you are under windows getting driver signed and +even driver development on windows may not be as fast.
3. Has +really good latency, Cost is high but still less than a Linux SBC, Has +few limitation with Image quality and corrections.
Regards
Hello,
DeleteThanks + for your replay. We need 4 lane jig because our customer need 4 lane. +and In our firmware engineer said, if we want use 2 lane to archive the + same fps as 4 lane. The clock must be higher twice clock rate more then + 4 lane. It is easier to cause problem.
And Currently I think +Way 3 is more good for us. Beause the mipi bandwidth. Currently Our +customer use 16m 30fps. I think in the future they will use more +bandwidth(Maybe 20M or 32M 30fps).
Lattice CrossLink-NX is 2.5g per lane. Cypress Fx3 is 5g/s. In the future, we can use Sx3 to get 20g/s.
Terry
Hello ,
ReplyDeleteanother question:how to build your lattice crosslink nx ffpeg firmware?
Is it using lattice diamond software? I ask become i can not find project .only .v verilog file..
Thanks in advance
Terry
Lattice + Crosslink nx are supported by Lattice Radiant software, Not by Diamond, + You need to create a lattice radiant project, Chose target device, Add +all v files and also from Lattice Specific folder under src all IP v +files then, implement
DeleteHello,
ReplyDeleteMy + goal is try to use your project and try to understand. If I use your +project and try to light another mipi 4 lane sensor(like ov13b10 , or +ar1335 just for example, is it very difficult?
I use Lattice +Radiant , Create a project(Terry_test_crosslink_nx) ,and Use your +src/*.v and Lattice_specific/*.v, I Choose LIFCL(CrossLink-NX) ,(I guess + from your pic.) and Run All. And it seems work without Error but +warning. And when I click Netlist Analyzer some thing think schematic +shows.
How do I know the output is ready? What is the ouput of +FPGA. Sorry I ask the silly problem...Is it +Terry_test_crosslink_nx_impl_1.ibs? I found it in IBIS directory.
If + I can produce the FPGA code, and cypress fx3 code, next stage is try to + make our hardware to see your Hardware and try to make one for test +purpose.
My boss told me it is very difficult for me cause I am +not fpga Engineer, I said I want to use your project code and try to +adjust it. Also FPGA have ip,I know I am beginner in FPGA, but I think +it is possible for me to change your code for our customer ccm +boad.(With vcm possible), and write cypress firmware . For PC write AP +use UVC extension to issue I2c and get raw data from fx3 and fpga .
I + am not FPGA programmer, I have only a little Hardware background( Nmos, + Pmos, PNP, adc,capacity a little knowledge) I use Stm32 and pico in the + past as Jig, use I2c to commute with Our Lighsensor / Hall sensor and +to test it in producing line. Also some knowleage of linux driver.(I +use open uvc linux driver and change it for our customer module about 5 +years, I can only modify it, I can not write my own uvc linux driver by +myself.)
I am a software Engineer for about 20 years., my main +focus is c/c++/ OpenCV / Microsoft MFC/algorithm, I graduate at +Mathematic degree and got Computer Science master degree. So my hardware + is weak. Currently I study MIP/PHY spec and USB spec for this purpose. +Also try to learn Verilog . I like to study. That is why I am willing to + tough this area. The question is if I will take too much time to +archive.. My boss won’t got happy if I need one year or longer to do it : + )
Terry
You would have bit file as output. That file can be programmed on FPGA.
DeleteI + have an old project published which uses Off the self development +boards, One from lattice mach XO3, another one Cypress FX3 USB board. If + I am starting I would use that to begin with.
Hello,
ReplyDelete1. Can i ask one thing, if i want bought sensor/ FPGA /fx board from you. Do you have this product for sale?
+ 2. How can i burn FPGA in your board? I know i can burn FPGA from usb +or jtag if i buy lattice crosslink NX demo board. But i do not know how +to burn FPGA code if from your FPGA board.
3.I plain to make +our hardware product from your Gerber, But i am afraid some thing will +go wrong. That's why i want buy product from your side directly. And +when i have ability to understand your code. I will make our hardware +product from your Gerber and schematic.
4. We ask lattice agent + in Taiwan. They said the MIPI IP need 5000 license fee. Yet i can test +for 4 hour each time. It is enough for me. Is it also the same in your +board?
5. I try to search FPGA + usb 3.0 solution. Currently +only your poject can do it, that is why i am urgent to look for your +help.
6. Please correct me if i am wrong cause i am a beginner in FPGA...
Thanks in advance.
Terry
1. Depending on your use, I may have few boards left.
Delete2. + There is Flash memory on the board, Once firmware is flashed you do not + need any programmer, To reprogram you would need any FT2232H cable, I +have used busblaster and few other generic FT2232H board.
3. You can + possibly order board and try to solder them self. You would need to +take a little care with as board has Large Fine pitch BGA.
4. I do +not use any IP from Lattice that need any fee. I use dphy IP as without +using it you just can not use hard DPHY of crosslink nx. That IP is +free, It is just basic building block. You can even avoid using that if +needed to.
6. It is some what complicated project for beginner to approach, I hope you can understand.
Regards
Hello,
ReplyDeleteSorry for the late response. And thank for your kindly response! I see your message 9/26 and I am not prepare to response.
1. Can you provide the link how i can buy it?
+ 2. If buying is not available, how do our hardware product the same +product with you? i am not sure github resource is enough cause I am +software engineer.
Does anything hardware engineer need take care?
For example, i notice your mount is build by 3d print, so we need ask if our Mechanical Engineer can use it directly.
3. This week spend some time on the Lattice Radiant 3.0 Tutorial with
CrossLink-NX (LIFCL)
+ And Read a book by Blaine realder: Verilog by example.( +https://www.amazon.com/Verilog-Example-Concise-Introduction-Design/dp/0983497303)
I am not finishing yet. I think it will cost me 2-3 weeks.(I have 3 job responsibility currently... :()
+ Now I have some knowledge about FPGA Verilog progamming. I can run +sample project form Radiaint and run simulation(ModelSilm) in it.
After I am done, I will try to understand the code you do it on the github.
4. I also study the lattice product. The taiwaint lattice agent said
+ They have Sony Imx169(CSI2-to-Parallel Bridge Board) +(https://www.latticesemi.com/csi2bridge) which have .v source code and +can use in
crosslink nx evaluation board +(https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/CrossLink-NXEvaluationBoard)and +
Lattice USB 3.0 Video Bridging Solution.Is that okay for me to +study? I think if the lattice have solution, and they have sdk so i can + buy their product and study by myself.
6. If i bough your +product, and i don't want bother you too much. It is your nice character + to share your open project, it is rough for me to keep bother you if i +do not prepare well.
I need study by myself. That's why if i can +study lattice demo board and cs2 camera withy .v source, more chance i +will study.
7.I have cypress cx3 demo board(from econ system: +https://www.e-consystems.com/CX3-Reference-Design-Kit.asp), so i have +some experience in cypress EZ-USB Suit,
i will buy cypress fx3 demo +board(https://www.infineon.com/cms/en/product/evaluation-boards/cyusb3kit-003/) + for study when i am ready.
ps. Can i send mail to you? Or you + prefer i leave message here. Maill can send picture, it is more easily +to describe my words.(My English is not good)
Regards
Terry
This comment has been removed by the author.
ReplyDeleteHello,
ReplyDeleteMy + hardware view your schematic and tell me . He think he can product the +same layout with you. And if i want him to start working(after convince +my boss),
he can make his own layout. (Without change your pin defines.)
He + said if i bought your board. FOr him it will have problem , cause he +need solder the board by himself. So he prefer to make his schematic +and make PCB engineer draw another Gerber. Buy chip from Taiwan agent. +And make PCB company to SMT it by factory.(The cost is about 1000us for +PCB and 700 us fir SMT)
So, it is no need to buy your board. And I am sorry if you spend time on preparing.
One more thing, we check your mipi schematic, you use DPHY1 to connect sensor, DPHY 0 is no usage, ist that right?
And if we directly use your schematic, then we can not use Hard Dphy of crosslink, is that right?
Right + now i am still learn FPGA , studying Lattice solution. I cannot found +the Offical ccm camera supported by crosslink evolution board. It is +stranger.. Maybe i will write a letter on lattice to see if they can +help me.
Current I write some sample code on Radiant, I write +some simple Verilog module(like 32 bit counter, two bit ADDER with +carrier), write a test bench, Run it with ModelSim. And I know the FPGA +ouput is *.ibs file.
Next step is survey the EV board I need and buy it and Test on it.
It is fun for me. But I do not want my boss wait me too long
Thanks
Terry
Good that things worked out for you. There are two DPHY on FPGA , I use DPHY1 Because in PCB layout it was easy to route them.
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ReplyDeleteHello,
ReplyDelete+ it's me again. Can you help with those question? I want spend time +study your project. For better understanding how to write mipi fpga +code!
My questions:
1. What is your top module in radiant? Or it do not matter?
2. you mention mipi ip dphy IP is free, does it have website to state how to use?
3. i see codes is in radiant 2.0. I am using radiant 3.2 does it matter?
I buy 1.lattice Embedded Vision Development Kit (crosslink+ ecp5 + fx3)
It has source code. i will study after those kit arrive my company.
2. cypress CYUSB3KIT-004( crosslink + sx3) .
for studying. But CYUSB3KIT-004 do not provide source code! only bitstream and sx3 bin file...
So maybe i need write my cross link fpga code and use sx3 binary in the furture..
This month i read 2 verilog book(Chinese book). And run exmple codes.
Currently i try to solve problem in HDLBits https://hdlbits.01xz.net/wiki/Main_Page.
Now i know some knowledge about RTL. Gate level / switch level. and know fpga use lut to implementGate level view.
Also know the fpga have 3 main area:
Combinational Logic Design
Sequential Logic Design
Fine State Machine
Also the blocking/nonblocking assignment
Metastability/glitch problem
Yet i am still a beginner in fpga :p
Also I am reading some book: (Still progress slowly. My English is not good)
Vaibbhav Taraate - ASIC Design and Synthesis. RTL Design Using Verilog-Springer (2021)
Brock J. LaMeres - Introduction to Logic Circuits & Logic Design with Verilog-Springer International Publishing (2019)
Weste, Neil H E_Harris, David Money - CMOS VLSI Design_ A Circuits and Systems Perspective (2010, Addison-Wesley)
FPGA is interesting for me. Hope me can enjoy the fpga world. Not drop into fpga hell. haha
Thanks in advance
Terry
1. + As you add all the files Top module will be automatically selected, +Just keep Test bench files to be marked for simulation only.
Delete2. Crosslink nx hard mipi phy is a basic building block it is free. datasheet is available net.
3. Use latest version of Radiant.
Can + you provide the exact number of glass to display latency(or a close +approximate)? I read you store upto 4 lines in the memory so the latency + should be less than a frame for 4K or UHD?
ReplyDeleteISP + Pipeline only has delay / latency of 4 line , if you are talking about +4K 60 FPS then each line is about 7.71us then 4 line would be around 30 +us . So after 30 us of frame start my ISP will start producing valid +data on output.
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