Ultimate ECP5 Board. Fork Sand fork of https://github.com/daveshah1/TrellisBoard

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Ivan Olenichev 091f9da8ee Trellis update		2022-01-03 01:17:25 +06:00
gateware	gateware/simple: Demo tweaks	2019-07-04 11:26:40 +01:00
hardware	Trellis update	2022-01-03 01:17:25 +06:00
.gitignore	gitignore LibreOffice temp files	2019-09-09 16:50:21 -06:00
.gitmodules	hardware: Add PKL as git submodule	2018-11-19 15:49:26 +00:00
COPYING	Update README and add license	2019-02-17 18:57:57 +00:00
README.md	update url	2021-12-29 14:34:17 -07:00

Ultimate ECP5 Board

Fork Sand Fork

This is a fork/clone by Fork Sand, Inc. of upstream repo, now upgraded to KiCad 6:

WIP - Rev 1.0 prototypes currently under test...

Largest ECP5; LFE5UM5G-85F
PCIe 2.0 x2 card edge connector on two SERDES channels
Remaining two SERDES channels on M.2 E-key connector
1GByte x32 DDR3L (two x16 chips)
Dedicated HDMI output, using TFP410 serialiser
1000BASE-T GbE connector with RGMII PHY
USB-A 2.0 host connector with ULPI PHY
FT2232H for debug JTAG and UART/FIFO with type-C connector
PCIe, external 12V or USB power input
12 bicolour (tristate) user LEDs, 4 user buttons, 8 user DIP switches
128Mbit QSPI flash for boot and data
microSD card connector
Dual PMOD connector with extra "middle" IO pins
As many remaining IO as possible on high speed FFC connectors with a differential optimised pinout (3x 24 IO). Selectable 1.8V/2.5V/3.3V

PCIe card form factor
At least Ethernet, USB-A, USB type-C power/debug and HDMI out
Other connectors probably would have to be on other sides. FFC connectors probably on top so they can loop over to another card to form a 2-slot card (e.g. with ADCs/DACs for SDR/DAQ)