License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 08:07:57 -06:00
# SPDX-License-Identifier: GPL-2.0
2007-10-25 11:42:04 -06:00
# Unified Makefile for i386 and x86_64
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# select defconfig based on actual architecture
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i f e q ( $( ARCH ) , x 8 6 )
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ifeq ( $( shell uname -m) ,x86_64)
KBUILD_DEFCONFIG := x86_64_defconfig
else
2007-11-12 12:14:19 -07:00
KBUILD_DEFCONFIG := i386_defconfig
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endif
2007-11-12 12:14:19 -07:00
e l s e
KBUILD_DEFCONFIG := $( ARCH) _defconfig
e n d i f
2007-10-25 12:31:19 -06:00
2017-06-21 17:28:05 -06:00
# For gcc stack alignment is specified with -mpreferred-stack-boundary,
# clang has the option -mstack-alignment for that purpose.
i f n e q ( $( call cc -option , -mpreferred -stack -boundary =4) , )
2017-08-16 18:47:40 -06:00
cc_stack_align4 := -mpreferred-stack-boundary= 2
cc_stack_align8 := -mpreferred-stack-boundary= 3
e l s e i f n e q ( $( call cc -option , -mstack -alignment =16) , )
cc_stack_align4 := -mstack-alignment= 4
cc_stack_align8 := -mstack-alignment= 8
2017-06-21 17:28:05 -06:00
e n d i f
2014-01-08 04:21:20 -07:00
# How to compile the 16-bit code. Note we always compile for -march=i386;
# that way we can complain to the user if the CPU is insufficient.
2014-01-29 05:16:47 -07:00
#
# The -m16 option is supported by GCC >= 4.9 and clang >= 3.5. For
2014-06-04 14:16:48 -06:00
# older versions of GCC, include an *assembly* header to make sure that
# gcc doesn't play any games behind our back.
CODE16GCC_CFLAGS := -m32 -Wa,$( srctree) /arch/x86/boot/code16gcc.h
2014-01-29 05:16:47 -07:00
M16_CFLAGS := $( call cc-option, -m16, $( CODE16GCC_CFLAGS) )
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REALMODE_CFLAGS := $( M16_CFLAGS) -g -Os -DDISABLE_BRANCH_PROFILING \
2014-01-08 04:21:20 -07:00
-Wall -Wstrict-prototypes -march= i386 -mregparm= 3 \
-fno-strict-aliasing -fomit-frame-pointer -fno-pic \
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-mno-mmx -mno-sse
REALMODE_CFLAGS += $( call __cc-option, $( CC) , $( REALMODE_CFLAGS) , -ffreestanding)
REALMODE_CFLAGS += $( call __cc-option, $( CC) , $( REALMODE_CFLAGS) , -fno-stack-protector)
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REALMODE_CFLAGS += $( call __cc-option, $( CC) , $( REALMODE_CFLAGS) , -Wno-address-of-packed-member)
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REALMODE_CFLAGS += $( call __cc-option, $( CC) , $( REALMODE_CFLAGS) , $( cc_stack_align4) )
2014-01-08 04:21:20 -07:00
export REALMODE_CFLAGS
2008-01-30 05:32:20 -07:00
# BITS is used as extension for files which are available in a 32 bit
# and a 64 bit version to simplify shared Makefiles.
# e.g.: obj-y += foo_$(BITS).o
export BITS
2007-10-25 11:42:04 -06:00
2013-07-08 10:15:17 -06:00
i f d e f C O N F I G _ X 8 6 _ N E E D _ R E L O C S
2019-04-04 15:40:27 -06:00
LDFLAGS_vmlinux := --emit-relocs --discard-none
2013-07-08 10:15:17 -06:00
e n d i f
2015-07-21 10:27:18 -06:00
#
# Prevent GCC from generating any FP code by mistake.
#
# This must happen before we try the -mpreferred-stack-boundary, see:
#
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53383
#
KBUILD_CFLAGS += -mno-sse -mno-mmx -mno-sse2 -mno-3dnow
KBUILD_CFLAGS += $( call cc-option,-mno-avx,)
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i f e q ( $( CONFIG_X 86_ 32) , y )
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BITS := 32
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UTS_MACHINE := i386
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CHECKFLAGS += -D__i386__
2008-01-30 05:32:20 -07:00
2008-01-30 05:32:23 -07:00
biarch := $( call cc-option,-m32)
KBUILD_AFLAGS += $( biarch)
KBUILD_CFLAGS += $( biarch)
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KBUILD_CFLAGS += -msoft-float -mregparm= 3 -freg-struct-return
2012-08-10 12:49:06 -06:00
# Never want PIC in a 32-bit kernel, prevent breakage with GCC built
# with nonstandard options
KBUILD_CFLAGS += -fno-pic
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# Align the stack to the register width instead of using the default
# alignment of 16 bytes. This reduces stack usage and the number of
# alignment instructions.
2017-08-17 12:20:47 -06:00
KBUILD_CFLAGS += $( call cc-option,$( cc_stack_align4) )
2008-01-30 05:32:20 -07:00
# CPU-specific tuning. Anything which can be shared with UML should go here.
2015-03-27 05:43:36 -06:00
include arch/x86/Makefile_32.cpu
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KBUILD_CFLAGS += $( cflags-y)
# temporary until string.h is fixed
KBUILD_CFLAGS += -ffreestanding
2007-10-25 11:42:04 -06:00
e l s e
2008-01-30 05:32:20 -07:00
BITS := 64
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UTS_MACHINE := x86_64
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CHECKFLAGS += -D__x86_64__
2008-01-30 05:32:20 -07:00
2014-05-07 15:05:52 -06:00
biarch := -m64
2008-01-30 05:32:20 -07:00
KBUILD_AFLAGS += -m64
KBUILD_CFLAGS += -m64
x86: Align jump targets to 1-byte boundaries
The following NOP in a hot function caught my attention:
> 5a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1)
That's a dead NOP that bloats the function a bit, added for the
default 16-byte alignment that GCC applies for jump targets.
I realize that x86 CPU manufacturers recommend 16-byte jump
target alignments (it's in the Intel optimization manual),
to help their relatively narrow decoder prefetch alignment
and uop cache constraints, but the cost of that is very
significant:
text data bss dec filename
12566391 1617840 1089536 15273767 vmlinux.align.16-byte
12224951 1617840 1089536 14932327 vmlinux.align.1-byte
By using 1-byte jump target alignment (i.e. no alignment at all)
we get an almost 3% reduction in kernel size (!) - and a
probably similar reduction in I$ footprint.
Now, the usual justification for jump target alignment is the
following:
- modern decoders tend to have 16-byte (effective) decoder
prefetch windows. (AMD documents it higher but measurements
suggest the effective prefetch window on curretn uarchs is
still around 16 bytes)
- on Intel there's also the uop-cache with cachelines that have
16-byte granularity and limited associativity.
- older x86 uarchs had a penalty for decoder fetches that crossed
16-byte boundaries. These limits are mostly gone from recent
uarchs.
So if a forward jump target is aligned to cacheline boundary then
prefetches will start from a new prefetch-cacheline and there's
higher chance for decoding in fewer steps and packing tightly.
But I think that argument is flawed for typical optimized kernel
code flows: forward jumps often go to 'cold' (uncommon) pieces
of code, and aligning cold code to cache lines does not bring a
lot of advantages (they are uncommon), while it causes
collateral damage:
- their alignment 'spreads out' the cache footprint, it shifts
followup hot code further out
- plus it slows down even 'cold' code that immediately follows 'hot'
code (like in the above case), which could have benefited from the
partial cacheline that comes off the end of hot code.
But even in the cache-hot case the 16 byte alignment brings
disadvantages:
- it spreads out the cache footprint, possibly making the code
fall out of the L1 I$.
- On Intel CPUs, recent microarchitectures have plenty of
uop cache (typically doubling every 3 years) - while the
size of the L1 cache grows much less aggressively. So
workloads are rarely uop cache limited.
The only situation where alignment might matter are tight
loops that could fit into a single 16 byte chunk - but those
are pretty rare in the kernel: if they exist they tend
to be pointer chasing or generic memory ops, which both tend
to be cache miss (or cache allocation) intensive and are not
decoder bandwidth limited.
So the balance of arguments strongly favors packing kernel
instructions tightly versus maximizing for decoder bandwidth:
this patch changes the jump target alignment from 16 bytes
to 1 byte (tightly packed, unaligned).
Acked-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Aswin Chandramouleeswaran <aswin@hp.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Link: http://lkml.kernel.org/r/20150410120846.GA17101@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-04-10 06:08:46 -06:00
# Align jump targets to 1 byte, not the default 16 bytes:
2017-04-13 11:26:09 -06:00
KBUILD_CFLAGS += $( call cc-option,-falign-jumps= 1)
x86: Align jump targets to 1-byte boundaries
The following NOP in a hot function caught my attention:
> 5a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1)
That's a dead NOP that bloats the function a bit, added for the
default 16-byte alignment that GCC applies for jump targets.
I realize that x86 CPU manufacturers recommend 16-byte jump
target alignments (it's in the Intel optimization manual),
to help their relatively narrow decoder prefetch alignment
and uop cache constraints, but the cost of that is very
significant:
text data bss dec filename
12566391 1617840 1089536 15273767 vmlinux.align.16-byte
12224951 1617840 1089536 14932327 vmlinux.align.1-byte
By using 1-byte jump target alignment (i.e. no alignment at all)
we get an almost 3% reduction in kernel size (!) - and a
probably similar reduction in I$ footprint.
Now, the usual justification for jump target alignment is the
following:
- modern decoders tend to have 16-byte (effective) decoder
prefetch windows. (AMD documents it higher but measurements
suggest the effective prefetch window on curretn uarchs is
still around 16 bytes)
- on Intel there's also the uop-cache with cachelines that have
16-byte granularity and limited associativity.
- older x86 uarchs had a penalty for decoder fetches that crossed
16-byte boundaries. These limits are mostly gone from recent
uarchs.
So if a forward jump target is aligned to cacheline boundary then
prefetches will start from a new prefetch-cacheline and there's
higher chance for decoding in fewer steps and packing tightly.
But I think that argument is flawed for typical optimized kernel
code flows: forward jumps often go to 'cold' (uncommon) pieces
of code, and aligning cold code to cache lines does not bring a
lot of advantages (they are uncommon), while it causes
collateral damage:
- their alignment 'spreads out' the cache footprint, it shifts
followup hot code further out
- plus it slows down even 'cold' code that immediately follows 'hot'
code (like in the above case), which could have benefited from the
partial cacheline that comes off the end of hot code.
But even in the cache-hot case the 16 byte alignment brings
disadvantages:
- it spreads out the cache footprint, possibly making the code
fall out of the L1 I$.
- On Intel CPUs, recent microarchitectures have plenty of
uop cache (typically doubling every 3 years) - while the
size of the L1 cache grows much less aggressively. So
workloads are rarely uop cache limited.
The only situation where alignment might matter are tight
loops that could fit into a single 16 byte chunk - but those
are pretty rare in the kernel: if they exist they tend
to be pointer chasing or generic memory ops, which both tend
to be cache miss (or cache allocation) intensive and are not
decoder bandwidth limited.
So the balance of arguments strongly favors packing kernel
instructions tightly versus maximizing for decoder bandwidth:
this patch changes the jump target alignment from 16 bytes
to 1 byte (tightly packed, unaligned).
Acked-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Aswin Chandramouleeswaran <aswin@hp.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Link: http://lkml.kernel.org/r/20150410120846.GA17101@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-04-10 06:08:46 -06:00
2015-05-16 23:56:54 -06:00
# Pack loops tightly as well:
2017-04-13 11:26:09 -06:00
KBUILD_CFLAGS += $( call cc-option,-falign-loops= 1)
2015-05-16 23:56:54 -06:00
2014-09-10 10:05:39 -06:00
# Don't autogenerate traditional x87 instructions
2014-04-21 23:40:27 -06:00
KBUILD_CFLAGS += $( call cc-option,-mno-80387)
KBUILD_CFLAGS += $( call cc-option,-mno-fp-ret-in-387)
2013-11-20 14:31:49 -07:00
2017-06-21 17:28:05 -06:00
# By default gcc and clang use a stack alignment of 16 bytes for x86.
# However the standard kernel entry on x86-64 leaves the stack on an
# 8-byte boundary. If the compiler isn't informed about the actual
# alignment it will generate extra alignment instructions for the
# default alignment which keep the stack *mis*aligned.
# Furthermore an alignment to the register width reduces stack usage
# and the number of alignment instructions.
2017-08-17 12:20:47 -06:00
KBUILD_CFLAGS += $( call cc-option,$( cc_stack_align8) )
2012-05-29 15:31:23 -06:00
2014-12-17 19:05:29 -07:00
# Use -mskip-rax-setup if supported.
KBUILD_CFLAGS += $( call cc-option,-mskip-rax-setup)
2008-01-30 05:32:20 -07:00
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
cflags-$( CONFIG_MK8) += $( call cc-option,-march= k8)
cflags-$( CONFIG_MPSC) += $( call cc-option,-march= nocona)
cflags-$( CONFIG_MCORE2) += \
$( call cc-option,-march= core2,$( call cc-option,-mtune= generic) )
2009-08-21 15:06:23 -06:00
cflags-$( CONFIG_MATOM) += $( call cc-option,-march= atom) \
$( call cc-option,-mtune= atom,$( call cc-option,-mtune= generic) )
2008-01-30 05:32:20 -07:00
cflags-$( CONFIG_GENERIC_CPU) += $( call cc-option,-mtune= generic)
KBUILD_CFLAGS += $( cflags-y)
KBUILD_CFLAGS += -mno-red-zone
KBUILD_CFLAGS += -mcmodel= kernel
2009-02-09 06:17:39 -07:00
e n d i f
2008-01-30 05:32:20 -07:00
2012-02-27 15:09:10 -07:00
i f d e f C O N F I G _ X 8 6 _ X 3 2
x32_ld_ok := $( call try-run,\
/bin/echo -e '1: .quad 1b' | \
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$( CC) $( KBUILD_AFLAGS) -c -x assembler -o " $$ TMP " - && \
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$( OBJCOPY) -O elf32-x86-64 " $$ TMP " " $$ TMPO " && \
$( LD) -m elf32_x86_64 " $$ TMPO " -o " $$ TMP " ,y,n)
2012-02-28 02:35:06 -07:00
ifeq ( $( x32_ld_ok) ,y)
CONFIG_X86_X32_ABI := y
KBUILD_AFLAGS += -DCONFIG_X86_X32_ABI
KBUILD_CFLAGS += -DCONFIG_X86_X32_ABI
else
$( warning CONFIG_X86_X32 enabled but no binutils support)
endif
2012-02-27 15:09:10 -07:00
e n d i f
export CONFIG_X86_X32_ABI
2017-03-16 13:31:33 -06:00
#
# If the function graph tracer is used with mcount instead of fentry,
# '-maccumulate-outgoing-args' is needed to prevent a GCC bug
# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=42109)
#
i f d e f C O N F I G _ F U N C T I O N _ G R A P H _ T R A C E R
ifndef CONFIG_HAVE_FENTRY
ACCUMULATE_OUTGOING_ARGS := 1
else
ifeq ( $( call cc-option-yn, -mfentry) , n)
ACCUMULATE_OUTGOING_ARGS := 1
2017-04-18 15:44:29 -06:00
# GCC ignores '-maccumulate-outgoing-args' when used with '-Os'.
# If '-Os' is enabled, disable it and print a warning.
ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
undefine CONFIG_CC_OPTIMIZE_FOR_SIZE
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$( warning Disabling CONFIG_CC_OPTIMIZE_FOR_SIZE. Your compiler does not have -mfentry so you cannot optimize for size with CONFIG_FUNCTION_GRAPH_TRACER.)
2017-04-18 15:44:29 -06:00
endif
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endif
endif
e n d i f
i f e q ( $( ACCUMULATE_OUTGOING_ARGS ) , 1 )
2017-05-08 21:29:46 -06:00
# This compiler flag is not supported by Clang:
KBUILD_CFLAGS += $( call cc-option,-maccumulate-outgoing-args,)
2017-03-16 13:31:33 -06:00
e n d i f
2008-01-30 05:32:20 -07:00
# Stackpointer is addressed different for 32 bit and 64 bit x86
sp-$(CONFIG_X86_32) := esp
sp-$(CONFIG_X86_64) := rsp
2015-10-05 18:47:57 -06:00
# do binutils support CFI?
cfi := $( call as-instr,.cfi_startproc\n .cfi_rel_offset $( sp-y) $( comma) 0\n .cfi_endproc,-DCONFIG_AS_CFI= 1)
# is .cfi_signal_frame supported too?
cfi-sigframe := $( call as-instr,.cfi_startproc\n .cfi_signal_frame\n .cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME= 1)
cfi-sections := $( call as-instr,.cfi_sections .debug_frame,-DCONFIG_AS_CFI_SECTIONS= 1)
2010-10-13 17:00:29 -06:00
# does binutils support specific instructions?
2015-01-23 01:29:50 -07:00
asinstr += $( call as-instr,pshufb %xmm0$( comma) %xmm0,-DCONFIG_AS_SSSE3= 1)
2012-05-21 21:54:04 -06:00
avx_instr := $( call as-instr,vxorps %ymm0$( comma) %ymm1$( comma) %ymm2,-DCONFIG_AS_AVX= 1)
2012-11-08 14:47:44 -07:00
avx2_instr := $( call as-instr,vpbroadcastb %xmm0$( comma) %ymm1,-DCONFIG_AS_AVX2= 1)
2016-08-12 19:03:19 -06:00
avx512_instr := $( call as-instr,vpmovm2b %k1$( comma) %zmm5,-DCONFIG_AS_AVX512= 1)
2015-09-10 16:27:26 -06:00
sha1_ni_instr := $( call as-instr,sha1msg1 %xmm0$( comma) %xmm1,-DCONFIG_AS_SHA1_NI= 1)
sha256_ni_instr := $( call as-instr,sha256msg1 %xmm0$( comma) %xmm1,-DCONFIG_AS_SHA256_NI= 1)
2010-10-13 17:00:29 -06:00
2016-08-12 19:03:19 -06:00
KBUILD_AFLAGS += $( cfi) $( cfi-sigframe) $( cfi-sections) $( asinstr) $( avx_instr) $( avx2_instr) $( avx512_instr) $( sha1_ni_instr) $( sha256_ni_instr)
KBUILD_CFLAGS += $( cfi) $( cfi-sigframe) $( cfi-sections) $( asinstr) $( avx_instr) $( avx2_instr) $( avx512_instr) $( sha1_ni_instr) $( sha256_ni_instr)
2008-01-30 05:32:20 -07:00
2018-08-23 17:20:39 -06:00
KBUILD_LDFLAGS := -m elf_$( UTS_MACHINE)
2008-01-30 05:32:21 -07:00
2018-03-19 14:57:46 -06:00
#
# The 64-bit kernel must be aligned to 2MB. Pass -z max-page-size=0x200000 to
# the linker to force 2MB page size regardless of the default page size used
# by the linker.
#
i f d e f C O N F I G _ X 8 6 _ 6 4
2018-08-23 17:20:39 -06:00
KBUILD_LDFLAGS += $( call ld-option, -z max-page-size= 0x200000)
2018-03-19 14:57:46 -06:00
e n d i f
2008-01-30 05:32:21 -07:00
# Workaround for a gcc prelease that unfortunately was shipped in a suse release
KBUILD_CFLAGS += -Wno-sign-compare
#
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
2008-01-30 05:32:20 -07:00
x86/retpoline: Add initial retpoline support
Enable the use of -mindirect-branch=thunk-extern in newer GCC, and provide
the corresponding thunks. Provide assembler macros for invoking the thunks
in the same way that GCC does, from native and inline assembler.
This adds X86_FEATURE_RETPOLINE and sets it by default on all CPUs. In
some circumstances, IBRS microcode features may be used instead, and the
retpoline can be disabled.
On AMD CPUs if lfence is serialising, the retpoline can be dramatically
simplified to a simple "lfence; jmp *\reg". A future patch, after it has
been verified that lfence really is serialising in all circumstances, can
enable this by setting the X86_FEATURE_RETPOLINE_AMD feature bit in addition
to X86_FEATURE_RETPOLINE.
Do not align the retpoline in the altinstr section, because there is no
guarantee that it stays aligned when it's copied over the oldinstr during
alternative patching.
[ Andi Kleen: Rename the macros, add CONFIG_RETPOLINE option, export thunks]
[ tglx: Put actual function CALL/JMP in front of the macros, convert to
symbolic labels ]
[ dwmw2: Convert back to numeric labels, merge objtool fixes ]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Arjan van de Ven <arjan@linux.intel.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: Rik van Riel <riel@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: thomas.lendacky@amd.com
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jiri Kosina <jikos@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Kees Cook <keescook@google.com>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@linux-foundation.org>
Cc: Paul Turner <pjt@google.com>
Link: https://lkml.kernel.org/r/1515707194-20531-4-git-send-email-dwmw@amazon.co.uk
2018-01-11 14:46:25 -07:00
# Avoid indirect branches in kernel to deal with Spectre
i f d e f C O N F I G _ R E T P O L I N E
2018-11-02 02:45:41 -06:00
KBUILD_CFLAGS += $( RETPOLINE_CFLAGS)
x86, retpolines: Raise limit for generating indirect calls from switch-case
From networking side, there are numerous attempts to get rid of indirect
calls in fast-path wherever feasible in order to avoid the cost of
retpolines, for example, just to name a few:
* 283c16a2dfd3 ("indirect call wrappers: helpers to speed-up indirect calls of builtin")
* aaa5d90b395a ("net: use indirect call wrappers at GRO network layer")
* 028e0a476684 ("net: use indirect call wrappers at GRO transport layer")
* 356da6d0cde3 ("dma-mapping: bypass indirect calls for dma-direct")
* 09772d92cd5a ("bpf: avoid retpoline for lookup/update/delete calls on maps")
* 10870dd89e95 ("netfilter: nf_tables: add direct calls for all builtin expressions")
[...]
Recent work on XDP from Björn and Magnus additionally found that manually
transforming the XDP return code switch statement with more than 5 cases
into if-else combination would result in a considerable speedup in XDP
layer due to avoidance of indirect calls in CONFIG_RETPOLINE enabled
builds. On i40e driver with XDP prog attached, a 20-26% speedup has been
observed [0]. Aside from XDP, there are many other places later in the
networking stack's critical path with similar switch-case
processing. Rather than fixing every XDP-enabled driver and locations in
stack by hand, it would be good to instead raise the limit where gcc would
emit expensive indirect calls from the switch under retpolines and stick
with the default as-is in case of !retpoline configured kernels. This would
also have the advantage that for archs where this is not necessary, we let
compiler select the underlying target optimization for these constructs and
avoid potential slow-downs by if-else hand-rewrite.
In case of gcc, this setting is controlled by case-values-threshold which
has an architecture global default that selects 4 or 5 (latter if target
does not have a case insn that compares the bounds) where some arch back
ends like arm64 or s390 override it with their own target hooks, for
example, in gcc commit db7a90aa0de5 ("S/390: Disable prediction of indirect
branches") the threshold pretty much disables jump tables by limit of 20
under retpoline builds. Comparing gcc's and clang's default code
generation on x86-64 under O2 level with retpoline build results in the
following outcome for 5 switch cases:
* gcc with -mindirect-branch=thunk-inline -mindirect-branch-register:
# gdb -batch -ex 'disassemble dispatch' ./c-switch
Dump of assembler code for function dispatch:
0x0000000000400be0 <+0>: cmp $0x4,%edi
0x0000000000400be3 <+3>: ja 0x400c35 <dispatch+85>
0x0000000000400be5 <+5>: lea 0x915f8(%rip),%rdx # 0x4921e4
0x0000000000400bec <+12>: mov %edi,%edi
0x0000000000400bee <+14>: movslq (%rdx,%rdi,4),%rax
0x0000000000400bf2 <+18>: add %rdx,%rax
0x0000000000400bf5 <+21>: callq 0x400c01 <dispatch+33>
0x0000000000400bfa <+26>: pause
0x0000000000400bfc <+28>: lfence
0x0000000000400bff <+31>: jmp 0x400bfa <dispatch+26>
0x0000000000400c01 <+33>: mov %rax,(%rsp)
0x0000000000400c05 <+37>: retq
0x0000000000400c06 <+38>: nopw %cs:0x0(%rax,%rax,1)
0x0000000000400c10 <+48>: jmpq 0x400c90 <fn_3>
0x0000000000400c15 <+53>: nopl (%rax)
0x0000000000400c18 <+56>: jmpq 0x400c70 <fn_2>
0x0000000000400c1d <+61>: nopl (%rax)
0x0000000000400c20 <+64>: jmpq 0x400c50 <fn_1>
0x0000000000400c25 <+69>: nopl (%rax)
0x0000000000400c28 <+72>: jmpq 0x400c40 <fn_0>
0x0000000000400c2d <+77>: nopl (%rax)
0x0000000000400c30 <+80>: jmpq 0x400cb0 <fn_4>
0x0000000000400c35 <+85>: push %rax
0x0000000000400c36 <+86>: callq 0x40dd80 <abort>
End of assembler dump.
* clang with -mretpoline emitting search tree:
# gdb -batch -ex 'disassemble dispatch' ./c-switch
Dump of assembler code for function dispatch:
0x0000000000400b30 <+0>: cmp $0x1,%edi
0x0000000000400b33 <+3>: jle 0x400b44 <dispatch+20>
0x0000000000400b35 <+5>: cmp $0x2,%edi
0x0000000000400b38 <+8>: je 0x400b4d <dispatch+29>
0x0000000000400b3a <+10>: cmp $0x3,%edi
0x0000000000400b3d <+13>: jne 0x400b52 <dispatch+34>
0x0000000000400b3f <+15>: jmpq 0x400c50 <fn_3>
0x0000000000400b44 <+20>: test %edi,%edi
0x0000000000400b46 <+22>: jne 0x400b5c <dispatch+44>
0x0000000000400b48 <+24>: jmpq 0x400c20 <fn_0>
0x0000000000400b4d <+29>: jmpq 0x400c40 <fn_2>
0x0000000000400b52 <+34>: cmp $0x4,%edi
0x0000000000400b55 <+37>: jne 0x400b66 <dispatch+54>
0x0000000000400b57 <+39>: jmpq 0x400c60 <fn_4>
0x0000000000400b5c <+44>: cmp $0x1,%edi
0x0000000000400b5f <+47>: jne 0x400b66 <dispatch+54>
0x0000000000400b61 <+49>: jmpq 0x400c30 <fn_1>
0x0000000000400b66 <+54>: push %rax
0x0000000000400b67 <+55>: callq 0x40dd20 <abort>
End of assembler dump.
For sake of comparison, clang without -mretpoline:
# gdb -batch -ex 'disassemble dispatch' ./c-switch
Dump of assembler code for function dispatch:
0x0000000000400b30 <+0>: cmp $0x4,%edi
0x0000000000400b33 <+3>: ja 0x400b57 <dispatch+39>
0x0000000000400b35 <+5>: mov %edi,%eax
0x0000000000400b37 <+7>: jmpq *0x492148(,%rax,8)
0x0000000000400b3e <+14>: jmpq 0x400bf0 <fn_0>
0x0000000000400b43 <+19>: jmpq 0x400c30 <fn_4>
0x0000000000400b48 <+24>: jmpq 0x400c10 <fn_2>
0x0000000000400b4d <+29>: jmpq 0x400c20 <fn_3>
0x0000000000400b52 <+34>: jmpq 0x400c00 <fn_1>
0x0000000000400b57 <+39>: push %rax
0x0000000000400b58 <+40>: callq 0x40dcf0 <abort>
End of assembler dump.
Raising the cases to a high number (e.g. 100) will still result in similar
code generation pattern with clang and gcc as above, in other words clang
generally turns off jump table emission by having an extra expansion pass
under retpoline build to turn indirectbr instructions from their IR into
switch instructions as a built-in -mno-jump-table lowering of a switch (in
this case, even if IR input already contained an indirect branch).
For gcc, adding --param=case-values-threshold=20 as in similar fashion as
s390 in order to raise the limit for x86 retpoline enabled builds results
in a small vmlinux size increase of only 0.13% (before=18,027,528
after=18,051,192). For clang this option is ignored due to i) not being
needed as mentioned and ii) not having above cmdline
parameter. Non-retpoline-enabled builds with gcc continue to use the
default case-values-threshold setting, so nothing changes here.
[0] https://lore.kernel.org/netdev/20190129095754.9390-1-bjorn.topel@gmail.com/
and "The Path to DPDK Speeds for AF_XDP", LPC 2018, networking track:
- http://vger.kernel.org/lpc_net2018_talks/lpc18_pres_af_xdp_perf-v3.pdf
- http://vger.kernel.org/lpc_net2018_talks/lpc18_paper_af_xdp_perf-v2.pdf
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
Acked-by: Björn Töpel <bjorn.topel@intel.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: netdev@vger.kernel.org
Cc: David S. Miller <davem@davemloft.net>
Cc: Magnus Karlsson <magnus.karlsson@intel.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Link: https://lkml.kernel.org/r/20190221221941.29358-1-daniel@iogearbox.net
2019-02-21 15:19:41 -07:00
# Additionally, avoid generating expensive indirect jumps which
# are subject to retpolines for small number of switch cases.
# clang turns off jump table generation by default when under
2019-03-25 07:56:20 -06:00
# retpoline builds, however, gcc does not for x86. This has
# only been fixed starting from gcc stable version 8.4.0 and
# onwards, but not for older ones. See gcc bug #86952.
ifndef CONFIG_CC_IS_CLANG
KBUILD_CFLAGS += $( call cc-option,-fno-jump-tables)
endif
x86/retpoline: Add initial retpoline support
Enable the use of -mindirect-branch=thunk-extern in newer GCC, and provide
the corresponding thunks. Provide assembler macros for invoking the thunks
in the same way that GCC does, from native and inline assembler.
This adds X86_FEATURE_RETPOLINE and sets it by default on all CPUs. In
some circumstances, IBRS microcode features may be used instead, and the
retpoline can be disabled.
On AMD CPUs if lfence is serialising, the retpoline can be dramatically
simplified to a simple "lfence; jmp *\reg". A future patch, after it has
been verified that lfence really is serialising in all circumstances, can
enable this by setting the X86_FEATURE_RETPOLINE_AMD feature bit in addition
to X86_FEATURE_RETPOLINE.
Do not align the retpoline in the altinstr section, because there is no
guarantee that it stays aligned when it's copied over the oldinstr during
alternative patching.
[ Andi Kleen: Rename the macros, add CONFIG_RETPOLINE option, export thunks]
[ tglx: Put actual function CALL/JMP in front of the macros, convert to
symbolic labels ]
[ dwmw2: Convert back to numeric labels, merge objtool fixes ]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Arjan van de Ven <arjan@linux.intel.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: Rik van Riel <riel@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: thomas.lendacky@amd.com
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jiri Kosina <jikos@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Kees Cook <keescook@google.com>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@linux-foundation.org>
Cc: Paul Turner <pjt@google.com>
Link: https://lkml.kernel.org/r/1515707194-20531-4-git-send-email-dwmw@amazon.co.uk
2018-01-11 14:46:25 -07:00
e n d i f
2012-10-15 13:16:56 -06:00
archscripts : scripts_basic
2012-05-08 12:22:24 -06:00
$( Q) $( MAKE) $( build) = arch/x86/tools relocs
2011-11-11 17:07:41 -07:00
###
# Syscall table generation
archheaders :
2015-06-03 10:36:41 -06:00
$( Q) $( MAKE) $( build) = arch/x86/entry/syscalls all
2011-11-11 17:07:41 -07:00
2008-01-30 05:32:20 -07:00
###
# Kernel objects
2008-02-23 01:58:20 -07:00
head-y := arch/x86/kernel/head_$( BITS) .o
head-y += arch/x86/kernel/head$( BITS) .o
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head-y += arch/x86/kernel/ebda.o
2016-04-13 18:04:34 -06:00
head-y += arch/x86/kernel/platform-quirks.o
2008-01-30 05:32:20 -07:00
libs-y += arch/x86/lib/
2009-04-15 13:34:55 -06:00
# See arch/x86/Kbuild for content of core part of the kernel
core-y += arch/x86/
2008-01-30 05:32:20 -07:00
# drivers-y are linked after core-y
drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/
drivers-$(CONFIG_PCI) += arch/x86/pci/
# must be linked after kernel/
drivers-$(CONFIG_OPROFILE) += arch/x86/oprofile/
2008-02-09 15:24:09 -07:00
# suspend and hibernation support
2008-01-30 05:32:20 -07:00
drivers-$(CONFIG_PM) += arch/x86/power/
2008-02-09 15:24:09 -07:00
2008-01-30 05:32:20 -07:00
drivers-$(CONFIG_FB) += arch/x86/video/
####
# boot loader support. Several targets are kept for legacy purposes
boot := arch/x86/boot
2009-04-17 11:46:37 -06:00
BOOT_TARGETS = bzlilo bzdisk fdimage fdimage144 fdimage288 isoimage
2009-03-12 13:50:33 -06:00
PHONY += bzImage $( BOOT_TARGETS)
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# Default kernel to build
all : bzImage
# KBUILD_IMAGE specify target image being built
2009-03-12 13:50:33 -06:00
KBUILD_IMAGE := $( boot) /bzImage
2008-01-30 05:32:20 -07:00
2009-03-12 13:50:33 -06:00
bzImage : vmlinux
2009-08-13 14:34:21 -06:00
i f e q ( $( CONFIG_X 86_DECODER_SELFTEST ) , y )
$( Q) $( MAKE) $( build) = arch/x86/tools posttest
e n d i f
2008-01-30 05:32:20 -07:00
$( Q) $( MAKE) $( build) = $( boot) $( KBUILD_IMAGE)
$( Q) mkdir -p $( objtree) /arch/$( UTS_MACHINE) /boot
2008-04-22 09:29:26 -06:00
$( Q) ln -fsn ../../x86/boot/bzImage $( objtree) /arch/$( UTS_MACHINE) /boot/$@
2008-01-30 05:32:20 -07:00
2009-03-12 13:50:33 -06:00
$(BOOT_TARGETS) : vmlinux
$( Q) $( MAKE) $( build) = $( boot) $@
2008-01-30 05:32:20 -07:00
2009-04-17 11:46:37 -06:00
PHONY += install
install :
$( Q) $( MAKE) $( build) = $( boot) $@
2008-01-30 05:32:20 -07:00
PHONY += vdso_install
vdso_install :
2015-06-03 10:05:44 -06:00
$( Q) $( MAKE) $( build) = arch/x86/entry/vdso $@
2008-01-30 05:32:20 -07:00
2018-08-29 13:43:17 -06:00
archprepare : checkbin
checkbin :
2018-12-30 08:14:15 -07:00
i f n d e f C O N F I G _ C C _ H A S _ A S M _ G O T O
2018-08-29 13:43:17 -06:00
@echo Compiler lacks asm-goto support.
@exit 1
e n d i f
2018-12-04 23:27:19 -07:00
i f d e f C O N F I G _ R E T P O L I N E
i f e q ( $( RETPOLINE_CFLAGS ) , )
@echo "You are building kernel with non-retpoline compiler." >& 2
@echo "Please update your compiler." >& 2
@false
e n d i f
e n d i f
2018-08-29 13:43:17 -06:00
2008-01-30 05:32:20 -07:00
archclean :
$( Q) rm -rf $( objtree) /arch/i386
$( Q) rm -rf $( objtree) /arch/x86_64
$( Q) $( MAKE) $( clean) = $( boot)
2012-05-21 11:51:24 -06:00
$( Q) $( MAKE) $( clean) = arch/x86/tools
2008-01-30 05:32:20 -07:00
d e f i n e a r c h h e l p
2008-01-30 05:32:49 -07:00
echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)'
echo ' install - Install kernel using'
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echo ' (your) ~/bin/$(INSTALLKERNEL) or'
echo ' (distribution) /sbin/$(INSTALLKERNEL) or'
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echo ' install to $$(INSTALL_PATH) and run lilo'
echo ' fdimage - Create 1.4MB boot floppy image (arch/x86/boot/fdimage)'
echo ' fdimage144 - Create 1.4MB boot floppy image (arch/x86/boot/fdimage)'
echo ' fdimage288 - Create 2.8MB boot floppy image (arch/x86/boot/fdimage)'
echo ' isoimage - Create a boot CD-ROM image (arch/x86/boot/image.iso)'
echo ' bzdisk/fdimage*/isoimage also accept:'
echo ' FDARGS="..." arguments for the booted kernel'
echo ' FDINITRD=file initrd for the booted kernel'
2008-01-30 05:32:20 -07:00
e n d e f
