2010-02-02 12:25:44 -07:00
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#undef DEBUG
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/*
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* ARM performance counter support.
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*
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* Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
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2010-11-13 12:04:32 -07:00
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* Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
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2010-01-26 10:51:05 -07:00
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*
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2010-02-02 12:25:44 -07:00
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* This code is based on the sparc64 perf event code, which is in turn based
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* on the x86 code. Callchain code is based on the ARM OProfile backtrace
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* code.
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*/
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#define pr_fmt(fmt) "hw perfevents: " fmt
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#include <linux/kernel.h>
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2010-04-29 10:13:24 -06:00
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#include <linux/platform_device.h>
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2012-05-31 12:05:20 -06:00
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#include <linux/pm_runtime.h>
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2012-07-29 06:09:14 -06:00
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#include <linux/uaccess.h>
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2010-02-02 12:25:44 -07:00
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#include <asm/irq_regs.h>
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#include <asm/pmu.h>
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#include <asm/stacktrace.h>
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static int
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2011-04-28 08:47:10 -06:00
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armpmu_map_cache_event(const unsigned (*cache_map)
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX],
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u64 config)
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2010-02-02 12:25:44 -07:00
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{
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unsigned int cache_type, cache_op, cache_result, ret;
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cache_type = (config >> 0) & 0xff;
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if (cache_type >= PERF_COUNT_HW_CACHE_MAX)
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return -EINVAL;
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cache_op = (config >> 8) & 0xff;
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if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX)
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return -EINVAL;
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cache_result = (config >> 16) & 0xff;
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if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
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return -EINVAL;
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2011-04-28 08:47:10 -06:00
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ret = (int)(*cache_map)[cache_type][cache_op][cache_result];
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2010-02-02 12:25:44 -07:00
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if (ret == CACHE_OP_UNSUPPORTED)
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return -ENOENT;
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return ret;
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}
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2010-11-13 10:13:56 -07:00
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static int
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2012-07-29 05:36:28 -06:00
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armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config)
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2010-11-13 10:13:56 -07:00
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{
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2011-04-28 08:47:10 -06:00
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int mapping = (*event_map)[config];
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return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping;
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2010-11-13 10:13:56 -07:00
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}
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static int
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2011-04-28 08:47:10 -06:00
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armpmu_map_raw_event(u32 raw_event_mask, u64 config)
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2010-11-13 10:13:56 -07:00
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{
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2011-04-28 08:47:10 -06:00
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return (int)(config & raw_event_mask);
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}
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2012-07-29 05:36:28 -06:00
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int
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armpmu_map_event(struct perf_event *event,
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const unsigned (*event_map)[PERF_COUNT_HW_MAX],
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const unsigned (*cache_map)
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX],
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u32 raw_event_mask)
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2011-04-28 08:47:10 -06:00
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{
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u64 config = event->attr.config;
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switch (event->attr.type) {
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case PERF_TYPE_HARDWARE:
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2012-07-29 05:36:28 -06:00
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return armpmu_map_hw_event(event_map, config);
|
2011-04-28 08:47:10 -06:00
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case PERF_TYPE_HW_CACHE:
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return armpmu_map_cache_event(cache_map, config);
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case PERF_TYPE_RAW:
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return armpmu_map_raw_event(raw_event_mask, config);
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}
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return -ENOENT;
|
2010-11-13 10:13:56 -07:00
|
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|
}
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|
2011-05-19 03:07:57 -06:00
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int
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2010-02-02 12:25:44 -07:00
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armpmu_event_set_period(struct perf_event *event,
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struct hw_perf_event *hwc,
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int idx)
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{
|
2011-04-28 09:27:54 -06:00
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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2010-05-21 06:43:08 -06:00
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s64 left = local64_read(&hwc->period_left);
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2010-02-02 12:25:44 -07:00
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s64 period = hwc->sample_period;
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int ret = 0;
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|
2012-10-17 05:01:34 -06:00
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/* The period may have been changed by PERF_EVENT_IOC_PERIOD */
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if (unlikely(period != hwc->last_period))
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left = period - (hwc->last_period - left);
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2010-02-02 12:25:44 -07:00
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if (unlikely(left <= -period)) {
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left = period;
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2010-05-21 06:43:08 -06:00
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local64_set(&hwc->period_left, left);
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2010-02-02 12:25:44 -07:00
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hwc->last_period = period;
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ret = 1;
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}
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if (unlikely(left <= 0)) {
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left += period;
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2010-05-21 06:43:08 -06:00
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local64_set(&hwc->period_left, left);
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2010-02-02 12:25:44 -07:00
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hwc->last_period = period;
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ret = 1;
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}
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if (left > (s64)armpmu->max_period)
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left = armpmu->max_period;
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2010-05-21 06:43:08 -06:00
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local64_set(&hwc->prev_count, (u64)-left);
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2010-02-02 12:25:44 -07:00
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armpmu->write_counter(idx, (u64)(-left) & 0xffffffff);
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perf_event_update_userpage(event);
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return ret;
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}
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2011-05-19 03:07:57 -06:00
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u64
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2010-02-02 12:25:44 -07:00
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armpmu_event_update(struct perf_event *event,
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struct hw_perf_event *hwc,
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2012-03-06 09:33:17 -07:00
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int idx)
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2010-02-02 12:25:44 -07:00
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{
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2011-04-28 09:27:54 -06:00
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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2011-03-25 10:12:37 -06:00
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u64 delta, prev_raw_count, new_raw_count;
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2010-02-02 12:25:44 -07:00
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again:
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2010-05-21 06:43:08 -06:00
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prev_raw_count = local64_read(&hwc->prev_count);
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2010-02-02 12:25:44 -07:00
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new_raw_count = armpmu->read_counter(idx);
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2010-05-21 06:43:08 -06:00
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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2010-02-02 12:25:44 -07:00
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new_raw_count) != prev_raw_count)
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goto again;
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2012-03-06 09:33:17 -07:00
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delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
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2010-02-02 12:25:44 -07:00
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2010-05-21 06:43:08 -06:00
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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2010-02-02 12:25:44 -07:00
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return new_raw_count;
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}
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static void
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perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
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armpmu_read(struct perf_event *event)
|
2010-02-02 12:25:44 -07:00
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{
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struct hw_perf_event *hwc = &event->hw;
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
/* Don't read disabled counters! */
|
|
|
|
if (hwc->idx < 0)
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|
return;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2012-03-06 09:33:17 -07:00
|
|
|
armpmu_event_update(event, hwc, hwc->idx);
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
armpmu_stop(struct perf_event *event, int flags)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2010-02-02 12:25:44 -07:00
|
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
/*
|
|
|
|
* ARM pmu always has to update the counter, so ignore
|
|
|
|
* PERF_EF_UPDATE, see comments in armpmu_start().
|
|
|
|
*/
|
|
|
|
if (!(hwc->state & PERF_HES_STOPPED)) {
|
|
|
|
armpmu->disable(hwc, hwc->idx);
|
2012-03-06 09:33:17 -07:00
|
|
|
armpmu_event_update(event, hwc, hwc->idx);
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
|
|
|
}
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
armpmu_start(struct perf_event *event, int flags)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2010-02-02 12:25:44 -07:00
|
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
/*
|
|
|
|
* ARM pmu always has to reprogram the period, so ignore
|
|
|
|
* PERF_EF_RELOAD, see the comment below.
|
|
|
|
*/
|
|
|
|
if (flags & PERF_EF_RELOAD)
|
|
|
|
WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
|
|
|
|
|
|
|
|
hwc->state = 0;
|
2010-02-02 12:25:44 -07:00
|
|
|
/*
|
|
|
|
* Set the period again. Some counters can't be stopped, so when we
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
* were stopped we simply disabled the IRQ source and the counter
|
2010-02-02 12:25:44 -07:00
|
|
|
* may have been left counting. If we don't do this step then we may
|
|
|
|
* get an interrupt too soon or *way* too late if the overflow has
|
|
|
|
* happened since disabling.
|
|
|
|
*/
|
|
|
|
armpmu_event_set_period(event, hwc, hwc->idx);
|
|
|
|
armpmu->enable(hwc, hwc->idx);
|
|
|
|
}
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
static void
|
|
|
|
armpmu_del(struct perf_event *event, int flags)
|
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2011-05-17 04:20:11 -06:00
|
|
|
struct pmu_hw_events *hw_events = armpmu->get_hw_events();
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
int idx = hwc->idx;
|
|
|
|
|
|
|
|
WARN_ON(idx < 0);
|
|
|
|
|
|
|
|
armpmu_stop(event, PERF_EF_UPDATE);
|
2011-05-17 04:20:11 -06:00
|
|
|
hw_events->events[idx] = NULL;
|
|
|
|
clear_bit(idx, hw_events->used_mask);
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
|
|
|
|
perf_event_update_userpage(event);
|
|
|
|
}
|
|
|
|
|
2010-02-02 12:25:44 -07:00
|
|
|
static int
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
armpmu_add(struct perf_event *event, int flags)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2011-05-17 04:20:11 -06:00
|
|
|
struct pmu_hw_events *hw_events = armpmu->get_hw_events();
|
2010-02-02 12:25:44 -07:00
|
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
int idx;
|
|
|
|
int err = 0;
|
|
|
|
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_disable(event->pmu);
|
2010-06-11 09:32:03 -06:00
|
|
|
|
2010-02-02 12:25:44 -07:00
|
|
|
/* If we don't have a space for the counter then finish early. */
|
2011-05-17 04:20:11 -06:00
|
|
|
idx = armpmu->get_event_idx(hw_events, hwc);
|
2010-02-02 12:25:44 -07:00
|
|
|
if (idx < 0) {
|
|
|
|
err = idx;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If there is an event in the counter we are going to use then make
|
|
|
|
* sure it is disabled.
|
|
|
|
*/
|
|
|
|
event->hw.idx = idx;
|
|
|
|
armpmu->disable(hwc, idx);
|
2011-05-17 04:20:11 -06:00
|
|
|
hw_events->events[idx] = event;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
|
|
|
if (flags & PERF_EF_START)
|
|
|
|
armpmu_start(event, PERF_EF_RELOAD);
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
/* Propagate our changes to the userspace mapping. */
|
|
|
|
perf_event_update_userpage(event);
|
|
|
|
|
|
|
|
out:
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_enable(event->pmu);
|
2010-02-02 12:25:44 -07:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2011-05-17 04:20:11 -06:00
|
|
|
validate_event(struct pmu_hw_events *hw_events,
|
2010-02-02 12:25:44 -07:00
|
|
|
struct perf_event *event)
|
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2010-02-02 12:25:44 -07:00
|
|
|
struct hw_perf_event fake_event = event->hw;
|
2011-04-27 09:22:21 -06:00
|
|
|
struct pmu *leader_pmu = event->group_leader->pmu;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2011-04-27 09:22:21 -06:00
|
|
|
if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF)
|
2010-09-02 02:32:08 -06:00
|
|
|
return 1;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2011-05-17 04:20:11 -06:00
|
|
|
return armpmu->get_event_idx(hw_events, &fake_event) >= 0;
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
validate_group(struct perf_event *event)
|
|
|
|
{
|
|
|
|
struct perf_event *sibling, *leader = event->group_leader;
|
2011-05-17 04:20:11 -06:00
|
|
|
struct pmu_hw_events fake_pmu;
|
2011-11-17 08:05:14 -07:00
|
|
|
DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS);
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2011-11-17 08:05:14 -07:00
|
|
|
/*
|
|
|
|
* Initialise the fake PMU. We only need to populate the
|
|
|
|
* used_mask for the purposes of validation.
|
|
|
|
*/
|
|
|
|
memset(fake_used_mask, 0, sizeof(fake_used_mask));
|
|
|
|
fake_pmu.used_mask = fake_used_mask;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
if (!validate_event(&fake_pmu, leader))
|
2011-11-09 09:56:37 -07:00
|
|
|
return -EINVAL;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
|
|
|
|
if (!validate_event(&fake_pmu, sibling))
|
2011-11-09 09:56:37 -07:00
|
|
|
return -EINVAL;
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (!validate_event(&fake_pmu, event))
|
2011-11-09 09:56:37 -07:00
|
|
|
return -EINVAL;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-07-31 03:34:25 -06:00
|
|
|
static irqreturn_t armpmu_dispatch_irq(int irq, void *dev)
|
2011-02-07 20:54:36 -07:00
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = (struct arm_pmu *) dev;
|
2011-05-04 02:23:15 -06:00
|
|
|
struct platform_device *plat_device = armpmu->plat_device;
|
|
|
|
struct arm_pmu_platdata *plat = dev_get_platdata(&plat_device->dev);
|
2011-02-07 20:54:36 -07:00
|
|
|
|
2012-07-31 03:34:25 -06:00
|
|
|
if (plat && plat->handle_irq)
|
|
|
|
return plat->handle_irq(irq, dev, armpmu->handle_irq);
|
|
|
|
else
|
|
|
|
return armpmu->handle_irq(irq, dev);
|
2011-02-07 20:54:36 -07:00
|
|
|
}
|
|
|
|
|
2011-07-27 08:18:59 -06:00
|
|
|
static void
|
2011-04-28 09:27:54 -06:00
|
|
|
armpmu_release_hardware(struct arm_pmu *armpmu)
|
2011-07-27 08:18:59 -06:00
|
|
|
{
|
2012-07-31 03:34:25 -06:00
|
|
|
armpmu->free_irq();
|
|
|
|
pm_runtime_put_sync(&armpmu->plat_device->dev);
|
2011-07-27 08:18:59 -06:00
|
|
|
}
|
|
|
|
|
2010-02-02 12:25:44 -07:00
|
|
|
static int
|
2011-04-28 09:27:54 -06:00
|
|
|
armpmu_reserve_hardware(struct arm_pmu *armpmu)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2012-07-31 03:34:25 -06:00
|
|
|
int err;
|
2011-05-04 02:23:15 -06:00
|
|
|
struct platform_device *pmu_device = armpmu->plat_device;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2011-11-22 11:01:46 -07:00
|
|
|
if (!pmu_device)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2012-05-31 12:05:20 -06:00
|
|
|
pm_runtime_get_sync(&pmu_device->dev);
|
2012-07-31 03:34:25 -06:00
|
|
|
err = armpmu->request_irq(armpmu_dispatch_irq);
|
|
|
|
if (err) {
|
|
|
|
armpmu_release_hardware(armpmu);
|
|
|
|
return err;
|
2010-04-29 10:13:24 -06:00
|
|
|
}
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2011-07-27 08:18:59 -06:00
|
|
|
return 0;
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
hw_perf_event_destroy(struct perf_event *event)
|
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2011-04-27 04:20:11 -06:00
|
|
|
atomic_t *active_events = &armpmu->active_events;
|
|
|
|
struct mutex *pmu_reserve_mutex = &armpmu->reserve_mutex;
|
|
|
|
|
|
|
|
if (atomic_dec_and_mutex_lock(active_events, pmu_reserve_mutex)) {
|
2011-04-28 09:27:54 -06:00
|
|
|
armpmu_release_hardware(armpmu);
|
2011-04-27 04:20:11 -06:00
|
|
|
mutex_unlock(pmu_reserve_mutex);
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-07-19 04:57:30 -06:00
|
|
|
static int
|
|
|
|
event_requires_mode_exclusion(struct perf_event_attr *attr)
|
|
|
|
{
|
|
|
|
return attr->exclude_idle || attr->exclude_user ||
|
|
|
|
attr->exclude_kernel || attr->exclude_hv;
|
|
|
|
}
|
|
|
|
|
2010-02-02 12:25:44 -07:00
|
|
|
static int
|
|
|
|
__hw_perf_event_init(struct perf_event *event)
|
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2010-02-02 12:25:44 -07:00
|
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
int mapping, err;
|
|
|
|
|
2011-04-28 08:47:10 -06:00
|
|
|
mapping = armpmu->map_event(event);
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
if (mapping < 0) {
|
|
|
|
pr_debug("event %x:%llx not supported\n", event->attr.type,
|
|
|
|
event->attr.config);
|
|
|
|
return mapping;
|
|
|
|
}
|
|
|
|
|
2011-07-19 04:57:30 -06:00
|
|
|
/*
|
|
|
|
* We don't assign an index until we actually place the event onto
|
|
|
|
* hardware. Use -1 to signify that we haven't decided where to put it
|
|
|
|
* yet. For SMP systems, each core has it's own PMU so we can't do any
|
|
|
|
* clever allocation or constraints checking at this point.
|
|
|
|
*/
|
|
|
|
hwc->idx = -1;
|
|
|
|
hwc->config_base = 0;
|
|
|
|
hwc->config = 0;
|
|
|
|
hwc->event_base = 0;
|
|
|
|
|
2010-02-02 12:25:44 -07:00
|
|
|
/*
|
|
|
|
* Check whether we need to exclude the counter from certain modes.
|
|
|
|
*/
|
2011-07-19 04:57:30 -06:00
|
|
|
if ((!armpmu->set_event_filter ||
|
|
|
|
armpmu->set_event_filter(hwc, &event->attr)) &&
|
|
|
|
event_requires_mode_exclusion(&event->attr)) {
|
2010-02-02 12:25:44 -07:00
|
|
|
pr_debug("ARM performance counters do not support "
|
|
|
|
"mode exclusion\n");
|
2012-07-04 11:15:42 -06:00
|
|
|
return -EOPNOTSUPP;
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2011-07-19 04:57:30 -06:00
|
|
|
* Store the event encoding into the config_base field.
|
2010-02-02 12:25:44 -07:00
|
|
|
*/
|
2011-07-19 04:57:30 -06:00
|
|
|
hwc->config_base |= (unsigned long)mapping;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
if (!hwc->sample_period) {
|
2012-03-06 09:33:17 -07:00
|
|
|
/*
|
|
|
|
* For non-sampling runs, limit the sample_period to half
|
|
|
|
* of the counter width. That way, the new counter value
|
|
|
|
* is far less likely to overtake the previous one unless
|
|
|
|
* you have some serious IRQ latency issues.
|
|
|
|
*/
|
|
|
|
hwc->sample_period = armpmu->max_period >> 1;
|
2010-02-02 12:25:44 -07:00
|
|
|
hwc->last_period = hwc->sample_period;
|
2010-05-21 06:43:08 -06:00
|
|
|
local64_set(&hwc->period_left, hwc->sample_period);
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
err = 0;
|
|
|
|
if (event->group_leader != event) {
|
|
|
|
err = validate_group(event);
|
|
|
|
if (err)
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2010-06-11 05:35:08 -06:00
|
|
|
static int armpmu_event_init(struct perf_event *event)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
2010-02-02 12:25:44 -07:00
|
|
|
int err = 0;
|
2011-04-27 04:20:11 -06:00
|
|
|
atomic_t *active_events = &armpmu->active_events;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2012-02-09 15:20:59 -07:00
|
|
|
/* does not support taken branch sampling */
|
|
|
|
if (has_branch_stack(event))
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
|
2011-04-28 08:47:10 -06:00
|
|
|
if (armpmu->map_event(event) == -ENOENT)
|
2010-06-11 05:35:08 -06:00
|
|
|
return -ENOENT;
|
|
|
|
|
2010-02-02 12:25:44 -07:00
|
|
|
event->destroy = hw_perf_event_destroy;
|
|
|
|
|
2011-04-27 04:20:11 -06:00
|
|
|
if (!atomic_inc_not_zero(active_events)) {
|
|
|
|
mutex_lock(&armpmu->reserve_mutex);
|
|
|
|
if (atomic_read(active_events) == 0)
|
2011-04-28 09:27:54 -06:00
|
|
|
err = armpmu_reserve_hardware(armpmu);
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
if (!err)
|
2011-04-27 04:20:11 -06:00
|
|
|
atomic_inc(active_events);
|
|
|
|
mutex_unlock(&armpmu->reserve_mutex);
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (err)
|
2010-06-11 05:35:08 -06:00
|
|
|
return err;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
err = __hw_perf_event_init(event);
|
|
|
|
if (err)
|
|
|
|
hw_perf_event_destroy(event);
|
|
|
|
|
2010-06-11 05:35:08 -06:00
|
|
|
return err;
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
static void armpmu_enable(struct pmu *pmu)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2011-05-17 04:20:11 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(pmu);
|
|
|
|
struct pmu_hw_events *hw_events = armpmu->get_hw_events();
|
2011-08-23 04:59:49 -06:00
|
|
|
int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events);
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2011-07-01 07:38:12 -06:00
|
|
|
if (enabled)
|
|
|
|
armpmu->start();
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
static void armpmu_disable(struct pmu *pmu)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2011-04-28 09:27:54 -06:00
|
|
|
struct arm_pmu *armpmu = to_arm_pmu(pmu);
|
2011-04-27 03:31:51 -06:00
|
|
|
armpmu->stop();
|
2010-02-02 12:25:44 -07:00
|
|
|
}
|
|
|
|
|
2012-05-31 12:05:20 -06:00
|
|
|
#ifdef CONFIG_PM_RUNTIME
|
|
|
|
static int armpmu_runtime_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct arm_pmu_platdata *plat = dev_get_platdata(dev);
|
|
|
|
|
|
|
|
if (plat && plat->runtime_resume)
|
|
|
|
return plat->runtime_resume(dev);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int armpmu_runtime_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct arm_pmu_platdata *plat = dev_get_platdata(dev);
|
|
|
|
|
|
|
|
if (plat && plat->runtime_suspend)
|
|
|
|
return plat->runtime_suspend(dev);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2012-07-29 05:36:28 -06:00
|
|
|
const struct dev_pm_ops armpmu_dev_pm_ops = {
|
|
|
|
SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)
|
|
|
|
};
|
|
|
|
|
2011-04-27 04:20:11 -06:00
|
|
|
static void __init armpmu_init(struct arm_pmu *armpmu)
|
|
|
|
{
|
|
|
|
atomic_set(&armpmu->active_events, 0);
|
|
|
|
mutex_init(&armpmu->reserve_mutex);
|
2011-04-28 09:27:54 -06:00
|
|
|
|
|
|
|
armpmu->pmu = (struct pmu) {
|
|
|
|
.pmu_enable = armpmu_enable,
|
|
|
|
.pmu_disable = armpmu_disable,
|
|
|
|
.event_init = armpmu_event_init,
|
|
|
|
.add = armpmu_add,
|
|
|
|
.del = armpmu_del,
|
|
|
|
.start = armpmu_start,
|
|
|
|
.stop = armpmu_stop,
|
|
|
|
.read = armpmu_read,
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
2012-07-28 10:42:22 -06:00
|
|
|
int armpmu_register(struct arm_pmu *armpmu, char *name, int type)
|
2011-04-28 09:27:54 -06:00
|
|
|
{
|
|
|
|
armpmu_init(armpmu);
|
2012-07-28 10:42:22 -06:00
|
|
|
pr_info("enabled with %s PMU driver, %d counters available\n",
|
|
|
|
armpmu->name, armpmu->num_events);
|
2011-04-28 09:27:54 -06:00
|
|
|
return perf_pmu_register(&armpmu->pmu, name, type);
|
2011-04-27 04:20:11 -06:00
|
|
|
}
|
|
|
|
|
2010-02-02 12:25:44 -07:00
|
|
|
/*
|
|
|
|
* Callchain handling code.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The registers we're interested in are at the end of the variable
|
|
|
|
* length saved register structure. The fp points at the end of this
|
|
|
|
* structure so the address of this struct is:
|
|
|
|
* (struct frame_tail *)(xxx->fp)-1
|
|
|
|
*
|
|
|
|
* This code has been adapted from the ARM OProfile support.
|
|
|
|
*/
|
|
|
|
struct frame_tail {
|
2010-11-30 10:15:53 -07:00
|
|
|
struct frame_tail __user *fp;
|
|
|
|
unsigned long sp;
|
|
|
|
unsigned long lr;
|
2010-02-02 12:25:44 -07:00
|
|
|
} __attribute__((packed));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get the return address for a single stackframe and return a pointer to the
|
|
|
|
* next frame tail.
|
|
|
|
*/
|
2010-11-30 10:15:53 -07:00
|
|
|
static struct frame_tail __user *
|
|
|
|
user_backtrace(struct frame_tail __user *tail,
|
2010-02-02 12:25:44 -07:00
|
|
|
struct perf_callchain_entry *entry)
|
|
|
|
{
|
|
|
|
struct frame_tail buftail;
|
|
|
|
|
|
|
|
/* Also check accessibility of one struct frame_tail beyond */
|
|
|
|
if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
|
|
|
|
return NULL;
|
|
|
|
if (__copy_from_user_inatomic(&buftail, tail, sizeof(buftail)))
|
|
|
|
return NULL;
|
|
|
|
|
2010-06-29 11:34:05 -06:00
|
|
|
perf_callchain_store(entry, buftail.lr);
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Frame pointers should strictly progress back up the stack
|
|
|
|
* (towards higher addresses).
|
|
|
|
*/
|
2011-02-09 03:35:12 -07:00
|
|
|
if (tail + 1 >= buftail.fp)
|
2010-02-02 12:25:44 -07:00
|
|
|
return NULL;
|
|
|
|
|
|
|
|
return buftail.fp - 1;
|
|
|
|
}
|
|
|
|
|
2010-06-30 15:03:51 -06:00
|
|
|
void
|
|
|
|
perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
2010-11-30 10:15:53 -07:00
|
|
|
struct frame_tail __user *tail;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
|
|
|
|
2010-11-30 10:15:53 -07:00
|
|
|
tail = (struct frame_tail __user *)regs->ARM_fp - 1;
|
2010-02-02 12:25:44 -07:00
|
|
|
|
2011-04-18 15:12:59 -06:00
|
|
|
while ((entry->nr < PERF_MAX_STACK_DEPTH) &&
|
|
|
|
tail && !((unsigned long)tail & 0x3))
|
2010-02-02 12:25:44 -07:00
|
|
|
tail = user_backtrace(tail, entry);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Gets called by walk_stackframe() for every stackframe. This will be called
|
|
|
|
* whist unwinding the stackframe and is like a subroutine return so we use
|
|
|
|
* the PC.
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
callchain_trace(struct stackframe *fr,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
struct perf_callchain_entry *entry = data;
|
2010-06-29 11:34:05 -06:00
|
|
|
perf_callchain_store(entry, fr->pc);
|
2010-02-02 12:25:44 -07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-06-30 15:03:51 -06:00
|
|
|
void
|
|
|
|
perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
2010-02-02 12:25:44 -07:00
|
|
|
{
|
|
|
|
struct stackframe fr;
|
|
|
|
|
|
|
|
fr.fp = regs->ARM_fp;
|
|
|
|
fr.sp = regs->ARM_sp;
|
|
|
|
fr.lr = regs->ARM_lr;
|
|
|
|
fr.pc = regs->ARM_pc;
|
|
|
|
walk_stackframe(&fr, callchain_trace, entry);
|
|
|
|
}
|