License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 08:07:57 -06:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2005-11-19 02:17:32 -07:00
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#ifndef _ASM_POWERPC_MMU_H_
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#define _ASM_POWERPC_MMU_H_
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2005-12-16 14:43:46 -07:00
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#ifdef __KERNEL__
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2005-11-19 02:17:32 -07:00
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2010-07-06 16:39:02 -06:00
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#include <linux/types.h>
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2018-07-05 10:24:57 -06:00
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#include <asm/asm-const.h>
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2008-12-18 12:13:32 -07:00
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/*
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* MMU features bit definitions
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*/
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/*
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2016-07-26 21:19:01 -06:00
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* MMU families
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2008-12-18 12:13:32 -07:00
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*/
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#define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
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#define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
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#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
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#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
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#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
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2014-07-08 01:10:45 -06:00
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#define MMU_FTR_TYPE_47x ASM_CONST(0x00000020)
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2008-12-18 12:13:32 -07:00
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2016-07-26 21:19:01 -06:00
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/* Radix page table supported and enabled */
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#define MMU_FTR_TYPE_RADIX ASM_CONST(0x00000040)
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2008-12-18 12:13:32 -07:00
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/*
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2016-07-26 21:19:01 -06:00
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* Individual features below.
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2008-12-18 12:13:32 -07:00
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*/
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2016-07-26 21:19:01 -06:00
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2017-03-29 00:21:53 -06:00
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/*
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* Support for 68 bit VA space. We added that from ISA 2.05
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*/
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#define MMU_FTR_68_BIT_VA ASM_CONST(0x00002000)
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2016-11-24 02:39:54 -07:00
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/*
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* Kernel read only support.
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* We added the ppp value 0b110 in ISA 2.04.
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*/
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#define MMU_FTR_KERNEL_RO ASM_CONST(0x00004000)
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2016-07-13 03:35:24 -06:00
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/*
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* We need to clear top 16bits of va (from the remaining 64 bits )in
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* tlbie* instructions
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*/
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#define MMU_FTR_TLBIE_CROP_VA ASM_CONST(0x00008000)
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2008-12-18 12:13:32 -07:00
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/* Enable use of high BAT registers */
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#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
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/* Enable >32-bit physical addresses on 32-bit processor, only used
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2018-11-17 03:24:56 -07:00
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* by CONFIG_PPC_BOOK3S_32 currently as BookE supports that from day 1
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2008-12-18 12:13:32 -07:00
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*/
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#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
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2008-12-18 12:13:38 -07:00
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/* Enable use of broadcast TLB invalidations. We don't always set it
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* on processors that support it due to other constraints with the
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* use of such invalidations
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*/
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#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
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2009-02-10 21:26:06 -07:00
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/* Enable use of tlbilx invalidate instructions.
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2008-12-18 12:13:38 -07:00
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*/
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2009-02-10 21:26:06 -07:00
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#define MMU_FTR_USE_TLBILX ASM_CONST(0x00080000)
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2008-12-18 12:13:38 -07:00
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/* This indicates that the processor cannot handle multiple outstanding
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* broadcast tlbivax or tlbsync. This makes the code use a spinlock
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* around such invalidate forms.
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*/
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#define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000)
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2009-03-18 21:55:41 -06:00
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/* This indicates that the processor doesn't handle way selection
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* properly and needs SW to track and update the LRU state. This
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* is specific to an errata on e300c2/c3/c4 class parts
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*/
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#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
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2009-08-24 09:52:48 -06:00
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/* Enable use of TLB reservation. Processor should support tlbsrx.
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* instruction and MAS0[WQ].
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*/
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#define MMU_FTR_USE_TLBRSRV ASM_CONST(0x00800000)
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/* Use paired MAS registers (MAS7||MAS3, etc.)
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*/
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#define MMU_FTR_USE_PAIRED_MAS ASM_CONST(0x01000000)
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2014-07-09 20:29:20 -06:00
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/* Doesn't support the B bit (1T segment) in SLBIE
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2011-04-06 13:48:50 -06:00
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*/
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2014-07-09 20:29:20 -06:00
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#define MMU_FTR_NO_SLBIE_B ASM_CONST(0x02000000)
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2011-04-06 13:48:50 -06:00
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/* Support 16M large pages
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*/
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#define MMU_FTR_16M_PAGE ASM_CONST(0x04000000)
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/* Supports TLBIEL variant
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*/
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#define MMU_FTR_TLBIEL ASM_CONST(0x08000000)
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/* Supports tlbies w/o locking
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*/
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#define MMU_FTR_LOCKLESS_TLBIE ASM_CONST(0x10000000)
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/* Large pages can be marked CI
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*/
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#define MMU_FTR_CI_LARGE_PAGE ASM_CONST(0x20000000)
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/* 1T segments available
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*/
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#define MMU_FTR_1T_SEGMENT ASM_CONST(0x40000000)
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/* MMU feature bit sets for various CPUs */
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#define MMU_FTRS_DEFAULT_HPTE_ARCH_V2 \
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MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2
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2018-02-20 12:08:29 -07:00
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#define MMU_FTRS_POWER MMU_FTRS_DEFAULT_HPTE_ARCH_V2
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#define MMU_FTRS_PPC970 MMU_FTRS_POWER | MMU_FTR_TLBIE_CROP_VA
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#define MMU_FTRS_POWER5 MMU_FTRS_POWER | MMU_FTR_LOCKLESS_TLBIE
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2017-03-29 00:21:53 -06:00
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#define MMU_FTRS_POWER6 MMU_FTRS_POWER5 | MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA
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#define MMU_FTRS_POWER7 MMU_FTRS_POWER6
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#define MMU_FTRS_POWER8 MMU_FTRS_POWER6
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#define MMU_FTRS_POWER9 MMU_FTRS_POWER6
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2011-04-06 13:48:50 -06:00
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#define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
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MMU_FTR_CI_LARGE_PAGE
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#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
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MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B
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2008-12-18 12:13:32 -07:00
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#ifndef __ASSEMBLY__
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powerpc: Add option to use jump label for cpu_has_feature()
We do binary patching of asm code using CPU features, which is a
one-time operation, done during early boot. However checks of CPU
features in C code are currently done at run time, even though the set
of CPU features can never change after boot.
We can optimise this by using jump labels to implement cpu_has_feature(),
meaning checks in C code are binary patched into a single nop or branch.
For a C sequence along the lines of:
if (cpu_has_feature(FOO))
return 2;
The generated code before is roughly:
ld r9,-27640(r2)
ld r9,0(r9)
lwz r9,32(r9)
cmpwi cr7,r9,0
bge cr7, 1f
li r3,2
blr
1: ...
After (true):
nop
li r3,2
blr
After (false):
b 1f
li r3,2
blr
1: ...
mpe: Rename MAX_CPU_FEATURES as we already have a #define with that
name, and define it simply as a constant, rather than doing tricks with
sizeof and NULL pointers. Rename the array to cpu_feature_keys. Use the
kconfig we added to guard it. Add BUILD_BUG_ON() if the feature is not a
compile time constant. Rewrite the change log.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-23 03:12:41 -06:00
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#include <linux/bug.h>
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2008-12-18 12:13:32 -07:00
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#include <asm/cputable.h>
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2011-06-28 13:54:47 -06:00
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#ifdef CONFIG_PPC_FSL_BOOK3E
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#include <asm/percpu.h>
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DECLARE_PER_CPU(int, next_tlbcam_idx);
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#endif
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2016-05-10 23:30:47 -06:00
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enum {
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2018-11-16 10:08:03 -07:00
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MMU_FTRS_POSSIBLE =
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#ifdef CONFIG_PPC_BOOK3S
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MMU_FTR_HPTE_TABLE |
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#endif
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#ifdef CONFIG_PPC_8xx
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MMU_FTR_TYPE_8xx |
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#endif
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#ifdef CONFIG_40x
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MMU_FTR_TYPE_40x |
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#endif
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#ifdef CONFIG_44x
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MMU_FTR_TYPE_44x |
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#endif
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#if defined(CONFIG_E200) || defined(CONFIG_E500)
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MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX |
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#endif
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#ifdef CONFIG_PPC_47x
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MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL |
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#endif
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#ifdef CONFIG_PPC_BOOK3S_32
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MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU |
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#endif
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#ifdef CONFIG_PPC_BOOK3E_64
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2016-05-10 23:30:47 -06:00
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MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
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2018-11-16 10:08:03 -07:00
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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2016-05-10 23:30:47 -06:00
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MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
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MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
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2016-07-13 03:35:24 -06:00
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MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA |
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2017-03-29 00:21:53 -06:00
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MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |
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2018-11-16 10:08:03 -07:00
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#endif
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2016-04-29 07:26:06 -06:00
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#ifdef CONFIG_PPC_RADIX_MMU
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2016-07-26 21:19:01 -06:00
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MMU_FTR_TYPE_RADIX |
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2016-04-29 07:26:06 -06:00
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#endif
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0,
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2016-05-10 23:30:47 -06:00
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};
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2016-07-27 04:48:36 -06:00
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static inline bool early_mmu_has_feature(unsigned long feature)
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2008-12-18 12:13:32 -07:00
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{
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2016-07-26 21:39:42 -06:00
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return !!(MMU_FTRS_POSSIBLE & cur_cpu_spec->mmu_features & feature);
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2008-12-18 12:13:32 -07:00
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}
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2016-07-23 03:12:42 -06:00
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#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
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#include <linux/jump_label.h>
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#define NUM_MMU_FTR_KEYS 32
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extern struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS];
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extern void mmu_feature_keys_init(void);
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static __always_inline bool mmu_has_feature(unsigned long feature)
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{
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int i;
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2017-01-23 22:36:57 -07:00
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#ifndef __clang__ /* clang can't cope with this */
|
2016-07-23 03:12:42 -06:00
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BUILD_BUG_ON(!__builtin_constant_p(feature));
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2017-01-23 22:36:57 -07:00
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#endif
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2016-07-23 03:12:42 -06:00
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2016-07-23 03:12:43 -06:00
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#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECK_DEBUG
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if (!static_key_initialized) {
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printk("Warning! mmu_has_feature() used prior to jump label init!\n");
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dump_stack();
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return early_mmu_has_feature(feature);
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}
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#endif
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|
2016-07-23 03:12:42 -06:00
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if (!(MMU_FTRS_POSSIBLE & feature))
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return false;
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i = __builtin_ctzl(feature);
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return static_branch_likely(&mmu_feature_keys[i]);
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}
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static inline void mmu_clear_feature(unsigned long feature)
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{
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int i;
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i = __builtin_ctzl(feature);
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cur_cpu_spec->mmu_features &= ~feature;
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static_branch_disable(&mmu_feature_keys[i]);
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}
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#else
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static inline void mmu_feature_keys_init(void)
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{
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}
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|
2016-07-27 04:48:36 -06:00
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static inline bool mmu_has_feature(unsigned long feature)
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{
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return early_mmu_has_feature(feature);
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}
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|
2011-07-04 12:38:03 -06:00
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static inline void mmu_clear_feature(unsigned long feature)
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{
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cur_cpu_spec->mmu_features &= ~feature;
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}
|
2016-07-23 03:12:42 -06:00
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|
#endif /* CONFIG_JUMP_LABEL */
|
2011-07-04 12:38:03 -06:00
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|
2008-12-18 12:13:32 -07:00
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extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
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|
2010-07-06 16:39:02 -06:00
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|
#ifdef CONFIG_PPC64
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/* This is our real memory area size on ppc64 server, on embedded, we
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* make it match the size our of bolted TLB area
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*/
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|
extern u64 ppc64_rma_size;
|
2016-08-19 02:52:37 -06:00
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|
/* Cleanup function used by kexec */
|
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|
extern void mmu_cleanup_all(void);
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|
extern void radix__mmu_cleanup_all(void);
|
2016-11-20 22:00:58 -07:00
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|
|
/* Functions for creating and updating partition table on POWER9 */
|
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|
|
extern void mmu_partition_table_init(void);
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|
|
extern void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
|
|
|
|
|
unsigned long dw1);
|
2010-07-06 16:39:02 -06:00
|
|
|
#endif /* CONFIG_PPC64 */
|
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|
2012-09-09 20:52:57 -06:00
|
|
|
struct mm_struct;
|
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|
|
#ifdef CONFIG_DEBUG_VM
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|
extern void assert_pte_locked(struct mm_struct *mm, unsigned long addr);
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|
#else /* CONFIG_DEBUG_VM */
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|
static inline void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
|
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|
|
|
{
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|
}
|
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|
#endif /* !CONFIG_DEBUG_VM */
|
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|
2016-07-26 21:37:58 -06:00
|
|
|
#ifdef CONFIG_PPC_RADIX_MMU
|
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|
|
|
static inline bool radix_enabled(void)
|
|
|
|
|
{
|
|
|
|
|
return mmu_has_feature(MMU_FTR_TYPE_RADIX);
|
|
|
|
|
}
|
2016-07-27 04:48:36 -06:00
|
|
|
|
|
|
|
|
static inline bool early_radix_enabled(void)
|
|
|
|
|
{
|
|
|
|
|
return early_mmu_has_feature(MMU_FTR_TYPE_RADIX);
|
|
|
|
|
}
|
2016-07-26 21:37:58 -06:00
|
|
|
#else
|
|
|
|
|
static inline bool radix_enabled(void)
|
|
|
|
|
{
|
|
|
|
|
return false;
|
|
|
|
|
}
|
2016-07-27 04:48:36 -06:00
|
|
|
|
|
|
|
|
static inline bool early_radix_enabled(void)
|
|
|
|
|
{
|
|
|
|
|
return false;
|
|
|
|
|
}
|
2016-07-26 21:37:58 -06:00
|
|
|
#endif
|
|
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|
|
|
2018-01-18 18:50:41 -07:00
|
|
|
#ifdef CONFIG_PPC_MEM_KEYS
|
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|
|
extern u16 get_mm_addr_key(struct mm_struct *mm, unsigned long address);
|
|
|
|
|
#else
|
|
|
|
|
static inline u16 get_mm_addr_key(struct mm_struct *mm, unsigned long address)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
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|
|
#endif /* CONFIG_PPC_MEM_KEYS */
|
|
|
|
|
|
2019-02-21 12:08:45 -07:00
|
|
|
#ifdef CONFIG_STRICT_KERNEL_RWX
|
|
|
|
|
static inline bool strict_kernel_rwx_enabled(void)
|
|
|
|
|
{
|
|
|
|
|
return rodata_enabled;
|
|
|
|
|
}
|
|
|
|
|
#else
|
|
|
|
|
static inline bool strict_kernel_rwx_enabled(void)
|
|
|
|
|
{
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2008-12-18 12:13:32 -07:00
|
|
|
#endif /* !__ASSEMBLY__ */
|
|
|
|
|
|
2009-07-27 19:59:34 -06:00
|
|
|
/* The kernel use the constants below to index in the page sizes array.
|
|
|
|
|
* The use of fixed constants for this purpose is better for performances
|
|
|
|
|
* of the low level hash refill handlers.
|
|
|
|
|
*
|
|
|
|
|
* A non supported page size has a "shift" field set to 0
|
|
|
|
|
*
|
|
|
|
|
* Any new page size being implemented can get a new entry in here. Whether
|
|
|
|
|
* the kernel will use it or not is a different matter though. The actual page
|
|
|
|
|
* size used by hugetlbfs is not defined here and may be made variable
|
|
|
|
|
*
|
|
|
|
|
* Note: This array ended up being a false good idea as it's growing to the
|
|
|
|
|
* point where I wonder if we should replace it with something different,
|
|
|
|
|
* to think about, feedback welcome. --BenH.
|
|
|
|
|
*/
|
|
|
|
|
|
2012-06-14 07:40:55 -06:00
|
|
|
/* These are #defines as they have to be used in assembly */
|
2009-07-27 19:59:34 -06:00
|
|
|
#define MMU_PAGE_4K 0
|
|
|
|
|
#define MMU_PAGE_16K 1
|
|
|
|
|
#define MMU_PAGE_64K 2
|
|
|
|
|
#define MMU_PAGE_64K_AP 3 /* "Admixed pages" (hash64 only) */
|
|
|
|
|
#define MMU_PAGE_256K 4
|
2016-12-07 00:47:28 -07:00
|
|
|
#define MMU_PAGE_512K 5
|
|
|
|
|
#define MMU_PAGE_1M 6
|
|
|
|
|
#define MMU_PAGE_2M 7
|
|
|
|
|
#define MMU_PAGE_4M 8
|
|
|
|
|
#define MMU_PAGE_8M 9
|
|
|
|
|
#define MMU_PAGE_16M 10
|
|
|
|
|
#define MMU_PAGE_64M 11
|
|
|
|
|
#define MMU_PAGE_256M 12
|
|
|
|
|
#define MMU_PAGE_1G 13
|
|
|
|
|
#define MMU_PAGE_16G 14
|
|
|
|
|
#define MMU_PAGE_64G 15
|
2013-10-11 18:22:38 -06:00
|
|
|
|
2017-03-29 00:21:53 -06:00
|
|
|
/*
|
|
|
|
|
* N.B. we need to change the type of hpte_page_sizes if this gets to be > 16
|
|
|
|
|
* Also we need to change he type of mm_context.low/high_slices_psize.
|
|
|
|
|
*/
|
2016-12-07 00:47:28 -07:00
|
|
|
#define MMU_PAGE_COUNT 16
|
2008-12-18 12:13:32 -07:00
|
|
|
|
2018-09-20 02:33:58 -06:00
|
|
|
/*
|
|
|
|
|
* If we store section details in page->flags we can't increase the MAX_PHYSMEM_BITS
|
|
|
|
|
* if we increase SECTIONS_WIDTH we will not store node details in page->flags and
|
|
|
|
|
* page_to_nid does a page->section->node lookup
|
|
|
|
|
* Hence only increase for VMEMMAP. Further depending on SPARSEMEM_EXTREME reduce
|
|
|
|
|
* memory requirements with large number of sections.
|
|
|
|
|
* 51 bits is the max physical real address on POWER9
|
|
|
|
|
*/
|
|
|
|
|
#if defined(CONFIG_SPARSEMEM_VMEMMAP) && defined(CONFIG_SPARSEMEM_EXTREME) && \
|
|
|
|
|
defined (CONFIG_PPC_64K_PAGES)
|
|
|
|
|
#define MAX_PHYSMEM_BITS 51
|
|
|
|
|
#else
|
|
|
|
|
#define MAX_PHYSMEM_BITS 46
|
|
|
|
|
#endif
|
|
|
|
|
|
2016-04-29 07:25:41 -06:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
|
|
#include <asm/book3s/64/mmu.h>
|
|
|
|
|
#else /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
|
|
2016-04-29 07:25:57 -06:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
/* MMU initialization */
|
|
|
|
|
extern void early_init_mmu(void);
|
|
|
|
|
extern void early_init_mmu_secondary(void);
|
|
|
|
|
extern void setup_initial_memory_limit(phys_addr_t first_memblock_base,
|
|
|
|
|
phys_addr_t first_memblock_size);
|
2016-07-26 04:09:30 -06:00
|
|
|
static inline void mmu_early_init_devtree(void) { }
|
2019-02-21 03:37:53 -07:00
|
|
|
|
|
|
|
|
extern void *abatron_pteptrs[2];
|
2016-04-29 07:25:57 -06:00
|
|
|
#endif /* __ASSEMBLY__ */
|
2016-04-29 07:25:41 -06:00
|
|
|
#endif
|
|
|
|
|
|
2018-11-17 03:25:02 -07:00
|
|
|
#if defined(CONFIG_PPC_BOOK3S_32)
|
2007-06-12 22:52:54 -06:00
|
|
|
/* 32-bit classic hash table MMU */
|
2016-03-01 00:29:20 -07:00
|
|
|
#include <asm/book3s/32/mmu-hash.h>
|
2018-11-29 07:06:55 -07:00
|
|
|
#elif defined(CONFIG_PPC_MMU_NOHASH)
|
|
|
|
|
#include <asm/nohash/mmu.h>
|
2005-05-05 17:15:13 -06:00
|
|
|
#endif
|
|
|
|
|
|
2005-12-16 14:43:46 -07:00
|
|
|
#endif /* __KERNEL__ */
|
2005-11-19 02:17:32 -07:00
|
|
|
#endif /* _ASM_POWERPC_MMU_H_ */
|