License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 08:07:57 -06:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2005-11-04 16:36:59 -07:00
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#ifdef CONFIG_PPC64
|
2006-03-28 05:15:54 -07:00
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#define PROVIDE32(x) PROVIDE(__unused__##x)
|
2005-11-04 16:36:59 -07:00
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#else
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2006-03-28 05:15:54 -07:00
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#define PROVIDE32(x) PROVIDE(x)
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2005-11-04 16:36:59 -07:00
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#endif
|
2018-10-14 20:49:58 -06:00
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#define BSS_FIRST_SECTIONS *(.bss.prominit)
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|
2008-04-15 13:52:26 -06:00
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#include <asm/page.h>
|
2005-09-26 00:04:21 -06:00
|
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#include <asm-generic/vmlinux.lds.h>
|
2007-07-03 22:04:31 -06:00
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#include <asm/cache.h>
|
2009-09-24 08:36:24 -06:00
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#include <asm/thread_info.h>
|
2005-09-26 00:04:21 -06:00
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|
2019-02-21 12:08:47 -07:00
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#define STRICT_ALIGN_SIZE (1 << CONFIG_DATA_SHIFT)
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#define ETEXT_ALIGN_SIZE (1 << CONFIG_ETEXT_SHIFT)
|
2017-06-28 11:04:06 -06:00
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|
2005-11-02 22:03:06 -07:00
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ENTRY(_stext)
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|
2008-07-21 17:03:45 -06:00
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PHDRS {
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kernel PT_LOAD FLAGS(7); /* RWX */
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notes PT_NOTE FLAGS(0);
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dummy PT_NOTE FLAGS(0);
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/* binutils < 2.18 has a bug that makes it misbehave when taking an
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ELF file with all segments at load address 0 as input. This
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happens when running "strip" on vmlinux, because of the AT() magic
|
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in this linker script. People using GCC >= 4.2 won't run into
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this problem, because the "build-id" support will put some data
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into the "notes" segment (at a non-zero load address).
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To work around this, we force some data into both the "dummy"
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segment and the kernel segment, so the dummy segment will get a
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non-zero load address. It's not enough to always create the
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"notes" segment, since if nothing gets assigned to it, its load
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address will be zero. */
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}
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|
2005-09-30 00:16:52 -06:00
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#ifdef CONFIG_PPC64
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|
OUTPUT_ARCH(powerpc:common64)
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jiffies = jiffies_64;
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#else
|
2005-09-26 00:04:21 -06:00
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OUTPUT_ARCH(powerpc:common)
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jiffies = jiffies_64 + 4;
|
2005-09-30 00:16:52 -06:00
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|
#endif
|
2005-09-26 00:04:21 -06:00
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SECTIONS
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{
|
2006-03-28 05:15:54 -07:00
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. = KERNELBASE;
|
2005-09-26 00:04:21 -06:00
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|
2006-03-28 05:15:54 -07:00
|
|
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/*
|
|
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* Text, read only data and other permanent read-only sections
|
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|
*/
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|
2016-09-27 19:31:48 -06:00
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_text = .;
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_stext = .;
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|
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/*
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* Head text.
|
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* This needs to be in its own output section to avoid ld placing
|
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|
* branch trampoline stubs randomly throughout the fixed sections,
|
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* which it will do (even if the branch comes from another section)
|
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|
* in order to optimize stub generation.
|
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*/
|
|
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.head.text : AT(ADDR(.head.text) - LOAD_OFFSET) {
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|
#ifdef CONFIG_PPC64
|
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KEEP(*(.head.text.first_256B));
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#ifdef CONFIG_PPC_BOOK3E
|
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#else
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KEEP(*(.head.text.real_vectors));
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*(.head.text.real_trampolines);
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KEEP(*(.head.text.virt_vectors));
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*(.head.text.virt_trampolines);
|
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# if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
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KEEP(*(.head.data.fwnmi_page));
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# endif
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#endif
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#else /* !CONFIG_PPC64 */
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HEAD_TEXT
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#endif
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} :kernel
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2017-04-19 09:29:51 -06:00
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__head_end = .;
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|
2016-11-25 20:20:31 -07:00
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#ifdef CONFIG_PPC64
|
|
|
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/*
|
2019-01-11 16:50:56 -07:00
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* ALIGN(0) overrides the default output section alignment because
|
2016-11-25 20:20:31 -07:00
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|
* this needs to start right after .head.text in order for fixed
|
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* section placement to work.
|
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*/
|
2019-01-11 16:50:56 -07:00
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.text ALIGN(0) : AT(ADDR(.text) - LOAD_OFFSET) {
|
2017-05-29 01:39:40 -06:00
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#ifdef CONFIG_LD_HEAD_STUB_CATCH
|
2018-05-09 07:00:01 -06:00
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KEEP(*(.linker_stub_catch));
|
2017-05-29 01:39:40 -06:00
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. = . ;
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#endif
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|
2016-11-25 20:20:31 -07:00
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#else
|
2008-04-15 13:52:28 -06:00
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.text : AT(ADDR(.text) - LOAD_OFFSET) {
|
2007-09-13 14:42:35 -06:00
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ALIGN_FUNCTION();
|
2016-11-25 20:20:31 -07:00
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#endif
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2009-04-28 09:47:15 -06:00
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/* careful! __ftr_alt_* sections need to be close to .text */
|
2021-01-04 13:59:53 -07:00
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*(.text.hot .text.hot.* TEXT_MAIN .text.fixup .text.unlikely .text.unlikely.* .fixup __ftr_alt_* .ref.text);
|
powerpc/ftrace: Handle large kernel configs
Currently, we expect to be able to reach ftrace_caller() from all
ftrace-enabled functions through a single relative branch. With large
kernel configs, we see functions outside of 32MB of ftrace_caller()
causing ftrace_init() to bail.
In such configurations, gcc/ld emits two types of trampolines for mcount():
1. A long_branch, which has a single branch to mcount() for functions that
are one hop away from mcount():
c0000000019e8544 <00031b56.long_branch._mcount>:
c0000000019e8544: 4a 69 3f ac b c00000000007c4f0 <._mcount>
2. A plt_branch, for functions that are farther away from mcount():
c0000000051f33f8 <0008ba04.plt_branch._mcount>:
c0000000051f33f8: 3d 82 ff a4 addis r12,r2,-92
c0000000051f33fc: e9 8c 04 20 ld r12,1056(r12)
c0000000051f3400: 7d 89 03 a6 mtctr r12
c0000000051f3404: 4e 80 04 20 bctr
We can reuse those trampolines for ftrace if we can have those
trampolines go to ftrace_caller() instead. However, with ABIv2, we
cannot depend on r2 being valid. As such, we use only the long_branch
trampolines by patching those to instead branch to ftrace_caller or
ftrace_regs_caller.
In addition, we add additional trampolines around .text and .init.text
to catch locations that are covered by the plt branches. This allows
ftrace to work with most large kernel configurations.
For now, we always patch the trampolines to go to ftrace_regs_caller,
which is slightly inefficient. This can be optimized further at a later
point.
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-10-16 14:25:00 -06:00
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
|
*(.tramp.ftrace.text);
|
|
|
|
|
#endif
|
2006-03-28 05:15:54 -07:00
|
|
|
SCHED_TEXT
|
2016-10-07 18:02:55 -06:00
|
|
|
CPUIDLE_TEXT
|
2006-03-28 05:15:54 -07:00
|
|
|
LOCK_TEXT
|
|
|
|
|
KPROBES_TEXT
|
2009-02-09 22:10:27 -07:00
|
|
|
IRQENTRY_TEXT
|
2016-03-25 15:22:05 -06:00
|
|
|
SOFTIRQENTRY_TEXT
|
2017-05-11 09:56:48 -06:00
|
|
|
/*
|
|
|
|
|
* -Os builds call FP save/restore functions. The powerpc64
|
|
|
|
|
* linker generates those on demand in the .sfpr section.
|
|
|
|
|
* .sfpr gets placed at the beginning of a group of input
|
|
|
|
|
* sections, which can break start-of-text offset if it is
|
|
|
|
|
* included with the main text sections, so put it by itself.
|
|
|
|
|
*/
|
|
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|
|
*(.sfpr);
|
powerpc: Ensure .mem(init|exit).text are within _stext/_etext
In our linker script we open code the list of text sections, because we
need to include the __ftr_alt sections, which are arch-specific.
This means we can't use TEXT_TEXT as defined in vmlinux.lds.h, and so we
don't have the MEM_KEEP() logic for memory hotplug sections.
If we build the kernel with the gold linker, and with CONFIG_MEMORY_HOTPLUG=y,
we see that functions marked __meminit can end up outside of the
_stext/_etext range, and also outside of _sinittext/_einittext, eg:
c000000000000000 T _stext
c0000000009e0000 A _etext
c0000000009e3f18 T hash__vmemmap_create_mapping
c000000000ca0000 T _sinittext
c000000000d00844 T _einittext
This causes them to not be recognised as text by is_kernel_text(), and
prevents them being patched by jump_label (and presumably ftrace/kprobes
etc.).
Fix it by adding MEM_KEEP() directives, mirroring what TEXT_TEXT does.
This isn't a problem when CONFIG_MEMORY_HOTPLUG=n, because we use the
standard INIT_TEXT_SECTION() and EXIT_TEXT macros from vmlinux.lds.h.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Tested-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-09-14 23:11:59 -06:00
|
|
|
MEM_KEEP(init.text)
|
|
|
|
|
MEM_KEEP(exit.text)
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2006-03-28 05:15:54 -07:00
|
|
|
#ifdef CONFIG_PPC32
|
|
|
|
|
*(.got1)
|
|
|
|
|
__got2_start = .;
|
|
|
|
|
*(.got2)
|
|
|
|
|
__got2_end = .;
|
|
|
|
|
#endif /* CONFIG_PPC32 */
|
|
|
|
|
|
2008-07-21 17:03:45 -06:00
|
|
|
} :kernel
|
2006-03-28 05:15:54 -07:00
|
|
|
|
2019-02-21 12:08:47 -07:00
|
|
|
. = ALIGN(ETEXT_ALIGN_SIZE);
|
2008-09-01 23:04:09 -06:00
|
|
|
_etext = .;
|
|
|
|
|
PROVIDE32 (etext = .);
|
|
|
|
|
|
2006-03-28 05:15:54 -07:00
|
|
|
/* Read-only data */
|
2017-06-28 11:04:06 -06:00
|
|
|
RO_DATA(PAGE_SIZE)
|
2006-03-28 05:15:54 -07:00
|
|
|
|
powerpc/64s: Add support for RFI flush of L1-D cache
On some CPUs we can prevent the Meltdown vulnerability by flushing the
L1-D cache on exit from kernel to user mode, and from hypervisor to
guest.
This is known to be the case on at least Power7, Power8 and Power9. At
this time we do not know the status of the vulnerability on other CPUs
such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale
CPUs. As more information comes to light we can enable this, or other
mechanisms on those CPUs.
The vulnerability occurs when the load of an architecturally
inaccessible memory region (eg. userspace load of kernel memory) is
speculatively executed to the point where its result can influence the
address of a subsequent speculatively executed load.
In order for that to happen, the first load must hit in the L1,
because before the load is sent to the L2 the permission check is
performed. Therefore if no kernel addresses hit in the L1 the
vulnerability can not occur. We can ensure that is the case by
flushing the L1 whenever we return to userspace. Similarly for
hypervisor vs guest.
In order to flush the L1-D cache on exit, we add a section of nops at
each (h)rfi location that returns to a lower privileged context, and
patch that with some sequence. Newer firmwares are able to advertise
to us that there is a special nop instruction that flushes the L1-D.
If we do not see that advertised, we fall back to doing a displacement
flush in software.
For guest kernels we support migration between some CPU versions, and
different CPUs may use different flush instructions. So that we are
prepared to migrate to a machine with a different flush instruction
activated, we may have to patch more than one flush instruction at
boot if the hypervisor tells us to.
In the end this patch is mostly the work of Nicholas Piggin and
Michael Ellerman. However a cast of thousands contributed to analysis
of the issue, earlier versions of the patch, back ports testing etc.
Many thanks to all of them.
Tested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-01-09 09:07:15 -07:00
|
|
|
#ifdef CONFIG_PPC64
|
2018-05-21 17:00:00 -06:00
|
|
|
. = ALIGN(8);
|
|
|
|
|
__stf_entry_barrier_fixup : AT(ADDR(__stf_entry_barrier_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___stf_entry_barrier_fixup = .;
|
|
|
|
|
*(__stf_entry_barrier_fixup)
|
|
|
|
|
__stop___stf_entry_barrier_fixup = .;
|
|
|
|
|
}
|
|
|
|
|
|
2020-11-19 16:35:14 -07:00
|
|
|
. = ALIGN(8);
|
|
|
|
|
__uaccess_flush_fixup : AT(ADDR(__uaccess_flush_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___uaccess_flush_fixup = .;
|
|
|
|
|
*(__uaccess_flush_fixup)
|
|
|
|
|
__stop___uaccess_flush_fixup = .;
|
|
|
|
|
}
|
|
|
|
|
|
2020-11-19 16:35:13 -07:00
|
|
|
. = ALIGN(8);
|
|
|
|
|
__entry_flush_fixup : AT(ADDR(__entry_flush_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___entry_flush_fixup = .;
|
|
|
|
|
*(__entry_flush_fixup)
|
|
|
|
|
__stop___entry_flush_fixup = .;
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-21 17:00:00 -06:00
|
|
|
. = ALIGN(8);
|
|
|
|
|
__stf_exit_barrier_fixup : AT(ADDR(__stf_exit_barrier_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___stf_exit_barrier_fixup = .;
|
|
|
|
|
*(__stf_exit_barrier_fixup)
|
|
|
|
|
__stop___stf_exit_barrier_fixup = .;
|
|
|
|
|
}
|
|
|
|
|
|
powerpc/64s: Add support for RFI flush of L1-D cache
On some CPUs we can prevent the Meltdown vulnerability by flushing the
L1-D cache on exit from kernel to user mode, and from hypervisor to
guest.
This is known to be the case on at least Power7, Power8 and Power9. At
this time we do not know the status of the vulnerability on other CPUs
such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale
CPUs. As more information comes to light we can enable this, or other
mechanisms on those CPUs.
The vulnerability occurs when the load of an architecturally
inaccessible memory region (eg. userspace load of kernel memory) is
speculatively executed to the point where its result can influence the
address of a subsequent speculatively executed load.
In order for that to happen, the first load must hit in the L1,
because before the load is sent to the L2 the permission check is
performed. Therefore if no kernel addresses hit in the L1 the
vulnerability can not occur. We can ensure that is the case by
flushing the L1 whenever we return to userspace. Similarly for
hypervisor vs guest.
In order to flush the L1-D cache on exit, we add a section of nops at
each (h)rfi location that returns to a lower privileged context, and
patch that with some sequence. Newer firmwares are able to advertise
to us that there is a special nop instruction that flushes the L1-D.
If we do not see that advertised, we fall back to doing a displacement
flush in software.
For guest kernels we support migration between some CPU versions, and
different CPUs may use different flush instructions. So that we are
prepared to migrate to a machine with a different flush instruction
activated, we may have to patch more than one flush instruction at
boot if the hypervisor tells us to.
In the end this patch is mostly the work of Nicholas Piggin and
Michael Ellerman. However a cast of thousands contributed to analysis
of the issue, earlier versions of the patch, back ports testing etc.
Many thanks to all of them.
Tested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-01-09 09:07:15 -07:00
|
|
|
. = ALIGN(8);
|
|
|
|
|
__rfi_flush_fixup : AT(ADDR(__rfi_flush_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___rfi_flush_fixup = .;
|
|
|
|
|
*(__rfi_flush_fixup)
|
|
|
|
|
__stop___rfi_flush_fixup = .;
|
|
|
|
|
}
|
2018-07-27 17:06:34 -06:00
|
|
|
#endif /* CONFIG_PPC64 */
|
2018-04-23 22:15:55 -06:00
|
|
|
|
2018-07-27 17:06:34 -06:00
|
|
|
#ifdef CONFIG_PPC_BARRIER_NOSPEC
|
2018-04-23 22:15:55 -06:00
|
|
|
. = ALIGN(8);
|
|
|
|
|
__spec_barrier_fixup : AT(ADDR(__spec_barrier_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___barrier_nospec_fixup = .;
|
|
|
|
|
*(__barrier_nospec_fixup)
|
|
|
|
|
__stop___barrier_nospec_fixup = .;
|
|
|
|
|
}
|
2018-07-27 17:06:34 -06:00
|
|
|
#endif /* CONFIG_PPC_BARRIER_NOSPEC */
|
powerpc/64s: Add support for RFI flush of L1-D cache
On some CPUs we can prevent the Meltdown vulnerability by flushing the
L1-D cache on exit from kernel to user mode, and from hypervisor to
guest.
This is known to be the case on at least Power7, Power8 and Power9. At
this time we do not know the status of the vulnerability on other CPUs
such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale
CPUs. As more information comes to light we can enable this, or other
mechanisms on those CPUs.
The vulnerability occurs when the load of an architecturally
inaccessible memory region (eg. userspace load of kernel memory) is
speculatively executed to the point where its result can influence the
address of a subsequent speculatively executed load.
In order for that to happen, the first load must hit in the L1,
because before the load is sent to the L2 the permission check is
performed. Therefore if no kernel addresses hit in the L1 the
vulnerability can not occur. We can ensure that is the case by
flushing the L1 whenever we return to userspace. Similarly for
hypervisor vs guest.
In order to flush the L1-D cache on exit, we add a section of nops at
each (h)rfi location that returns to a lower privileged context, and
patch that with some sequence. Newer firmwares are able to advertise
to us that there is a special nop instruction that flushes the L1-D.
If we do not see that advertised, we fall back to doing a displacement
flush in software.
For guest kernels we support migration between some CPU versions, and
different CPUs may use different flush instructions. So that we are
prepared to migrate to a machine with a different flush instruction
activated, we may have to patch more than one flush instruction at
boot if the hypervisor tells us to.
In the end this patch is mostly the work of Nicholas Piggin and
Michael Ellerman. However a cast of thousands contributed to analysis
of the issue, earlier versions of the patch, back ports testing etc.
Many thanks to all of them.
Tested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-01-09 09:07:15 -07:00
|
|
|
|
2018-12-12 07:03:00 -07:00
|
|
|
#ifdef CONFIG_PPC_FSL_BOOK3E
|
|
|
|
|
. = ALIGN(8);
|
|
|
|
|
__spec_btb_flush_fixup : AT(ADDR(__spec_btb_flush_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start__btb_flush_fixup = .;
|
|
|
|
|
*(__btb_flush_fixup)
|
|
|
|
|
__stop__btb_flush_fixup = .;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2009-09-24 08:36:24 -06:00
|
|
|
EXCEPTION_TABLE(0)
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2008-07-21 17:03:45 -06:00
|
|
|
NOTES :kernel :notes
|
|
|
|
|
|
|
|
|
|
/* The dummy segment contents for the bug workaround mentioned above
|
|
|
|
|
near PHDRS. */
|
2008-07-24 18:08:41 -06:00
|
|
|
.dummy : AT(ADDR(.dummy) - LOAD_OFFSET) {
|
2009-01-02 03:46:04 -07:00
|
|
|
LONG(0)
|
|
|
|
|
LONG(0)
|
|
|
|
|
LONG(0)
|
2008-07-21 17:03:45 -06:00
|
|
|
} :kernel :dummy
|
2007-07-19 02:48:38 -06:00
|
|
|
|
2006-03-28 05:15:54 -07:00
|
|
|
/*
|
|
|
|
|
* Init sections discarded at runtime
|
|
|
|
|
*/
|
2017-06-28 11:04:06 -06:00
|
|
|
. = ALIGN(STRICT_ALIGN_SIZE);
|
2006-03-28 05:15:54 -07:00
|
|
|
__init_begin = .;
|
powerpc/ftrace: Handle large kernel configs
Currently, we expect to be able to reach ftrace_caller() from all
ftrace-enabled functions through a single relative branch. With large
kernel configs, we see functions outside of 32MB of ftrace_caller()
causing ftrace_init() to bail.
In such configurations, gcc/ld emits two types of trampolines for mcount():
1. A long_branch, which has a single branch to mcount() for functions that
are one hop away from mcount():
c0000000019e8544 <00031b56.long_branch._mcount>:
c0000000019e8544: 4a 69 3f ac b c00000000007c4f0 <._mcount>
2. A plt_branch, for functions that are farther away from mcount():
c0000000051f33f8 <0008ba04.plt_branch._mcount>:
c0000000051f33f8: 3d 82 ff a4 addis r12,r2,-92
c0000000051f33fc: e9 8c 04 20 ld r12,1056(r12)
c0000000051f3400: 7d 89 03 a6 mtctr r12
c0000000051f3404: 4e 80 04 20 bctr
We can reuse those trampolines for ftrace if we can have those
trampolines go to ftrace_caller() instead. However, with ABIv2, we
cannot depend on r2 being valid. As such, we use only the long_branch
trampolines by patching those to instead branch to ftrace_caller or
ftrace_regs_caller.
In addition, we add additional trampolines around .text and .init.text
to catch locations that are covered by the plt branches. This allows
ftrace to work with most large kernel configurations.
For now, we always patch the trampolines to go to ftrace_regs_caller,
which is slightly inefficient. This can be optimized further at a later
point.
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-10-16 14:25:00 -06:00
|
|
|
. = ALIGN(PAGE_SIZE);
|
|
|
|
|
.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
|
|
|
|
|
_sinittext = .;
|
|
|
|
|
INIT_TEXT
|
|
|
|
|
_einittext = .;
|
|
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
|
*(.tramp.ftrace.init);
|
|
|
|
|
#endif
|
|
|
|
|
} :kernel
|
2006-03-28 05:15:54 -07:00
|
|
|
|
|
|
|
|
/* .exit.text is discarded at runtime, not link time,
|
|
|
|
|
* to deal with references from __bug_table
|
|
|
|
|
*/
|
2008-04-15 13:52:28 -06:00
|
|
|
.exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
|
2008-01-20 06:15:03 -07:00
|
|
|
EXIT_TEXT
|
|
|
|
|
}
|
2006-03-28 05:15:54 -07:00
|
|
|
|
2008-04-15 13:52:28 -06:00
|
|
|
.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
|
2008-01-20 06:15:03 -07:00
|
|
|
INIT_DATA
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
|
|
|
|
|
2008-04-15 13:52:28 -06:00
|
|
|
.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
INIT_SETUP(16)
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
|
|
|
|
|
2008-04-15 13:52:28 -06:00
|
|
|
.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
INIT_CALLS
|
|
|
|
|
}
|
2006-03-28 05:15:54 -07:00
|
|
|
|
2008-04-15 13:52:28 -06:00
|
|
|
.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
CON_INITCALL
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
. = ALIGN(8);
|
2008-04-15 13:52:28 -06:00
|
|
|
__ftr_fixup : AT(ADDR(__ftr_fixup) - LOAD_OFFSET) {
|
2005-09-30 00:16:52 -06:00
|
|
|
__start___ftr_fixup = .;
|
2018-05-09 07:00:01 -06:00
|
|
|
KEEP(*(__ftr_fixup))
|
2005-09-30 00:16:52 -06:00
|
|
|
__stop___ftr_fixup = .;
|
|
|
|
|
}
|
2008-07-01 09:16:40 -06:00
|
|
|
. = ALIGN(8);
|
2008-12-18 12:13:32 -07:00
|
|
|
__mmu_ftr_fixup : AT(ADDR(__mmu_ftr_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___mmu_ftr_fixup = .;
|
2018-05-09 07:00:01 -06:00
|
|
|
KEEP(*(__mmu_ftr_fixup))
|
2008-12-18 12:13:32 -07:00
|
|
|
__stop___mmu_ftr_fixup = .;
|
|
|
|
|
}
|
|
|
|
|
. = ALIGN(8);
|
2008-07-01 09:16:40 -06:00
|
|
|
__lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
|
|
|
|
|
__start___lwsync_fixup = .;
|
2018-05-09 07:00:01 -06:00
|
|
|
KEEP(*(__lwsync_fixup))
|
2008-07-01 09:16:40 -06:00
|
|
|
__stop___lwsync_fixup = .;
|
|
|
|
|
}
|
2006-09-25 02:19:00 -06:00
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
|
. = ALIGN(8);
|
2008-04-15 13:52:28 -06:00
|
|
|
__fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) {
|
2006-09-25 02:19:00 -06:00
|
|
|
__start___fw_ftr_fixup = .;
|
2018-05-09 07:00:01 -06:00
|
|
|
KEEP(*(__fw_ftr_fixup))
|
2006-09-25 02:19:00 -06:00
|
|
|
__stop___fw_ftr_fixup = .;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2008-04-15 13:52:28 -06:00
|
|
|
.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
INIT_RAM_FS
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
2009-09-24 08:36:24 -06:00
|
|
|
|
2011-03-24 11:50:09 -06:00
|
|
|
PERCPU_SECTION(L1_CACHE_BYTES)
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2006-03-28 05:15:54 -07:00
|
|
|
. = ALIGN(8);
|
2008-04-15 13:52:28 -06:00
|
|
|
.machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
|
2006-03-28 05:15:54 -07:00
|
|
|
__machine_desc_start = . ;
|
2018-05-09 07:00:01 -06:00
|
|
|
KEEP(*(.machine.desc))
|
2006-03-28 05:15:54 -07:00
|
|
|
__machine_desc_end = . ;
|
|
|
|
|
}
|
2008-10-22 12:43:45 -06:00
|
|
|
#ifdef CONFIG_RELOCATABLE
|
powerpc: Make the 64-bit kernel as a position-independent executable
This implements CONFIG_RELOCATABLE for 64-bit by making the kernel as
a position-independent executable (PIE) when it is set. This involves
processing the dynamic relocations in the image in the early stages of
booting, even if the kernel is being run at the address it is linked at,
since the linker does not necessarily fill in words in the image for
which there are dynamic relocations. (In fact the linker does fill in
such words for 64-bit executables, though not for 32-bit executables,
so in principle we could avoid calling relocate() entirely when we're
running a 64-bit kernel at the linked address.)
The dynamic relocations are processed by a new function relocate(addr),
where the addr parameter is the virtual address where the image will be
run. In fact we call it twice; once before calling prom_init, and again
when starting the main kernel. This means that reloc_offset() returns
0 in prom_init (since it has been relocated to the address it is running
at), which necessitated a few adjustments.
This also changes __va and __pa to use an equivalent definition that is
simpler. With the relocatable kernel, PAGE_OFFSET and MEMORY_START are
constants (for 64-bit) whereas PHYSICAL_START is a variable (and
KERNELBASE ideally should be too, but isn't yet).
With this, relocatable kernels still copy themselves down to physical
address 0 and run there.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-08-29 19:43:47 -06:00
|
|
|
. = ALIGN(8);
|
2011-12-14 15:58:12 -07:00
|
|
|
.dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET)
|
|
|
|
|
{
|
2016-07-12 19:14:40 -06:00
|
|
|
#ifdef CONFIG_PPC32
|
2011-12-14 15:58:12 -07:00
|
|
|
__dynamic_symtab = .;
|
|
|
|
|
#endif
|
|
|
|
|
*(.dynsym)
|
|
|
|
|
}
|
powerpc: Make the 64-bit kernel as a position-independent executable
This implements CONFIG_RELOCATABLE for 64-bit by making the kernel as
a position-independent executable (PIE) when it is set. This involves
processing the dynamic relocations in the image in the early stages of
booting, even if the kernel is being run at the address it is linked at,
since the linker does not necessarily fill in words in the image for
which there are dynamic relocations. (In fact the linker does fill in
such words for 64-bit executables, though not for 32-bit executables,
so in principle we could avoid calling relocate() entirely when we're
running a 64-bit kernel at the linked address.)
The dynamic relocations are processed by a new function relocate(addr),
where the addr parameter is the virtual address where the image will be
run. In fact we call it twice; once before calling prom_init, and again
when starting the main kernel. This means that reloc_offset() returns
0 in prom_init (since it has been relocated to the address it is running
at), which necessitated a few adjustments.
This also changes __va and __pa to use an equivalent definition that is
simpler. With the relocatable kernel, PAGE_OFFSET and MEMORY_START are
constants (for 64-bit) whereas PHYSICAL_START is a variable (and
KERNELBASE ideally should be too, but isn't yet).
With this, relocatable kernels still copy themselves down to physical
address 0 and run there.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-08-29 19:43:47 -06:00
|
|
|
.dynstr : AT(ADDR(.dynstr) - LOAD_OFFSET) { *(.dynstr) }
|
|
|
|
|
.dynamic : AT(ADDR(.dynamic) - LOAD_OFFSET)
|
|
|
|
|
{
|
|
|
|
|
__dynamic_start = .;
|
|
|
|
|
*(.dynamic)
|
|
|
|
|
}
|
|
|
|
|
.hash : AT(ADDR(.hash) - LOAD_OFFSET) { *(.hash) }
|
|
|
|
|
.interp : AT(ADDR(.interp) - LOAD_OFFSET) { *(.interp) }
|
|
|
|
|
.rela.dyn : AT(ADDR(.rela.dyn) - LOAD_OFFSET)
|
|
|
|
|
{
|
|
|
|
|
__rela_dyn_start = .;
|
|
|
|
|
*(.rela*)
|
|
|
|
|
}
|
2008-10-22 12:43:45 -06:00
|
|
|
#endif
|
2015-10-07 17:28:28 -06:00
|
|
|
/* .exit.data is discarded at runtime, not link time,
|
|
|
|
|
* to deal with references from .exit.text
|
|
|
|
|
*/
|
|
|
|
|
.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
|
|
|
|
|
EXIT_DATA
|
|
|
|
|
}
|
2006-03-28 05:15:54 -07:00
|
|
|
|
|
|
|
|
/* freed after init ends here */
|
|
|
|
|
. = ALIGN(PAGE_SIZE);
|
|
|
|
|
__init_end = .;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* And now the various read/write data
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
. = ALIGN(PAGE_SIZE);
|
|
|
|
|
_sdata = .;
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2005-09-30 00:16:52 -06:00
|
|
|
#ifdef CONFIG_PPC32
|
2008-04-15 13:52:28 -06:00
|
|
|
.data : AT(ADDR(.data) - LOAD_OFFSET) {
|
2007-05-17 05:38:44 -06:00
|
|
|
DATA_DATA
|
2018-10-31 06:31:56 -06:00
|
|
|
#ifdef CONFIG_UBSAN
|
|
|
|
|
*(.data..Lubsan_data*)
|
|
|
|
|
*(.data..Lubsan_type*)
|
|
|
|
|
#endif
|
2017-11-13 05:06:55 -07:00
|
|
|
*(.data.rel*)
|
2018-05-09 07:00:01 -06:00
|
|
|
*(SDATA_MAIN)
|
2017-05-11 11:40:40 -06:00
|
|
|
*(.sdata2)
|
2006-03-28 05:15:54 -07:00
|
|
|
*(.got.plt) *(.got)
|
2017-05-11 11:40:40 -06:00
|
|
|
*(.plt)
|
2018-11-13 20:02:18 -07:00
|
|
|
*(.branch_lt)
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
2005-09-30 00:16:52 -06:00
|
|
|
#else
|
2008-04-15 13:52:28 -06:00
|
|
|
.data : AT(ADDR(.data) - LOAD_OFFSET) {
|
2007-06-16 20:29:04 -06:00
|
|
|
DATA_DATA
|
|
|
|
|
*(.data.rel*)
|
|
|
|
|
*(.toc1)
|
2006-03-28 05:15:54 -07:00
|
|
|
*(.branch_lt)
|
|
|
|
|
}
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2008-04-15 13:52:28 -06:00
|
|
|
.opd : AT(ADDR(.opd) - LOAD_OFFSET) {
|
2017-11-09 16:48:27 -07:00
|
|
|
__start_opd = .;
|
2018-05-09 07:00:01 -06:00
|
|
|
KEEP(*(.opd))
|
2017-11-09 16:48:27 -07:00
|
|
|
__end_opd = .;
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
|
|
|
|
|
2015-05-13 22:45:40 -06:00
|
|
|
. = ALIGN(256);
|
2008-04-15 13:52:28 -06:00
|
|
|
.got : AT(ADDR(.got) - LOAD_OFFSET) {
|
2006-03-28 05:15:54 -07:00
|
|
|
__toc_start = .;
|
2012-11-26 10:39:03 -07:00
|
|
|
#ifndef CONFIG_RELOCATABLE
|
|
|
|
|
__prom_init_toc_start = .;
|
|
|
|
|
arch/powerpc/kernel/prom_init.o*(.toc .got)
|
|
|
|
|
__prom_init_toc_end = .;
|
|
|
|
|
#endif
|
2006-03-28 05:15:54 -07:00
|
|
|
*(.got)
|
|
|
|
|
*(.toc)
|
|
|
|
|
}
|
2005-09-30 00:16:52 -06:00
|
|
|
#endif
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2006-03-28 05:15:54 -07:00
|
|
|
/* The initial task and kernel stack */
|
2010-02-19 17:03:35 -07:00
|
|
|
INIT_TASK_DATA_SECTION(THREAD_SIZE)
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2010-02-19 17:03:37 -07:00
|
|
|
.data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
PAGE_ALIGNED_DATA(PAGE_SIZE)
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2010-02-19 17:03:34 -07:00
|
|
|
.data..cacheline_aligned : AT(ADDR(.data..cacheline_aligned) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2010-02-19 17:03:44 -07:00
|
|
|
.data..read_mostly : AT(ADDR(.data..read_mostly) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
READ_MOSTLY_DATA(L1_CACHE_BYTES)
|
2007-07-03 22:04:31 -06:00
|
|
|
}
|
|
|
|
|
|
2009-09-29 00:00:06 -06:00
|
|
|
. = ALIGN(PAGE_SIZE);
|
2008-04-15 13:52:28 -06:00
|
|
|
.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
|
2009-09-24 08:36:24 -06:00
|
|
|
NOSAVE_DATA
|
2006-03-28 05:15:54 -07:00
|
|
|
}
|
2005-10-10 06:38:46 -06:00
|
|
|
|
2017-03-30 09:49:27 -06:00
|
|
|
BUG_TABLE
|
|
|
|
|
|
2009-08-09 13:06:24 -06:00
|
|
|
. = ALIGN(PAGE_SIZE);
|
|
|
|
|
_edata = .;
|
|
|
|
|
PROVIDE32 (edata = .);
|
|
|
|
|
|
2006-03-28 05:15:54 -07:00
|
|
|
/*
|
|
|
|
|
* And finally the bss
|
|
|
|
|
*/
|
|
|
|
|
|
2009-09-24 08:36:24 -06:00
|
|
|
BSS_SECTION(0, 0, 0)
|
2005-09-26 00:04:21 -06:00
|
|
|
|
2006-03-28 05:15:54 -07:00
|
|
|
. = ALIGN(PAGE_SIZE);
|
|
|
|
|
_end = . ;
|
|
|
|
|
PROVIDE32 (end = .);
|
linker script: unify usage of discard definition
Discarded sections in different archs share some commonality but have
considerable differences. This led to linker script for each arch
implementing its own /DISCARD/ definition, which makes maintaining
tedious and adding new entries error-prone.
This patch makes all linker scripts to move discard definitions to the
end of the linker script and use the common DISCARDS macro. As ld
uses the first matching section definition, archs can include default
discarded sections by including them earlier in the linker script.
ia64 is notable because it first throws away some ia64 specific
subsections and then include the rest of the sections into the final
image, so those sections must be discarded before the inclusion.
defconfig compile tested for x86, x86-64, powerpc, powerpc64, ia64,
alpha, sparc, sparc64 and s390. Michal Simek tested microblaze.
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Michal Simek <monstr@monstr.eu>
Cc: linux-arch@vger.kernel.org
Cc: Michal Simek <monstr@monstr.eu>
Cc: microblaze-uclinux@itee.uq.edu.au
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Tony Luck <tony.luck@intel.com>
2009-07-08 20:27:40 -06:00
|
|
|
|
2017-05-11 11:40:40 -06:00
|
|
|
STABS_DEBUG
|
|
|
|
|
|
|
|
|
|
DWARF_DEBUG
|
|
|
|
|
|
linker script: unify usage of discard definition
Discarded sections in different archs share some commonality but have
considerable differences. This led to linker script for each arch
implementing its own /DISCARD/ definition, which makes maintaining
tedious and adding new entries error-prone.
This patch makes all linker scripts to move discard definitions to the
end of the linker script and use the common DISCARDS macro. As ld
uses the first matching section definition, archs can include default
discarded sections by including them earlier in the linker script.
ia64 is notable because it first throws away some ia64 specific
subsections and then include the rest of the sections into the final
image, so those sections must be discarded before the inclusion.
defconfig compile tested for x86, x86-64, powerpc, powerpc64, ia64,
alpha, sparc, sparc64 and s390. Michal Simek tested microblaze.
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Michal Simek <monstr@monstr.eu>
Cc: linux-arch@vger.kernel.org
Cc: Michal Simek <monstr@monstr.eu>
Cc: microblaze-uclinux@itee.uq.edu.au
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Tony Luck <tony.luck@intel.com>
2009-07-08 20:27:40 -06:00
|
|
|
DISCARDS
|
2017-05-11 11:40:40 -06:00
|
|
|
/DISCARD/ : {
|
|
|
|
|
*(*.EMB.apuinfo)
|
|
|
|
|
*(.glink .iplt .plt .rela* .comment)
|
|
|
|
|
*(.gnu.version*)
|
|
|
|
|
*(.gnu.attributes)
|
|
|
|
|
*(.eh_frame)
|
|
|
|
|
}
|
2005-09-26 00:04:21 -06:00
|
|
|
}
|