2019-02-15 15:39:11 -07:00
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/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2019 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef HABANALABSP_H_
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#define HABANALABSP_H_
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2019-02-15 15:39:16 -07:00
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#include "include/armcp_if.h"
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2019-02-15 15:39:11 -07:00
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#define pr_fmt(fmt) "habanalabs: " fmt
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#include <linux/cdev.h>
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#include <linux/iopoll.h>
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2019-02-15 15:39:11 -07:00
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#define HL_NAME "habanalabs"
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2019-02-15 15:39:15 -07:00
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#define HL_MMAP_CB_MASK (0x8000000000000000ull >> PAGE_SHIFT)
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2019-02-15 15:39:16 -07:00
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#define HL_DEVICE_TIMEOUT_USEC 1000000 /* 1 s */
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2019-02-15 15:39:13 -07:00
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#define HL_MAX_QUEUES 128
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struct hl_device;
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struct hl_fpriv;
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2019-02-15 15:39:13 -07:00
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/**
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* struct asic_fixed_properties - ASIC specific immutable properties.
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2019-02-15 15:39:16 -07:00
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* @uboot_ver: F/W U-boot version.
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* @preboot_ver: F/W Preboot version.
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* @sram_base_address: SRAM physical start address.
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* @sram_end_address: SRAM physical end address.
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* @sram_user_base_address - SRAM physical start address for user access.
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* @dram_base_address: DRAM physical start address.
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* @dram_end_address: DRAM physical end address.
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* @dram_user_base_address: DRAM physical start address for user access.
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* @dram_size: DRAM total size.
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* @dram_pci_bar_size: size of PCI bar towards DRAM.
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* @host_phys_base_address: base physical address of host memory for
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* transactions that the device generates.
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* @va_space_host_start_address: base address of virtual memory range for
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* mapping host memory.
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* @va_space_host_end_address: end address of virtual memory range for
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* mapping host memory.
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* @va_space_dram_start_address: base address of virtual memory range for
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* mapping DRAM memory.
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* @va_space_dram_end_address: end address of virtual memory range for
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* mapping DRAM memory.
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* @cfg_size: configuration space size on SRAM.
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* @sram_size: total size of SRAM.
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* @max_asid: maximum number of open contexts (ASIDs).
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* @completion_queues_count: number of completion queues.
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* @high_pll: high PLL frequency used by the device.
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* @cb_pool_cb_cnt: number of CBs in the CB pool.
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* @cb_pool_cb_size: size of each CB in the CB pool.
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* @tpc_enabled_mask: which TPCs are enabled.
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*/
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struct asic_fixed_properties {
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char uboot_ver[VERSION_MAX_LEN];
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char preboot_ver[VERSION_MAX_LEN];
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u64 sram_base_address;
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u64 sram_end_address;
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u64 sram_user_base_address;
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u64 dram_base_address;
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u64 dram_end_address;
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u64 dram_user_base_address;
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u64 dram_size;
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u64 dram_pci_bar_size;
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u64 host_phys_base_address;
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u64 va_space_host_start_address;
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u64 va_space_host_end_address;
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u64 va_space_dram_start_address;
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u64 va_space_dram_end_address;
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u32 cfg_size;
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u32 sram_size;
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u32 max_asid;
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u32 high_pll;
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u32 cb_pool_cb_cnt;
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u32 cb_pool_cb_size;
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u8 completion_queues_count;
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u8 tpc_enabled_mask;
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};
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2019-02-15 15:39:15 -07:00
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/*
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* Command Buffers
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*/
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#define HL_MAX_CB_SIZE 0x200000 /* 2MB */
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/**
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* struct hl_cb_mgr - describes a Command Buffer Manager.
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* @cb_lock: protects cb_handles.
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* @cb_handles: an idr to hold all command buffer handles.
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*/
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struct hl_cb_mgr {
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spinlock_t cb_lock;
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struct idr cb_handles; /* protected by cb_lock */
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};
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/**
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* struct hl_cb - describes a Command Buffer.
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* @refcount: reference counter for usage of the CB.
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* @hdev: pointer to device this CB belongs to.
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* @lock: spinlock to protect mmap/cs flows.
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* @pool_list: node in pool list of command buffers.
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* @kernel_address: Holds the CB's kernel virtual address.
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* @bus_address: Holds the CB's DMA address.
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* @mmap_size: Holds the CB's size that was mmaped.
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* @size: holds the CB's size.
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* @id: the CB's ID.
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* @ctx_id: holds the ID of the owner's context.
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* @mmap: true if the CB is currently mmaped to user.
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* @is_pool: true if CB was acquired from the pool, false otherwise.
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*/
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struct hl_cb {
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struct kref refcount;
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struct hl_device *hdev;
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spinlock_t lock;
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struct list_head pool_list;
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u64 kernel_address;
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dma_addr_t bus_address;
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u32 mmap_size;
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u32 size;
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u32 id;
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u32 ctx_id;
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u8 mmap;
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u8 is_pool;
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};
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#define HL_QUEUE_LENGTH 256
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2019-02-15 15:39:11 -07:00
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/*
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* ASICs
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*/
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/**
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* enum hl_asic_type - supported ASIC types.
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* @ASIC_AUTO_DETECT: ASIC type will be automatically set.
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* @ASIC_GOYA: Goya device.
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* @ASIC_INVALID: Invalid ASIC type.
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*/
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enum hl_asic_type {
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ASIC_AUTO_DETECT,
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ASIC_GOYA,
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ASIC_INVALID
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};
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2019-02-15 15:39:13 -07:00
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/**
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* struct hl_asic_funcs - ASIC specific functions that are can be called from
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* common code.
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* @early_init: sets up early driver state (pre sw_init), doesn't configure H/W.
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* @early_fini: tears down what was done in early_init.
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* @sw_init: sets up driver state, does not configure H/W.
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* @sw_fini: tears down driver state, does not configure H/W.
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* @hw_init: sets up the H/W state.
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* @hw_fini: tears down the H/W state.
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* @suspend: handles IP specific H/W or SW changes for suspend.
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* @resume: handles IP specific H/W or SW changes for resume.
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* @mmap: mmap function, does nothing.
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* @cb_mmap: maps a CB.
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* @dma_alloc_coherent: Allocate coherent DMA memory by calling
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* dma_alloc_coherent(). This is ASIC function because its
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* implementation is not trivial when the driver is loaded
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* in simulation mode (not upstreamed).
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* @dma_free_coherent: Free coherent DMA memory by calling dma_free_coherent().
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* This is ASIC function because its implementation is not
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* trivial when the driver is loaded in simulation mode
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* (not upstreamed).
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*/
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struct hl_asic_funcs {
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int (*early_init)(struct hl_device *hdev);
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int (*early_fini)(struct hl_device *hdev);
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int (*sw_init)(struct hl_device *hdev);
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int (*sw_fini)(struct hl_device *hdev);
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int (*hw_init)(struct hl_device *hdev);
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void (*hw_fini)(struct hl_device *hdev, bool hard_reset);
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int (*suspend)(struct hl_device *hdev);
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int (*resume)(struct hl_device *hdev);
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int (*mmap)(struct hl_fpriv *hpriv, struct vm_area_struct *vma);
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int (*cb_mmap)(struct hl_device *hdev, struct vm_area_struct *vma,
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u64 kaddress, phys_addr_t paddress, u32 size);
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void* (*dma_alloc_coherent)(struct hl_device *hdev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void (*dma_free_coherent)(struct hl_device *hdev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle);
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};
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/*
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* CONTEXTS
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*/
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#define HL_KERNEL_ASID_ID 0
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/**
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* struct hl_ctx - user/kernel context.
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* @hpriv: pointer to the private (KMD) data of the process (fd).
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* @hdev: pointer to the device structure.
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* @refcount: reference counter for the context. Context is released only when
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* this hits 0l. It is incremented on CS and CS_WAIT.
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* @asid: context's unique address space ID in the device's MMU.
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*/
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struct hl_ctx {
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struct hl_fpriv *hpriv;
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struct hl_device *hdev;
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struct kref refcount;
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u32 asid;
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};
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/**
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* struct hl_ctx_mgr - for handling multiple contexts.
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* @ctx_lock: protects ctx_handles.
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* @ctx_handles: idr to hold all ctx handles.
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*/
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struct hl_ctx_mgr {
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struct mutex ctx_lock;
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struct idr ctx_handles;
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};
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2019-02-15 15:39:11 -07:00
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/*
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* FILE PRIVATE STRUCTURE
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*/
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/**
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* struct hl_fpriv - process information stored in FD private data.
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* @hdev: habanalabs device structure.
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* @filp: pointer to the given file structure.
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* @taskpid: current process ID.
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* @ctx: current executing context.
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* @ctx_mgr: context manager to handle multiple context for this FD.
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* @cb_mgr: command buffer manager to handle multiple buffers for this FD.
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* @refcount: number of related contexts.
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*/
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struct hl_fpriv {
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struct hl_device *hdev;
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struct file *filp;
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struct pid *taskpid;
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struct hl_ctx *ctx; /* TODO: remove for multiple ctx */
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struct hl_ctx_mgr ctx_mgr;
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struct hl_cb_mgr cb_mgr;
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struct kref refcount;
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};
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/*
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* DEVICES
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*/
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/* Theoretical limit only. A single host can only contain up to 4 or 8 PCIe
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* x16 cards. In extereme cases, there are hosts that can accommodate 16 cards
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*/
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#define HL_MAX_MINORS 256
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/*
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* Registers read & write functions.
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*/
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u32 hl_rreg(struct hl_device *hdev, u32 reg);
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void hl_wreg(struct hl_device *hdev, u32 reg, u32 val);
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#define hl_poll_timeout(hdev, addr, val, cond, sleep_us, timeout_us) \
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readl_poll_timeout(hdev->rmmio + addr, val, cond, sleep_us, timeout_us)
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#define RREG32(reg) hl_rreg(hdev, (reg))
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#define WREG32(reg, v) hl_wreg(hdev, (reg), (v))
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#define DREG32(reg) pr_info("REGISTER: " #reg " : 0x%08X\n", \
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hl_rreg(hdev, (reg)))
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#define WREG32_P(reg, val, mask) \
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do { \
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u32 tmp_ = RREG32(reg); \
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tmp_ &= (mask); \
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tmp_ |= ((val) & ~(mask)); \
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WREG32(reg, tmp_); \
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} while (0)
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#define WREG32_AND(reg, and) WREG32_P(reg, 0, and)
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#define WREG32_OR(reg, or) WREG32_P(reg, or, ~(or))
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#define REG_FIELD_SHIFT(reg, field) reg##_##field##_SHIFT
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#define REG_FIELD_MASK(reg, field) reg##_##field##_MASK
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#define WREG32_FIELD(reg, field, val) \
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WREG32(mm##reg, (RREG32(mm##reg) & ~REG_FIELD_MASK(reg, field)) | \
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(val) << REG_FIELD_SHIFT(reg, field))
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2019-02-15 15:39:11 -07:00
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/**
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* struct hl_device - habanalabs device structure.
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* @pdev: pointer to PCI device, can be NULL in case of simulator device.
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* @pcie_bar: array of available PCIe bars.
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* @rmmio: configuration area address on SRAM.
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* @cdev: related char device.
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* @dev: realted kernel basic device structure.
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* @asic_name: ASIC specific nmae.
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* @asic_type: ASIC specific type.
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* @kernel_ctx: KMD context structure.
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* @kernel_cb_mgr: command buffer manager for creating/destroying/handling CGs.
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* @dma_pool: DMA pool for small allocations.
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* @cpu_accessible_dma_mem: KMD <-> ArmCP shared memory CPU address.
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* @cpu_accessible_dma_address: KMD <-> ArmCP shared memory DMA address.
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* @cpu_accessible_dma_pool: KMD <-> ArmCP shared memory pool.
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* @asid_bitmap: holds used/available ASIDs.
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* @asid_mutex: protects asid_bitmap.
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* @fd_open_cnt_lock: lock for updating fd_open_cnt in hl_device_open. Although
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* fd_open_cnt is atomic, we need this lock to serialize
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* the open function because the driver currently supports
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* only a single process at a time. In addition, we need a
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* lock here so we can flush user processes which are opening
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* the device while we are trying to hard reset it
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2019-02-15 15:39:13 -07:00
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* @asic_prop: ASIC specific immutable properties.
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* @asic_funcs: ASIC specific functions.
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* @asic_specific: ASIC specific information to use only from ASIC files.
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2019-02-15 15:39:15 -07:00
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* @cb_pool: list of preallocated CBs.
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* @cb_pool_lock: protects the CB pool.
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2019-02-15 15:39:14 -07:00
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* @user_ctx: current user context executing.
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|
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* @fd_open_cnt: number of open user processes.
|
2019-02-15 15:39:11 -07:00
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|
* @major: habanalabs KMD major.
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|
|
* @id: device minor.
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|
|
* @disabled: is device disabled.
|
|
|
|
*/
|
|
|
|
struct hl_device {
|
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|
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struct pci_dev *pdev;
|
2019-02-15 15:39:13 -07:00
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void __iomem *pcie_bar[6];
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|
|
void __iomem *rmmio;
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2019-02-15 15:39:11 -07:00
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|
struct cdev cdev;
|
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|
|
struct device *dev;
|
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|
|
char asic_name[16];
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|
|
enum hl_asic_type asic_type;
|
2019-02-15 15:39:14 -07:00
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|
struct hl_ctx *kernel_ctx;
|
2019-02-15 15:39:15 -07:00
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struct hl_cb_mgr kernel_cb_mgr;
|
2019-02-15 15:39:13 -07:00
|
|
|
struct dma_pool *dma_pool;
|
|
|
|
void *cpu_accessible_dma_mem;
|
|
|
|
dma_addr_t cpu_accessible_dma_address;
|
|
|
|
struct gen_pool *cpu_accessible_dma_pool;
|
2019-02-15 15:39:14 -07:00
|
|
|
unsigned long *asid_bitmap;
|
|
|
|
struct mutex asid_mutex;
|
|
|
|
/* TODO: remove fd_open_cnt_lock for multiple process support */
|
|
|
|
struct mutex fd_open_cnt_lock;
|
2019-02-15 15:39:13 -07:00
|
|
|
struct asic_fixed_properties asic_prop;
|
|
|
|
const struct hl_asic_funcs *asic_funcs;
|
|
|
|
void *asic_specific;
|
2019-02-15 15:39:15 -07:00
|
|
|
|
|
|
|
struct list_head cb_pool;
|
|
|
|
spinlock_t cb_pool_lock;
|
|
|
|
|
2019-02-15 15:39:14 -07:00
|
|
|
/* TODO: remove user_ctx for multiple process support */
|
|
|
|
struct hl_ctx *user_ctx;
|
|
|
|
atomic_t fd_open_cnt;
|
2019-02-15 15:39:11 -07:00
|
|
|
u32 major;
|
|
|
|
u16 id;
|
|
|
|
u8 disabled;
|
2019-02-15 15:39:13 -07:00
|
|
|
|
|
|
|
/* Parameters for bring-up */
|
2019-02-15 15:39:16 -07:00
|
|
|
u8 cpu_enable;
|
2019-02-15 15:39:13 -07:00
|
|
|
u8 reset_pcilink;
|
2019-02-15 15:39:16 -07:00
|
|
|
u8 fw_loading;
|
|
|
|
u8 pldm;
|
2019-02-15 15:39:11 -07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* IOCTLs
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* typedef hl_ioctl_t - typedef for ioctl function in the driver
|
|
|
|
* @hpriv: pointer to the FD's private data, which contains state of
|
|
|
|
* user process
|
|
|
|
* @data: pointer to the input/output arguments structure of the IOCTL
|
|
|
|
*
|
|
|
|
* Return: 0 for success, negative value for error
|
|
|
|
*/
|
|
|
|
typedef int hl_ioctl_t(struct hl_fpriv *hpriv, void *data);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct hl_ioctl_desc - describes an IOCTL entry of the driver.
|
|
|
|
* @cmd: the IOCTL code as created by the kernel macros.
|
|
|
|
* @func: pointer to the driver's function that should be called for this IOCTL.
|
|
|
|
*/
|
|
|
|
struct hl_ioctl_desc {
|
|
|
|
unsigned int cmd;
|
|
|
|
hl_ioctl_t *func;
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Kernel module functions that can be accessed by entire module
|
|
|
|
*/
|
|
|
|
|
|
|
|
int hl_device_open(struct inode *inode, struct file *filp);
|
|
|
|
int create_hdev(struct hl_device **dev, struct pci_dev *pdev,
|
|
|
|
enum hl_asic_type asic_type, int minor);
|
|
|
|
void destroy_hdev(struct hl_device *hdev);
|
|
|
|
int hl_poll_timeout_memory(struct hl_device *hdev, u64 addr, u32 timeout_us,
|
|
|
|
u32 *val);
|
|
|
|
int hl_poll_timeout_device_memory(struct hl_device *hdev, void __iomem *addr,
|
|
|
|
u32 timeout_us, u32 *val);
|
|
|
|
|
2019-02-15 15:39:14 -07:00
|
|
|
int hl_asid_init(struct hl_device *hdev);
|
|
|
|
void hl_asid_fini(struct hl_device *hdev);
|
|
|
|
unsigned long hl_asid_alloc(struct hl_device *hdev);
|
|
|
|
void hl_asid_free(struct hl_device *hdev, unsigned long asid);
|
|
|
|
|
|
|
|
int hl_ctx_create(struct hl_device *hdev, struct hl_fpriv *hpriv);
|
|
|
|
void hl_ctx_free(struct hl_device *hdev, struct hl_ctx *ctx);
|
|
|
|
int hl_ctx_init(struct hl_device *hdev, struct hl_ctx *ctx, bool is_kernel_ctx);
|
|
|
|
int hl_ctx_put(struct hl_ctx *ctx);
|
|
|
|
void hl_ctx_mgr_init(struct hl_ctx_mgr *mgr);
|
|
|
|
void hl_ctx_mgr_fini(struct hl_device *hdev, struct hl_ctx_mgr *mgr);
|
2019-02-15 15:39:11 -07:00
|
|
|
int hl_device_init(struct hl_device *hdev, struct class *hclass);
|
|
|
|
void hl_device_fini(struct hl_device *hdev);
|
|
|
|
int hl_device_suspend(struct hl_device *hdev);
|
|
|
|
int hl_device_resume(struct hl_device *hdev);
|
2019-02-15 15:39:14 -07:00
|
|
|
void hl_hpriv_get(struct hl_fpriv *hpriv);
|
|
|
|
void hl_hpriv_put(struct hl_fpriv *hpriv);
|
2019-02-15 15:39:11 -07:00
|
|
|
|
2019-02-15 15:39:15 -07:00
|
|
|
int hl_cb_create(struct hl_device *hdev, struct hl_cb_mgr *mgr, u32 cb_size,
|
|
|
|
u64 *handle, int ctx_id);
|
|
|
|
int hl_cb_destroy(struct hl_device *hdev, struct hl_cb_mgr *mgr, u64 cb_handle);
|
|
|
|
int hl_cb_mmap(struct hl_fpriv *hpriv, struct vm_area_struct *vma);
|
|
|
|
struct hl_cb *hl_cb_get(struct hl_device *hdev, struct hl_cb_mgr *mgr,
|
|
|
|
u32 handle);
|
|
|
|
void hl_cb_put(struct hl_cb *cb);
|
|
|
|
void hl_cb_mgr_init(struct hl_cb_mgr *mgr);
|
|
|
|
void hl_cb_mgr_fini(struct hl_device *hdev, struct hl_cb_mgr *mgr);
|
|
|
|
struct hl_cb *hl_cb_kernel_create(struct hl_device *hdev, u32 cb_size);
|
|
|
|
int hl_cb_pool_init(struct hl_device *hdev);
|
|
|
|
int hl_cb_pool_fini(struct hl_device *hdev);
|
|
|
|
|
2019-02-15 15:39:13 -07:00
|
|
|
void goya_set_asic_funcs(struct hl_device *hdev);
|
|
|
|
|
2019-02-15 15:39:15 -07:00
|
|
|
/* IOCTLs */
|
|
|
|
long hl_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
|
|
|
|
int hl_cb_ioctl(struct hl_fpriv *hpriv, void *data);
|
|
|
|
|
2019-02-15 15:39:11 -07:00
|
|
|
#endif /* HABANALABSP_H_ */
|