2010-08-07 04:01:28 -06:00
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/*
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* Copyright © 2006-2010 Intel Corporation
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* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Dave Airlie <airlied@linux.ie>
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* Jesse Barnes <jesse.barnes@intel.com>
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* Chris Wilson <chris@chris-wilson.co.uk>
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*/
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2012-03-18 14:00:11 -06:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2012-03-15 08:56:25 -06:00
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#include <linux/moduleparam.h>
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2010-08-07 04:01:28 -06:00
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#include "intel_drv.h"
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2011-03-10 06:02:12 -07:00
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#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
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2010-08-07 04:01:28 -06:00
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void
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intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
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struct drm_display_mode *adjusted_mode)
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{
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adjusted_mode->hdisplay = fixed_mode->hdisplay;
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adjusted_mode->hsync_start = fixed_mode->hsync_start;
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adjusted_mode->hsync_end = fixed_mode->hsync_end;
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adjusted_mode->htotal = fixed_mode->htotal;
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adjusted_mode->vdisplay = fixed_mode->vdisplay;
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adjusted_mode->vsync_start = fixed_mode->vsync_start;
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adjusted_mode->vsync_end = fixed_mode->vsync_end;
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adjusted_mode->vtotal = fixed_mode->vtotal;
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adjusted_mode->clock = fixed_mode->clock;
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}
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/* adjusted_mode has been preset to be the panel's fixed mode */
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void
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2013-04-25 13:55:02 -06:00
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intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
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struct intel_crtc_config *pipe_config,
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int fitting_mode)
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2010-08-07 04:01:28 -06:00
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{
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2013-04-25 13:55:02 -06:00
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struct drm_display_mode *mode, *adjusted_mode;
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2010-08-07 04:01:28 -06:00
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int x, y, width, height;
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2013-04-25 13:55:02 -06:00
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mode = &pipe_config->requested_mode;
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adjusted_mode = &pipe_config->adjusted_mode;
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2010-08-07 04:01:28 -06:00
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x = y = width = height = 0;
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/* Native modes don't need fitting */
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if (adjusted_mode->hdisplay == mode->hdisplay &&
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adjusted_mode->vdisplay == mode->vdisplay)
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goto done;
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switch (fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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width = mode->hdisplay;
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height = mode->vdisplay;
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x = (adjusted_mode->hdisplay - width + 1)/2;
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y = (adjusted_mode->vdisplay - height + 1)/2;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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{
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u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
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u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
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if (scaled_width > scaled_height) { /* pillar */
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width = scaled_height / mode->vdisplay;
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drm/i915/pch: Fix integer math bugs in panel fitting
Consider a 1600x900 panel, upscaling a 1360x768 mode, full-aspect. The
old math would give you:
scaled_width = 1600 * 768; /* 1228800 */
scaled_height = 1360 * 900; /* 1224000 */
if (scaled_width > scaled_height) { /* pillarbox, and true */
width = 1224000 / 768; /* int(1593.75) = 1593 */
x = (1600 - 1593 + 1) / 2; /* 4 */
y = 0;
height = 768;
} /* ... */
This is broken. The total width of scanout would then be 1593 + 4 + 4,
or 1601, which is wider than the panel itself. The hardware very
dutifully implements this, and you end up with a black 45° diagonal from
the top-left corner to the bottom edge of the screen. It's a cool
effect and all, but not what you wanted. Similar things happen for the
letterbox case.
The problem is that you have an integer number of pixels, which means
it's usually impossible to upscale equally on both axes. 1360/768 is
1.7708, 1600/900 is 1.7777. Since we're constrained on the one axis,
the other one wants to come out as an even number of pixels (the panel
is almost certainly even on both axes, and the x/y offsets will be
applied on both sides). In the math above, if 'width' comes out even,
rounding down is correct; if it's odd, you'd rather round up. So just
increment width/height in those cases.
Tested on a Lenovo T500 (Ironlake).
Signed-off-by: Adam Jackson <ajax@redhat.com>
Tested-By: Daniel Manrique <daniel.manrique@canonical.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38851
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-07-13 14:32:32 -06:00
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if (width & 1)
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2011-08-16 13:34:10 -06:00
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width++;
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2010-08-07 04:01:28 -06:00
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x = (adjusted_mode->hdisplay - width + 1) / 2;
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y = 0;
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height = adjusted_mode->vdisplay;
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} else if (scaled_width < scaled_height) { /* letter */
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height = scaled_width / mode->hdisplay;
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drm/i915/pch: Fix integer math bugs in panel fitting
Consider a 1600x900 panel, upscaling a 1360x768 mode, full-aspect. The
old math would give you:
scaled_width = 1600 * 768; /* 1228800 */
scaled_height = 1360 * 900; /* 1224000 */
if (scaled_width > scaled_height) { /* pillarbox, and true */
width = 1224000 / 768; /* int(1593.75) = 1593 */
x = (1600 - 1593 + 1) / 2; /* 4 */
y = 0;
height = 768;
} /* ... */
This is broken. The total width of scanout would then be 1593 + 4 + 4,
or 1601, which is wider than the panel itself. The hardware very
dutifully implements this, and you end up with a black 45° diagonal from
the top-left corner to the bottom edge of the screen. It's a cool
effect and all, but not what you wanted. Similar things happen for the
letterbox case.
The problem is that you have an integer number of pixels, which means
it's usually impossible to upscale equally on both axes. 1360/768 is
1.7708, 1600/900 is 1.7777. Since we're constrained on the one axis,
the other one wants to come out as an even number of pixels (the panel
is almost certainly even on both axes, and the x/y offsets will be
applied on both sides). In the math above, if 'width' comes out even,
rounding down is correct; if it's odd, you'd rather round up. So just
increment width/height in those cases.
Tested on a Lenovo T500 (Ironlake).
Signed-off-by: Adam Jackson <ajax@redhat.com>
Tested-By: Daniel Manrique <daniel.manrique@canonical.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38851
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-07-13 14:32:32 -06:00
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if (height & 1)
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height++;
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2010-08-07 04:01:28 -06:00
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y = (adjusted_mode->vdisplay - height + 1) / 2;
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x = 0;
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width = adjusted_mode->hdisplay;
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} else {
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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}
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}
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break;
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case DRM_MODE_SCALE_FULLSCREEN:
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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break;
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2013-04-25 13:55:03 -06:00
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default:
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WARN(1, "bad panel fit mode: %d\n", fitting_mode);
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return;
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2010-08-07 04:01:28 -06:00
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}
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done:
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2013-04-25 13:55:02 -06:00
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pipe_config->pch_pfit.pos = (x << 16) | y;
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pipe_config->pch_pfit.size = (width << 16) | height;
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2010-08-07 04:01:28 -06:00
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}
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2010-08-22 06:18:16 -06:00
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2013-04-25 13:55:01 -06:00
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static void
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centre_horizontally(struct drm_display_mode *mode,
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int width)
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{
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u32 border, sync_pos, blank_width, sync_width;
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/* keep the hsync and hblank widths constant */
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sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
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blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
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sync_pos = (blank_width - sync_width + 1) / 2;
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border = (mode->hdisplay - width + 1) / 2;
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border += border & 1; /* make the border even */
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mode->crtc_hdisplay = width;
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mode->crtc_hblank_start = width + border;
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mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
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mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
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mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
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}
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static void
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centre_vertically(struct drm_display_mode *mode,
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int height)
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{
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u32 border, sync_pos, blank_width, sync_width;
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/* keep the vsync and vblank widths constant */
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sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
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blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
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sync_pos = (blank_width - sync_width + 1) / 2;
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border = (mode->vdisplay - height + 1) / 2;
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mode->crtc_vdisplay = height;
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mode->crtc_vblank_start = height + border;
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mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
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mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
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mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
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}
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static inline u32 panel_fitter_scaling(u32 source, u32 target)
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{
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/*
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* Floating point operation is not supported. So the FACTOR
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* is defined, which can avoid the floating point computation
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* when calculating the panel ratio.
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*/
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#define ACCURACY 12
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#define FACTOR (1 << ACCURACY)
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u32 ratio = source * FACTOR / target;
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return (FACTOR * ratio + FACTOR/2) / FACTOR;
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}
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void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
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struct intel_crtc_config *pipe_config,
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int fitting_mode)
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{
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struct drm_device *dev = intel_crtc->base.dev;
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u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
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struct drm_display_mode *mode, *adjusted_mode;
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mode = &pipe_config->requested_mode;
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adjusted_mode = &pipe_config->adjusted_mode;
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/* Native modes don't need fitting */
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if (adjusted_mode->hdisplay == mode->hdisplay &&
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adjusted_mode->vdisplay == mode->vdisplay)
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goto out;
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switch (fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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/*
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* For centered modes, we have to calculate border widths &
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* heights and modify the values programmed into the CRTC.
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*/
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centre_horizontally(adjusted_mode, mode->hdisplay);
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centre_vertically(adjusted_mode, mode->vdisplay);
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border = LVDS_BORDER_ENABLE;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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if (INTEL_INFO(dev)->gen >= 4) {
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u32 scaled_width = adjusted_mode->hdisplay *
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mode->vdisplay;
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u32 scaled_height = mode->hdisplay *
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adjusted_mode->vdisplay;
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/* 965+ is easy, it does everything in hw */
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if (scaled_width > scaled_height)
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pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_PILLAR;
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else if (scaled_width < scaled_height)
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pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_LETTER;
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else if (adjusted_mode->hdisplay != mode->hdisplay)
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pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
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} else {
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u32 scaled_width = adjusted_mode->hdisplay *
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mode->vdisplay;
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u32 scaled_height = mode->hdisplay *
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adjusted_mode->vdisplay;
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/*
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* For earlier chips we have to calculate the scaling
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* ratio by hand and program it into the
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* PFIT_PGM_RATIO register
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*/
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if (scaled_width > scaled_height) { /* pillar */
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centre_horizontally(adjusted_mode,
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scaled_height /
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mode->vdisplay);
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border = LVDS_BORDER_ENABLE;
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if (mode->vdisplay != adjusted_mode->vdisplay) {
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u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
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pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else if (scaled_width < scaled_height) { /* letter */
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centre_vertically(adjusted_mode,
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scaled_width /
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mode->hdisplay);
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border = LVDS_BORDER_ENABLE;
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if (mode->hdisplay != adjusted_mode->hdisplay) {
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u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
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pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else {
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/* Aspects match, Let hw scale both directions */
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pfit_control |= (PFIT_ENABLE |
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VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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}
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break;
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case DRM_MODE_SCALE_FULLSCREEN:
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/*
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* Full scaling, even if it changes the aspect ratio.
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* Fortunately this is all done for us in hw.
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*/
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if (mode->vdisplay != adjusted_mode->vdisplay ||
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mode->hdisplay != adjusted_mode->hdisplay) {
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pfit_control |= PFIT_ENABLE;
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if (INTEL_INFO(dev)->gen >= 4)
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pfit_control |= PFIT_SCALING_AUTO;
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else
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pfit_control |= (VERT_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_AUTO_SCALE |
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HORIZ_INTERP_BILINEAR);
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}
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break;
|
2013-04-25 13:55:03 -06:00
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|
|
default:
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WARN(1, "bad panel fit mode: %d\n", fitting_mode);
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|
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return;
|
2013-04-25 13:55:01 -06:00
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|
|
}
|
|
|
|
|
|
|
|
/* 965+ wants fuzzy fitting */
|
|
|
|
/* FIXME: handle multiple panels by failing gracefully */
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
|
|
|
pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
|
|
|
|
PFIT_FILTER_FUZZY);
|
|
|
|
|
|
|
|
out:
|
|
|
|
if ((pfit_control & PFIT_ENABLE) == 0) {
|
|
|
|
pfit_control = 0;
|
|
|
|
pfit_pgm_ratios = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Make sure pre-965 set dither correctly for 18bpp panels. */
|
|
|
|
if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
|
|
|
|
pfit_control |= PANEL_8TO6_DITHER_ENABLE;
|
|
|
|
|
2013-04-25 14:52:17 -06:00
|
|
|
pipe_config->gmch_pfit.control = pfit_control;
|
|
|
|
pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
|
2013-04-25 14:52:16 -06:00
|
|
|
pipe_config->gmch_pfit.lvds_border_bits = border;
|
2013-04-25 13:55:01 -06:00
|
|
|
}
|
|
|
|
|
2011-03-10 06:02:12 -07:00
|
|
|
static int is_backlight_combination_mode(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
|
|
|
return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
|
|
|
|
|
|
|
|
if (IS_GEN2(dev))
|
|
|
|
return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-12 06:18:36 -06:00
|
|
|
/* XXX: query mode clock or hardware clock and program max PWM appropriately
|
|
|
|
* when it's 0.
|
|
|
|
*/
|
2012-12-04 07:36:28 -07:00
|
|
|
static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
|
2010-11-23 02:45:50 -07:00
|
|
|
{
|
2012-12-04 07:36:28 -07:00
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2010-11-23 02:45:50 -07:00
|
|
|
u32 val;
|
|
|
|
|
2013-05-22 02:36:40 -06:00
|
|
|
WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
|
2013-04-12 06:18:37 -06:00
|
|
|
|
2010-11-23 02:45:50 -07:00
|
|
|
/* Restore the CTL value if it lost, e.g. GPU reset */
|
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev_priv->dev)) {
|
|
|
|
val = I915_READ(BLC_PWM_PCH_CTL2);
|
2012-11-02 12:55:02 -06:00
|
|
|
if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
|
|
|
|
dev_priv->regfile.saveBLC_PWM_CTL2 = val;
|
2010-11-23 02:45:50 -07:00
|
|
|
} else if (val == 0) {
|
2012-11-02 12:55:02 -06:00
|
|
|
val = dev_priv->regfile.saveBLC_PWM_CTL2;
|
2012-12-04 07:36:28 -07:00
|
|
|
I915_WRITE(BLC_PWM_PCH_CTL2, val);
|
2010-11-23 02:45:50 -07:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
val = I915_READ(BLC_PWM_CTL);
|
2012-11-02 12:55:02 -06:00
|
|
|
if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
|
|
|
|
dev_priv->regfile.saveBLC_PWM_CTL = val;
|
2012-12-04 07:36:28 -07:00
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
|
|
|
dev_priv->regfile.saveBLC_PWM_CTL2 =
|
|
|
|
I915_READ(BLC_PWM_CTL2);
|
2010-11-23 02:45:50 -07:00
|
|
|
} else if (val == 0) {
|
2012-11-02 12:55:02 -06:00
|
|
|
val = dev_priv->regfile.saveBLC_PWM_CTL;
|
2012-12-04 07:36:28 -07:00
|
|
|
I915_WRITE(BLC_PWM_CTL, val);
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
|
|
|
I915_WRITE(BLC_PWM_CTL2,
|
|
|
|
dev_priv->regfile.saveBLC_PWM_CTL2);
|
2010-11-23 02:45:50 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2013-04-12 06:18:36 -06:00
|
|
|
static u32 intel_panel_get_max_backlight(struct drm_device *dev)
|
2010-08-22 06:18:16 -06:00
|
|
|
{
|
|
|
|
u32 max;
|
|
|
|
|
2012-12-04 07:36:28 -07:00
|
|
|
max = i915_read_blc_pwm_ctl(dev);
|
2010-11-23 02:45:50 -07:00
|
|
|
|
2010-08-22 06:18:16 -06:00
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
2010-11-23 02:45:50 -07:00
|
|
|
max >>= 16;
|
2010-08-22 06:18:16 -06:00
|
|
|
} else {
|
2011-11-18 12:09:24 -07:00
|
|
|
if (INTEL_INFO(dev)->gen < 4)
|
2010-08-22 06:18:16 -06:00
|
|
|
max >>= 17;
|
2011-11-18 12:09:24 -07:00
|
|
|
else
|
2010-08-22 06:18:16 -06:00
|
|
|
max >>= 16;
|
2011-03-10 06:02:12 -07:00
|
|
|
|
|
|
|
if (is_backlight_combination_mode(dev))
|
|
|
|
max *= 0xff;
|
2010-08-22 06:18:16 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
|
2013-04-12 06:18:36 -06:00
|
|
|
|
2010-08-22 06:18:16 -06:00
|
|
|
return max;
|
|
|
|
}
|
|
|
|
|
2012-03-15 08:56:26 -06:00
|
|
|
static int i915_panel_invert_brightness;
|
|
|
|
MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
|
|
|
|
"(-1 force normal, 0 machine defaults, 1 force inversion), please "
|
2012-03-15 08:56:25 -06:00
|
|
|
"report PCI device ID, subsystem vendor and subsystem device ID "
|
|
|
|
"to dri-devel@lists.freedesktop.org, if your machine needs it. "
|
|
|
|
"It will then be included in an upcoming module version.");
|
2012-03-15 08:56:26 -06:00
|
|
|
module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
|
2012-03-15 08:56:25 -06:00
|
|
|
static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
|
|
|
|
{
|
2012-03-15 08:56:26 -06:00
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
|
|
|
if (i915_panel_invert_brightness < 0)
|
|
|
|
return val;
|
|
|
|
|
|
|
|
if (i915_panel_invert_brightness > 0 ||
|
2013-04-12 06:18:36 -06:00
|
|
|
dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
|
|
|
|
u32 max = intel_panel_get_max_backlight(dev);
|
|
|
|
if (max)
|
|
|
|
return max - val;
|
|
|
|
}
|
2012-03-15 08:56:25 -06:00
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2012-07-30 14:51:38 -06:00
|
|
|
static u32 intel_panel_get_backlight(struct drm_device *dev)
|
2010-08-22 06:18:16 -06:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
u32 val;
|
2013-04-12 06:18:37 -06:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2010-08-22 06:18:16 -06:00
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
|
|
val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
|
|
|
|
} else {
|
|
|
|
val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
|
2011-11-18 12:09:24 -07:00
|
|
|
if (INTEL_INFO(dev)->gen < 4)
|
2010-08-22 06:18:16 -06:00
|
|
|
val >>= 1;
|
2011-03-10 06:02:12 -07:00
|
|
|
|
2011-08-16 13:34:10 -06:00
|
|
|
if (is_backlight_combination_mode(dev)) {
|
2011-03-10 06:02:12 -07:00
|
|
|
u8 lbpc;
|
|
|
|
|
|
|
|
pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
|
|
|
|
val *= lbpc;
|
|
|
|
}
|
2010-08-22 06:18:16 -06:00
|
|
|
}
|
|
|
|
|
2012-03-15 08:56:25 -06:00
|
|
|
val = intel_panel_compute_brightness(dev, val);
|
2013-04-12 06:18:37 -06:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
|
|
|
|
2010-08-22 06:18:16 -06:00
|
|
|
DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
|
|
|
|
I915_WRITE(BLC_PWM_CPU_CTL, val | level);
|
|
|
|
}
|
|
|
|
|
2011-10-14 03:45:40 -06:00
|
|
|
static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
|
2010-08-22 06:18:16 -06:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
u32 tmp;
|
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
|
2012-03-15 08:56:25 -06:00
|
|
|
level = intel_panel_compute_brightness(dev, level);
|
2010-08-22 06:18:16 -06:00
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev))
|
|
|
|
return intel_pch_panel_set_backlight(dev, level);
|
2011-03-10 06:02:12 -07:00
|
|
|
|
2011-08-16 13:34:10 -06:00
|
|
|
if (is_backlight_combination_mode(dev)) {
|
2011-03-10 06:02:12 -07:00
|
|
|
u32 max = intel_panel_get_max_backlight(dev);
|
|
|
|
u8 lbpc;
|
|
|
|
|
2013-04-12 06:18:36 -06:00
|
|
|
/* we're screwed, but keep behaviour backwards compatible */
|
|
|
|
if (!max)
|
|
|
|
max = 1;
|
|
|
|
|
2011-03-10 06:02:12 -07:00
|
|
|
lbpc = level * 0xfe / max + 1;
|
|
|
|
level /= lbpc;
|
|
|
|
pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
|
|
|
|
}
|
|
|
|
|
2010-08-22 06:18:16 -06:00
|
|
|
tmp = I915_READ(BLC_PWM_CTL);
|
2012-11-20 06:50:08 -07:00
|
|
|
if (INTEL_INFO(dev)->gen < 4)
|
2010-08-22 06:18:16 -06:00
|
|
|
level <<= 1;
|
2011-11-18 12:09:24 -07:00
|
|
|
tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
|
2010-08-22 06:18:16 -06:00
|
|
|
I915_WRITE(BLC_PWM_CTL, tmp | level);
|
|
|
|
}
|
2011-01-11 10:06:04 -07:00
|
|
|
|
2013-04-12 06:18:36 -06:00
|
|
|
/* set backlight brightness to level in range [0..max] */
|
|
|
|
void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
|
2011-01-11 10:06:04 -07:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2013-04-12 06:18:36 -06:00
|
|
|
u32 freq;
|
2013-04-12 06:18:37 -06:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2013-04-12 06:18:36 -06:00
|
|
|
|
|
|
|
freq = intel_panel_get_max_backlight(dev);
|
|
|
|
if (!freq) {
|
|
|
|
/* we are screwed, bail out */
|
2013-04-12 06:18:37 -06:00
|
|
|
goto out;
|
2013-04-12 06:18:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* scale to hardware */
|
|
|
|
level = level * freq / max;
|
2011-01-11 10:06:04 -07:00
|
|
|
|
2013-04-02 06:48:09 -06:00
|
|
|
dev_priv->backlight.level = level;
|
|
|
|
if (dev_priv->backlight.device)
|
|
|
|
dev_priv->backlight.device->props.brightness = level;
|
2013-03-12 03:44:15 -06:00
|
|
|
|
2013-04-02 06:48:09 -06:00
|
|
|
if (dev_priv->backlight.enabled)
|
2011-10-14 03:45:40 -06:00
|
|
|
intel_panel_actually_set_backlight(dev, level);
|
2013-04-12 06:18:37 -06:00
|
|
|
out:
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
2011-10-14 03:45:40 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void intel_panel_disable_backlight(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2013-04-12 06:18:37 -06:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2011-01-11 10:06:04 -07:00
|
|
|
|
2013-04-02 06:48:09 -06:00
|
|
|
dev_priv->backlight.enabled = false;
|
2011-10-14 03:45:40 -06:00
|
|
|
intel_panel_actually_set_backlight(dev, 0);
|
2012-06-05 04:14:54 -06:00
|
|
|
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4) {
|
2012-07-14 08:57:12 -06:00
|
|
|
uint32_t reg, tmp;
|
2012-06-05 04:14:54 -06:00
|
|
|
|
|
|
|
reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
|
|
|
|
|
|
|
|
I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
|
2012-07-14 08:57:12 -06:00
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
|
|
tmp = I915_READ(BLC_PWM_PCH_CTL1);
|
|
|
|
tmp &= ~BLM_PCH_PWM_ENABLE;
|
|
|
|
I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
|
|
|
|
}
|
2012-06-05 04:14:54 -06:00
|
|
|
}
|
2013-04-12 06:18:37 -06:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
2011-01-11 10:06:04 -07:00
|
|
|
}
|
|
|
|
|
2012-06-05 04:14:54 -06:00
|
|
|
void intel_panel_enable_backlight(struct drm_device *dev,
|
|
|
|
enum pipe pipe)
|
2011-01-11 10:06:04 -07:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2013-04-25 07:49:25 -06:00
|
|
|
enum transcoder cpu_transcoder =
|
|
|
|
intel_pipe_to_cpu_transcoder(dev_priv, pipe);
|
2013-04-12 06:18:37 -06:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2011-01-11 10:06:04 -07:00
|
|
|
|
2013-04-02 06:48:09 -06:00
|
|
|
if (dev_priv->backlight.level == 0) {
|
|
|
|
dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
|
|
|
|
if (dev_priv->backlight.device)
|
|
|
|
dev_priv->backlight.device->props.brightness =
|
|
|
|
dev_priv->backlight.level;
|
2013-03-12 03:44:15 -06:00
|
|
|
}
|
2011-01-11 10:06:04 -07:00
|
|
|
|
2012-06-05 04:14:54 -06:00
|
|
|
if (INTEL_INFO(dev)->gen >= 4) {
|
|
|
|
uint32_t reg, tmp;
|
|
|
|
|
|
|
|
reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
|
|
|
|
|
|
|
|
|
|
|
|
tmp = I915_READ(reg);
|
|
|
|
|
|
|
|
/* Note that this can also get called through dpms changes. And
|
|
|
|
* we don't track the backlight dpms state, hence check whether
|
|
|
|
* we have to do anything first. */
|
|
|
|
if (tmp & BLM_PWM_ENABLE)
|
2012-08-11 00:56:42 -06:00
|
|
|
goto set_level;
|
2012-06-05 04:14:54 -06:00
|
|
|
|
2013-03-13 15:05:41 -06:00
|
|
|
if (INTEL_INFO(dev)->num_pipes == 3)
|
2012-06-05 04:14:54 -06:00
|
|
|
tmp &= ~BLM_PIPE_SELECT_IVB;
|
|
|
|
else
|
|
|
|
tmp &= ~BLM_PIPE_SELECT;
|
|
|
|
|
2013-04-25 07:49:25 -06:00
|
|
|
if (cpu_transcoder == TRANSCODER_EDP)
|
|
|
|
tmp |= BLM_TRANSCODER_EDP;
|
|
|
|
else
|
|
|
|
tmp |= BLM_PIPE(cpu_transcoder);
|
2012-06-05 04:14:54 -06:00
|
|
|
tmp &= ~BLM_PWM_ENABLE;
|
|
|
|
|
|
|
|
I915_WRITE(reg, tmp);
|
|
|
|
POSTING_READ(reg);
|
|
|
|
I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
|
2012-07-14 08:57:12 -06:00
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
|
|
tmp = I915_READ(BLC_PWM_PCH_CTL1);
|
|
|
|
tmp |= BLM_PCH_PWM_ENABLE;
|
|
|
|
tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
|
|
|
|
I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
|
|
|
|
}
|
2012-06-05 04:14:54 -06:00
|
|
|
}
|
2012-08-11 00:56:42 -06:00
|
|
|
|
|
|
|
set_level:
|
2013-03-22 08:44:46 -06:00
|
|
|
/* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
|
|
|
|
* BLC_PWM_CPU_CTL may be cleared to zero automatically when these
|
|
|
|
* registers are set.
|
2012-08-11 00:56:42 -06:00
|
|
|
*/
|
2013-04-03 03:25:32 -06:00
|
|
|
dev_priv->backlight.enabled = true;
|
|
|
|
intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
|
2013-04-12 06:18:37 -06:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
2011-01-11 10:06:04 -07:00
|
|
|
}
|
|
|
|
|
2011-08-12 04:11:33 -06:00
|
|
|
static void intel_panel_init_backlight(struct drm_device *dev)
|
2011-01-11 10:06:04 -07:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
2013-04-02 06:48:09 -06:00
|
|
|
dev_priv->backlight.level = intel_panel_get_backlight(dev);
|
|
|
|
dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
|
2011-01-11 10:06:04 -07:00
|
|
|
}
|
2011-02-12 03:29:38 -07:00
|
|
|
|
|
|
|
enum drm_connector_status
|
|
|
|
intel_panel_detect(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
|
|
|
/* Assume that the BIOS does not lie through the OpRegion... */
|
2012-11-20 06:50:08 -07:00
|
|
|
if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
|
2011-02-12 03:29:38 -07:00
|
|
|
return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
|
|
|
|
connector_status_connected :
|
|
|
|
connector_status_disconnected;
|
2012-11-20 06:50:08 -07:00
|
|
|
}
|
2011-02-12 03:29:38 -07:00
|
|
|
|
2012-11-20 06:50:08 -07:00
|
|
|
switch (i915_panel_ignore_lid) {
|
|
|
|
case -2:
|
|
|
|
return connector_status_connected;
|
|
|
|
case -1:
|
|
|
|
return connector_status_disconnected;
|
|
|
|
default:
|
|
|
|
return connector_status_unknown;
|
|
|
|
}
|
2011-02-12 03:29:38 -07:00
|
|
|
}
|
2011-08-12 04:11:33 -06:00
|
|
|
|
|
|
|
#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
|
|
|
|
static int intel_panel_update_status(struct backlight_device *bd)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = bl_get_data(bd);
|
2013-04-12 06:18:36 -06:00
|
|
|
intel_panel_set_backlight(dev, bd->props.brightness,
|
|
|
|
bd->props.max_brightness);
|
2011-08-12 04:11:33 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int intel_panel_get_brightness(struct backlight_device *bd)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = bl_get_data(bd);
|
2013-03-12 03:44:16 -06:00
|
|
|
return intel_panel_get_backlight(dev);
|
2011-08-12 04:11:33 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct backlight_ops intel_panel_bl_ops = {
|
|
|
|
.update_status = intel_panel_update_status,
|
|
|
|
.get_brightness = intel_panel_get_brightness,
|
|
|
|
};
|
|
|
|
|
2012-10-19 05:51:46 -06:00
|
|
|
int intel_panel_setup_backlight(struct drm_connector *connector)
|
2011-08-12 04:11:33 -06:00
|
|
|
{
|
2012-10-19 05:51:46 -06:00
|
|
|
struct drm_device *dev = connector->dev;
|
2011-08-12 04:11:33 -06:00
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
struct backlight_properties props;
|
2013-04-12 06:18:37 -06:00
|
|
|
unsigned long flags;
|
2011-08-12 04:11:33 -06:00
|
|
|
|
|
|
|
intel_panel_init_backlight(dev);
|
|
|
|
|
2013-04-12 06:18:38 -06:00
|
|
|
if (WARN_ON(dev_priv->backlight.device))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2012-05-22 03:29:46 -06:00
|
|
|
memset(&props, 0, sizeof(props));
|
2011-08-12 04:11:33 -06:00
|
|
|
props.type = BACKLIGHT_RAW;
|
2013-04-02 06:48:09 -06:00
|
|
|
props.brightness = dev_priv->backlight.level;
|
2013-04-12 06:18:37 -06:00
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2013-04-12 06:18:36 -06:00
|
|
|
props.max_brightness = intel_panel_get_max_backlight(dev);
|
2013-04-12 06:18:37 -06:00
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
|
|
|
|
2012-09-03 07:25:12 -06:00
|
|
|
if (props.max_brightness == 0) {
|
2012-10-25 01:57:38 -06:00
|
|
|
DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
|
2012-09-03 07:25:12 -06:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
2013-04-02 06:48:09 -06:00
|
|
|
dev_priv->backlight.device =
|
2011-08-12 04:11:33 -06:00
|
|
|
backlight_device_register("intel_backlight",
|
|
|
|
&connector->kdev, dev,
|
|
|
|
&intel_panel_bl_ops, &props);
|
|
|
|
|
2013-04-02 06:48:09 -06:00
|
|
|
if (IS_ERR(dev_priv->backlight.device)) {
|
2011-08-12 04:11:33 -06:00
|
|
|
DRM_ERROR("Failed to register backlight: %ld\n",
|
2013-04-02 06:48:09 -06:00
|
|
|
PTR_ERR(dev_priv->backlight.device));
|
|
|
|
dev_priv->backlight.device = NULL;
|
2011-08-12 04:11:33 -06:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void intel_panel_destroy_backlight(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2013-04-12 06:18:38 -06:00
|
|
|
if (dev_priv->backlight.device) {
|
2013-04-02 06:48:09 -06:00
|
|
|
backlight_device_unregister(dev_priv->backlight.device);
|
2013-04-12 06:18:38 -06:00
|
|
|
dev_priv->backlight.device = NULL;
|
|
|
|
}
|
2011-08-12 04:11:33 -06:00
|
|
|
}
|
|
|
|
#else
|
2012-10-19 05:51:46 -06:00
|
|
|
int intel_panel_setup_backlight(struct drm_connector *connector)
|
2011-08-12 04:11:33 -06:00
|
|
|
{
|
2012-10-19 05:51:46 -06:00
|
|
|
intel_panel_init_backlight(connector->dev);
|
2011-08-12 04:11:33 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void intel_panel_destroy_backlight(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
2012-10-19 05:51:49 -06:00
|
|
|
|
2012-10-19 05:51:50 -06:00
|
|
|
int intel_panel_init(struct intel_panel *panel,
|
|
|
|
struct drm_display_mode *fixed_mode)
|
2012-10-19 05:51:49 -06:00
|
|
|
{
|
2012-10-19 05:51:50 -06:00
|
|
|
panel->fixed_mode = fixed_mode;
|
|
|
|
|
2012-10-19 05:51:49 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void intel_panel_fini(struct intel_panel *panel)
|
|
|
|
{
|
2012-10-19 05:51:50 -06:00
|
|
|
struct intel_connector *intel_connector =
|
|
|
|
container_of(panel, struct intel_connector, panel);
|
|
|
|
|
|
|
|
if (panel->fixed_mode)
|
|
|
|
drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
|
2012-10-19 05:51:49 -06:00
|
|
|
}
|