2017-01-10 06:18:33 -07:00
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/*
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* at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
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*
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* Copyright (C) 2017 Axentia Technologies AB
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*
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* Author: Peter Rosin <peda@axentia.se>
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*
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* Licensed under GPLv2 or later.
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*/
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#include "sama5d31.dtsi"
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/ {
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compatible = "axentia,linea",
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"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
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memory {
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reg = <0x20000000 0x4000000>;
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};
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};
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&slow_xtal {
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clock-frequency = <32768>;
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};
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&main_xtal {
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clock-frequency = <12000000>;
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};
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&i2c0 {
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status = "okay";
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eeprom@51 {
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2017-04-13 19:04:29 -06:00
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compatible = "st,24c64", "atmel,24c64";
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2017-01-10 06:18:33 -07:00
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reg = <0x51>;
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pagesize = <32>;
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};
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};
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2017-05-30 03:20:53 -06:00
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&ebi {
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pinctrl-0 = <&pinctrl_ebi_nand_addr>;
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pinctrl-names = "default";
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2017-01-10 06:18:33 -07:00
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status = "okay";
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2017-05-30 03:20:53 -06:00
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};
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2017-01-10 06:18:33 -07:00
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2017-05-30 03:20:53 -06:00
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&nand_controller {
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status = "okay";
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nand: nand@3 {
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reg = <0x3 0x0 0x2>;
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atmel,rb = <0>;
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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nand-on-flash-bbt;
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label = "atmel_nand";
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};
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2017-01-10 06:18:33 -07:00
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};
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