drm/radeon/kms: add hpd support for r1xx-r4xx asics
This just adds the functionality, it's not hooked up yet. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -65,6 +65,95 @@ MODULE_FIRMWARE(FIRMWARE_R520);
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* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
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*/
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/* hpd for digital panel detect/disconnect */
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bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
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{
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bool connected = false;
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switch (hpd) {
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case RADEON_HPD_1:
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if (RREG32(RADEON_FP_GEN_CNTL) & RADEON_FP_DETECT_SENSE)
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connected = true;
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break;
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case RADEON_HPD_2:
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if (RREG32(RADEON_FP2_GEN_CNTL) & RADEON_FP2_DETECT_SENSE)
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connected = true;
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break;
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default:
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break;
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}
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return connected;
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}
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void r100_hpd_set_polarity(struct radeon_device *rdev,
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enum radeon_hpd_id hpd)
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{
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u32 tmp;
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bool connected = r100_hpd_sense(rdev, hpd);
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switch (hpd) {
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case RADEON_HPD_1:
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tmp = RREG32(RADEON_FP_GEN_CNTL);
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if (connected)
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tmp &= ~RADEON_FP_DETECT_INT_POL;
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else
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tmp |= RADEON_FP_DETECT_INT_POL;
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WREG32(RADEON_FP_GEN_CNTL, tmp);
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break;
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case RADEON_HPD_2:
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tmp = RREG32(RADEON_FP2_GEN_CNTL);
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if (connected)
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tmp &= ~RADEON_FP2_DETECT_INT_POL;
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else
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tmp |= RADEON_FP2_DETECT_INT_POL;
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WREG32(RADEON_FP2_GEN_CNTL, tmp);
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break;
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default:
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break;
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}
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}
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void r100_hpd_init(struct radeon_device *rdev)
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{
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struct drm_device *dev = rdev->ddev;
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struct drm_connector *connector;
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list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
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struct radeon_connector *radeon_connector = to_radeon_connector(connector);
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switch (radeon_connector->hpd.hpd) {
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case RADEON_HPD_1:
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rdev->irq.hpd[0] = true;
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break;
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case RADEON_HPD_2:
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rdev->irq.hpd[1] = true;
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break;
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default:
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break;
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}
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}
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r100_irq_set(rdev);
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}
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void r100_hpd_fini(struct radeon_device *rdev)
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{
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struct drm_device *dev = rdev->ddev;
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struct drm_connector *connector;
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list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
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struct radeon_connector *radeon_connector = to_radeon_connector(connector);
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switch (radeon_connector->hpd.hpd) {
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case RADEON_HPD_1:
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rdev->irq.hpd[0] = false;
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break;
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case RADEON_HPD_2:
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rdev->irq.hpd[1] = false;
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break;
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default:
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break;
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}
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}
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}
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/*
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* PCI GART
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*/
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@ -163,6 +252,12 @@ int r100_irq_set(struct radeon_device *rdev)
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if (rdev->irq.crtc_vblank_int[1]) {
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tmp |= RADEON_CRTC2_VBLANK_MASK;
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}
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if (rdev->irq.hpd[0]) {
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tmp |= RADEON_FP_DETECT_MASK;
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}
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if (rdev->irq.hpd[1]) {
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tmp |= RADEON_FP2_DETECT_MASK;
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}
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WREG32(RADEON_GEN_INT_CNTL, tmp);
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return 0;
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}
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@ -181,8 +276,9 @@ void r100_irq_disable(struct radeon_device *rdev)
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static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
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{
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uint32_t irqs = RREG32(RADEON_GEN_INT_STATUS);
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uint32_t irq_mask = RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT |
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RADEON_CRTC2_VBLANK_STAT;
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uint32_t irq_mask = RADEON_SW_INT_TEST |
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RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT |
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RADEON_FP_DETECT_STAT | RADEON_FP2_DETECT_STAT;
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if (irqs) {
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WREG32(RADEON_GEN_INT_STATUS, irqs);
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@ -213,6 +309,12 @@ int r100_irq_process(struct radeon_device *rdev)
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if (status & RADEON_CRTC2_VBLANK_STAT) {
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drm_handle_vblank(rdev->ddev, 1);
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}
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if (status & RADEON_FP_DETECT_STAT) {
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DRM_INFO("HPD1\n");
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}
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if (status & RADEON_FP2_DETECT_STAT) {
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DRM_INFO("HPD2\n");
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}
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status = r100_irq_ack(rdev);
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}
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if (rdev->msi_enabled) {
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