reset: imx7: add the clkreq reset for imx8m
Add the clkreq reset used by the L1ss feature on iMX8M Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>5.4-rM2-2.2.x-imx-squashed
parent
09d3bfdf8b
commit
07ad1543f0
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@ -175,6 +175,7 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
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[IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
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BIT(2) | BIT(1) },
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[IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
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[IMX8MQ_RESET_PCIE_CTRL_APPS_CLK_REQ] = { SRC_PCIEPHY_RCR, BIT(4) },
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[IMX8MQ_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) },
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[IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) },
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[IMX8MQ_RESET_HDMI_PHY_APB_RESET] = { SRC_HDMI_RCR, BIT(0) },
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@ -184,6 +185,7 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
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[IMX8MQ_RESET_PCIEPHY2] = { SRC_PCIE2_RCR,
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BIT(2) | BIT(1) },
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[IMX8MQ_RESET_PCIEPHY2_PERST] = { SRC_PCIE2_RCR, BIT(3) },
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[IMX8MQ_RESET_PCIE2_CTRL_APPS_CLK_REQ] = { SRC_PCIE2_RCR, BIT(4) },
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[IMX8MQ_RESET_PCIE2_CTRL_APPS_EN] = { SRC_PCIE2_RCR, BIT(6) },
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[IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF] = { SRC_PCIE2_RCR, BIT(11) },
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[IMX8MQ_RESET_MIPI_CSI1_CORE_RESET] = { SRC_MIPIPHY1_RCR, BIT(0) },
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@ -219,7 +221,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
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break;
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case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
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case IMX8MQ_RESET_PCIE_CTRL_APPS_CLK_REQ:
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case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
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case IMX8MQ_RESET_PCIE2_CTRL_APPS_CLK_REQ:
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case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
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