usb: xhci: Workaround for S3 issue on AMD SNPS 3.0 xHC
commit 2a63281568
upstream.
On some platform of AMD, S3 fails with HCE and SRE errors. To fix this,
need to disable a bit which is enable in sparse controller.
Cc: stable@vger.kernel.org #v4.19+
Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: Sandeep Singh <sandeep.singh@amd.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/20201028203124.375344-3-mathias.nyman@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
5.4-rM2-2.2.x-imx-squashed
parent
c964d386e8
commit
2600a131e1
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@ -21,6 +21,8 @@
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#define SSIC_PORT_CFG2_OFFSET 0x30
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#define PROG_DONE (1 << 30)
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#define SSIC_PORT_UNUSED (1 << 31)
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#define SPARSE_DISABLE_BIT 17
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#define SPARSE_CNTL_ENABLE 0xC12C
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/* Device for a quirk */
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#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
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@ -149,6 +151,9 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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(pdev->device == 0x15e0 || pdev->device == 0x15e1))
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xhci->quirks |= XHCI_SNPS_BROKEN_SUSPEND;
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if (pdev->vendor == PCI_VENDOR_ID_AMD && pdev->device == 0x15e5)
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xhci->quirks |= XHCI_DISABLE_SPARSE;
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if (pdev->vendor == PCI_VENDOR_ID_AMD)
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xhci->quirks |= XHCI_TRUST_TX_LENGTH;
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@ -467,6 +472,15 @@ static void xhci_pme_quirk(struct usb_hcd *hcd)
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readl(reg);
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}
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static void xhci_sparse_control_quirk(struct usb_hcd *hcd)
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{
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u32 reg;
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reg = readl(hcd->regs + SPARSE_CNTL_ENABLE);
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reg &= ~BIT(SPARSE_DISABLE_BIT);
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writel(reg, hcd->regs + SPARSE_CNTL_ENABLE);
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}
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static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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@ -486,6 +500,9 @@ static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
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if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
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xhci_ssic_port_unused_quirk(hcd, true);
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if (xhci->quirks & XHCI_DISABLE_SPARSE)
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xhci_sparse_control_quirk(hcd);
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ret = xhci_suspend(xhci, do_wakeup);
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if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED))
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xhci_ssic_port_unused_quirk(hcd, false);
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@ -1873,6 +1873,7 @@ struct xhci_hcd {
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#define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33)
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#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
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#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
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#define XHCI_DISABLE_SPARSE BIT_ULL(38)
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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