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Merge 5.8-rc3 into staging-next 

We want the staging fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
zero-sugar-mainline-defconfig
Greg Kroah-Hartman 2020-06-29 08:18:30 +02:00
parent 0107635e15 9ebcfadb06
commit 347fa58ff5
1062 changed files with 9474 additions and 5607 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Documentation/ABI/testing/dev-kmsg
View File

@ -56,11 +56,6 @@ Description: The /dev/kmsg character device node provides userspace access
seek after the last record available at the time
the last SYSLOG_ACTION_CLEAR was issued.
Due to the record nature of this interface with a "read all"
behavior and the specific positions each seek operation sets,
SEEK_CUR is not supported, returning -ESPIPE (invalid seek) to
errno whenever requested.
The output format consists of a prefix carrying the syslog
prefix including priority and facility, the 64 bit message
sequence number and the monotonic timestamp in microseconds,

27
Documentation/ABI/testing/sysfs-bus-papr-pmem 100644
View File

@ -0,0 +1,27 @@
What: /sys/bus/nd/devices/nmemX/papr/flags
Date: Apr, 2020
KernelVersion: v5.8
Contact: linuxppc-dev <linuxppc-dev@lists.ozlabs.org>, linux-nvdimm@lists.01.org,
Description:
(RO) Report flags indicating various states of a
papr-pmem NVDIMM device. Each flag maps to a one or
more bits set in the dimm-health-bitmap retrieved in
response to H_SCM_HEALTH hcall. The details of the bit
flags returned in response to this hcall is available
at 'Documentation/powerpc/papr_hcalls.rst' . Below are
the flags reported in this sysfs file:
* "not_armed" : Indicates that NVDIMM contents will not
survive a power cycle.
* "flush_fail" : Indicates that NVDIMM contents
couldn't be flushed during last
shut-down event.
* "restore_fail": Indicates that NVDIMM contents
couldn't be restored during NVDIMM
initialization.
* "encrypted" : NVDIMM contents are encrypted.
* "smart_notify": There is health event for the NVDIMM.
* "scrubbed" : Indicating that contents of the
NVDIMM have been scrubbed.
* "locked" : Indicating that NVDIMM contents cant
be modified until next power cycle.

8
Documentation/ABI/testing/sysfs-platform-chipidea-usb-otg
View File

@ -1,6 +1,6 @@
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Can be set and read.
Set a_bus_req(A-device bus request) input to be 1 if
@ -17,7 +17,7 @@ Description:
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Can be set and read
The a_bus_drop(A-device bus drop) input is 1 when the
@ -32,7 +32,7 @@ Description:
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Can be set and read.
The b_bus_req(B-device bus request) input is 1 during the time
@ -47,7 +47,7 @@ Description:
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_clr_err
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Only can be set.
The a_clr_err(A-device Vbus error clear) input is used to clear

4
Documentation/admin-guide/cgroup-v2.rst
View File

@ -1356,8 +1356,8 @@ PAGE_SIZE multiple when read back.
thp_fault_alloc
Number of transparent hugepages which were allocated to satisfy
a page fault, including COW faults. This counter is not present
when CONFIG_TRANSPARENT_HUGEPAGE is not set.
a page fault. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE
is not set.
thp_collapse_alloc
Number of transparent hugepages which were allocated to allow

1
Documentation/admin-guide/device-mapper/index.rst
View File

@ -11,6 +11,7 @@ Device Mapper
dm-clone
dm-crypt
dm-dust
dm-ebs
dm-flakey
dm-init
dm-integrity

3
Documentation/admin-guide/mm/transhuge.rst
View File

@ -305,8 +305,7 @@ monitor how successfully the system is providing huge pages for use.
thp_fault_alloc
is incremented every time a huge page is successfully
allocated to handle a page fault. This applies to both the
first time a page is faulted and for COW faults.
allocated to handle a page fault.
thp_collapse_alloc
is incremented by khugepaged when it has found

6
Documentation/arm64/sve.rst
View File

@ -186,7 +186,7 @@ prctl(PR_SVE_SET_VL, unsigned long arg)
flags:
PR_SVE_SET_VL_INHERIT
PR_SVE_VL_INHERIT
Inherit the current vector length across execve(). Otherwise, the
vector length is reset to the system default at execve(). (See
@ -247,7 +247,7 @@ prctl(PR_SVE_GET_VL)
The following flag may be OR-ed into the result:
PR_SVE_SET_VL_INHERIT
PR_SVE_VL_INHERIT
Vector length will be inherited across execve().
@ -393,7 +393,7 @@ The regset data starts with struct user_sve_header, containing:
* At every execve() call, the new vector length of the new process is set to
the system default vector length, unless
* PR_SVE_SET_VL_INHERIT (or equivalently SVE_PT_VL_INHERIT) is set for the
* PR_SVE_VL_INHERIT (or equivalently SVE_PT_VL_INHERIT) is set for the
calling thread, or
* a deferred vector length change is pending, established via the

14
Documentation/bpf/prog_cgroup_sockopt.rst
View File

@ -86,6 +86,20 @@ then the next program in the chain (A) will see those changes,
*not* the original input ``setsockopt`` arguments. The potentially
modified values will be then passed down to the kernel.
Large optval
============
When the ``optval`` is greater than the ``PAGE_SIZE``, the BPF program
can access only the first ``PAGE_SIZE`` of that data. So it has to options:
* Set ``optlen`` to zero, which indicates that the kernel should
use the original buffer from the userspace. Any modifications
done by the BPF program to the ``optval`` are ignored.
* Set ``optlen`` to the value less than ``PAGE_SIZE``, which
indicates that the kernel should use BPF's trimmed ``optval``.
When the BPF program returns with the ``optlen`` greater than
``PAGE_SIZE``, the userspace will receive ``EFAULT`` errno.
Example
=======

2
Documentation/core-api/pin_user_pages.rst
View File

@ -33,7 +33,7 @@ all combinations of get*(), pin*(), FOLL_LONGTERM, and more. Also, the
pin_user_pages*() APIs are clearly distinct from the get_user_pages*() APIs, so
that's a natural dividing line, and a good point to make separate wrapper calls.
In other words, use pin_user_pages*() for DMA-pinned pages, and
get_user_pages*() for other cases. There are four cases described later on in
get_user_pages*() for other cases. There are five cases described later on in
this document, to further clarify that concept.
FOLL_PIN and FOLL_GET are mutually exclusive for a given gup call. However,

6
Documentation/dev-tools/kcsan.rst
View File

@ -114,12 +114,6 @@ the below options are available:
To dynamically limit for which functions to generate reports, see the
`DebugFS interface`_ blacklist/whitelist feature.
For ``__always_inline`` functions, replace ``__always_inline`` with
``__no_kcsan_or_inline`` (which implies ``__always_inline``)::
static __no_kcsan_or_inline void foo(void) {
...
* To disable data race detection for a particular compilation unit, add to the
``Makefile``::

26
Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
View File

@ -34,12 +34,15 @@ properties:
maxItems: 1
clocks:
maxItems: 1
minItems: 1
maxItems: 2
items:
- description: controller register bus clock
- description: baud rate generator and delay control clock
clock-names:
description: input clock for the baud rate generator
items:
- const: core
minItems: 1
maxItems: 2
if:
properties:
@ -51,17 +54,22 @@ if:
then:
properties:
clocks:
contains:
items:
- description: controller register bus clock
- description: baud rate generator and delay control clock
minItems: 2
clock-names:
minItems: 2
items:
- const: core
- const: pclk
else:
properties:
clocks:
maxItems: 1
clock-names:
items:
- const: core
required:
- compatible
- reg

2
Documentation/driver-api/media/v4l2-subdev.rst
View File

@ -451,7 +451,7 @@ The bridge driver also has some helper functions it can use:
"module_foo", "chipid", 0x36, NULL);
This loads the given module (can be ``NULL`` if no module needs to be loaded)
and calls :c:func:`i2c_new_device` with the given ``i2c_adapter`` and
and calls :c:func:`i2c_new_client_device` with the given ``i2c_adapter`` and
chip/address arguments. If all goes well, then it registers the subdev with
the v4l2_device.

6
Documentation/filesystems/dax.txt
View File

@ -25,7 +25,7 @@ size when creating the filesystem.
Currently 3 filesystems support DAX: ext2, ext4 and xfs. Enabling DAX on them
is different.
Enabling DAX on ext4 and ext2
Enabling DAX on ext2
-----------------------------
When mounting the filesystem, use the "-o dax" option on the command line or
@ -33,8 +33,8 @@ add 'dax' to the options in /etc/fstab. This works to enable DAX on all files
within the filesystem. It is equivalent to the '-o dax=always' behavior below.
Enabling DAX on xfs
-------------------
Enabling DAX on xfs and ext4
----------------------------
Summary
-------

3
Documentation/filesystems/ext4/verity.rst
View File

@ -39,3 +39,6 @@ is encrypted as well as the data itself.
Verity files cannot have blocks allocated past the end of the verity
metadata.
Verity and DAX are not compatible and attempts to set both of these flags
on a file will fail.

9
Documentation/gpu/amdgpu.rst
View File

@ -197,11 +197,14 @@ pp_power_profile_mode
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
:doc: pp_power_profile_mode
busy_percent
~~~~~~~~~~~~
*_busy_percent
~~~~~~~~~~~~~~
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
:doc: busy_percent
:doc: gpu_busy_percent
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
:doc: mem_busy_percent
GPU Product Information
=======================

2
Documentation/i2c/smbus-protocol.rst
View File

@ -57,7 +57,7 @@ SMBus Quick Command
This sends a single bit to the device, at the place of the Rd/Wr bit::
A Addr Rd/Wr [A] P
S Addr Rd/Wr [A] P
Functionality flag: I2C_FUNC_SMBUS_QUICK

4
Documentation/networking/ieee802154.rst
View File

@ -30,8 +30,8 @@ Socket API
The address family, socket addresses etc. are defined in the
include/net/af_ieee802154.h header or in the special header
in the userspace package (see either http://wpan.cakelab.org/ or the
git tree at https://github.com/linux-wpan/wpan-tools).
in the userspace package (see either https://linux-wpan.org/wpan-tools.html
or the git tree at https://github.com/linux-wpan/wpan-tools).
6LoWPAN Linux implementation
============================

46
Documentation/powerpc/papr_hcalls.rst
View File

@ -220,13 +220,51 @@ from the LPAR memory.
**H_SCM_HEALTH**
| Input: drcIndex
| Out: *health-bitmap, health-bit-valid-bitmap*
| Out: *health-bitmap (r4), health-bit-valid-bitmap (r5)*
| Return Value: *H_Success, H_Parameter, H_Hardware*
Given a DRC Index return the info on predictive failure and overall health of
the NVDIMM. The asserted bits in the health-bitmap indicate a single predictive
failure and health-bit-valid-bitmap indicate which bits in health-bitmap are
valid.
the PMEM device. The asserted bits in the health-bitmap indicate one or more states
(described in table below) of the PMEM device and health-bit-valid-bitmap indicate
which bits in health-bitmap are valid. The bits are reported in
reverse bit ordering for example a value of 0xC400000000000000
indicates bits 0, 1, and 5 are valid.
Health Bitmap Flags:
+------+-----------------------------------------------------------------------+
| Bit | Definition |
+======+=======================================================================+
| 00 | PMEM device is unable to persist memory contents. |
| | If the system is powered down, nothing will be saved. |
+------+-----------------------------------------------------------------------+
| 01 | PMEM device failed to persist memory contents. Either contents were |
| | not saved successfully on power down or were not restored properly on |
| | power up. |
+------+-----------------------------------------------------------------------+
| 02 | PMEM device contents are persisted from previous IPL. The data from |
| | the last boot were successfully restored. |
+------+-----------------------------------------------------------------------+
| 03 | PMEM device contents are not persisted from previous IPL. There was no|
| | data to restore from the last boot. |
+------+-----------------------------------------------------------------------+
| 04 | PMEM device memory life remaining is critically low |
+------+-----------------------------------------------------------------------+
| 05 | PMEM device will be garded off next IPL due to failure |
+------+-----------------------------------------------------------------------+
| 06 | PMEM device contents cannot persist due to current platform health |
| | status. A hardware failure may prevent data from being saved or |
| | restored. |
+------+-----------------------------------------------------------------------+
| 07 | PMEM device is unable to persist memory contents in certain conditions|
+------+-----------------------------------------------------------------------+
| 08 | PMEM device is encrypted |
+------+-----------------------------------------------------------------------+
| 09 | PMEM device has successfully completed a requested erase or secure |
| | erase procedure. |
+------+-----------------------------------------------------------------------+
|10:63 | Reserved / Unused |
+------+-----------------------------------------------------------------------+
**H_SCM_PERFORMANCE_STATS**

12
Documentation/sh/index.rst
View File

@ -16,18 +16,6 @@ Store Queue API
.. kernel-doc:: arch/sh/kernel/cpu/sh4/sq.c
:export:
SH-5
----
TLB Interfaces
~~~~~~~~~~~~~~
.. kernel-doc:: arch/sh/mm/tlb-sh5.c
:internal:
.. kernel-doc:: arch/sh/include/asm/tlb_64.h
:internal:
Machine Specific Interfaces
===========================

2
Documentation/userspace-api/media/conf_nitpick.py
View File

@ -27,7 +27,7 @@ nitpick_ignore = [
("c:func", "copy_to_user"),
("c:func", "determine_valid_ioctls"),
("c:func", "ERR_PTR"),
("c:func", "i2c_new_device"),
("c:func", "i2c_new_client_device"),
("c:func", "ioctl"),
("c:func", "IS_ERR"),
("c:func", "KERNEL_VERSION"),

53
MAINTAINERS
View File

@ -8333,7 +8333,7 @@ M: Alexander Aring <alex.aring@gmail.com>
M: Stefan Schmidt <stefan@datenfreihafen.org>
L: linux-wpan@vger.kernel.org
S: Maintained
W: http://wpan.cakelab.org/
W: https://linux-wpan.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan-next.git
F: Documentation/networking/ieee802154.rst
@ -10808,7 +10808,7 @@ F: Documentation/devicetree/bindings/dma/mtk-*
F: drivers/dma/mediatek/
MEDIATEK ETHERNET DRIVER
M: Felix Fietkau <nbd@openwrt.org>
M: Felix Fietkau <nbd@nbd.name>
M: John Crispin <john@phrozen.org>
M: Sean Wang <sean.wang@mediatek.com>
M: Mark Lee <Mark-MC.Lee@mediatek.com>
@ -11369,14 +11369,6 @@ L: dmaengine@vger.kernel.org
S: Supported
F: drivers/dma/at_xdmac.c
MICROSEMI ETHERNET SWITCH DRIVER
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
L: netdev@vger.kernel.org
S: Supported
F: drivers/net/ethernet/mscc/
F: include/soc/mscc/ocelot*
MICROSEMI MIPS SOCS
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
@ -12335,6 +12327,18 @@ M: Peter Zijlstra <peterz@infradead.org>
S: Supported
F: tools/objtool/
OCELOT ETHERNET SWITCH DRIVER
M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
M: Vladimir Oltean <vladimir.oltean@nxp.com>
M: Claudiu Manoil <claudiu.manoil@nxp.com>
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
L: netdev@vger.kernel.org
S: Supported
F: drivers/net/dsa/ocelot/*
F: drivers/net/ethernet/mscc/
F: include/soc/mscc/ocelot*
F: net/dsa/tag_ocelot.c
OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER
M: Frederic Barrat <fbarrat@linux.ibm.com>
M: Andrew Donnellan <ajd@linux.ibm.com>
@ -12691,13 +12695,13 @@ F: arch/mips/boot/dts/ralink/omega2p.dts
OP-TEE DRIVER
M: Jens Wiklander <jens.wiklander@linaro.org>
L: tee-dev@lists.linaro.org
L: op-tee@lists.trustedfirmware.org
S: Maintained
F: drivers/tee/optee/
OP-TEE RANDOM NUMBER GENERATOR (RNG) DRIVER
M: Sumit Garg <sumit.garg@linaro.org>
L: tee-dev@lists.linaro.org
L: op-tee@lists.trustedfirmware.org
S: Maintained
F: drivers/char/hw_random/optee-rng.c
@ -14192,6 +14196,15 @@ L: dmaengine@vger.kernel.org
S: Supported
F: drivers/dma/qcom/hidma*
QUALCOMM I2C CCI DRIVER
M: Loic Poulain <loic.poulain@linaro.org>
M: Robert Foss <robert.foss@linaro.org>
L: linux-i2c@vger.kernel.org
L: linux-arm-msm@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
F: drivers/i2c/busses/i2c-qcom-cci.c
QUALCOMM IOMMU
M: Rob Clark <robdclark@gmail.com>
L: iommu@lists.linux-foundation.org
@ -14534,7 +14547,7 @@ F: Documentation/devicetree/bindings/i2c/renesas,iic-emev2.txt
F: drivers/i2c/busses/i2c-emev2.c
RENESAS ETHERNET DRIVERS
R: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
R: Sergei Shtylyov <sergei.shtylyov@gmail.com>
L: netdev@vger.kernel.org
L: linux-renesas-soc@vger.kernel.org
F: Documentation/devicetree/bindings/net/renesas,*.txt
@ -16045,8 +16058,10 @@ SPARSE CHECKER
M: "Luc Van Oostenryck" <luc.vanoostenryck@gmail.com>
L: linux-sparse@vger.kernel.org
S: Maintained
W: https://sparse.wiki.kernel.org/
W: https://sparse.docs.kernel.org/
T: git git://git.kernel.org/pub/scm/devel/sparse/sparse.git
Q: https://patchwork.kernel.org/project/linux-sparse/list/
B: https://bugzilla.kernel.org/enter_bug.cgi?component=Sparse&product=Tools
F: include/linux/compiler.h
SPEAR CLOCK FRAMEWORK SUPPORT
@ -16759,7 +16774,7 @@ F: include/media/i2c/tw9910.h
TEE SUBSYSTEM
M: Jens Wiklander <jens.wiklander@linaro.org>
L: tee-dev@lists.linaro.org
L: op-tee@lists.trustedfirmware.org
S: Maintained
F: Documentation/tee.txt
F: drivers/tee/
@ -18254,14 +18269,6 @@ S: Maintained
F: drivers/input/serio/userio.c
F: include/uapi/linux/userio.h
VITESSE FELIX ETHERNET SWITCH DRIVER
M: Vladimir Oltean <vladimir.oltean@nxp.com>
M: Claudiu Manoil <claudiu.manoil@nxp.com>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/dsa/ocelot/*
F: net/dsa/tag_ocelot.c
VIVID VIRTUAL VIDEO DRIVER
M: Hans Verkuil <hverkuil@xs4all.nl>
L: linux-media@vger.kernel.org

18
Makefile
View File

@ -2,7 +2,7 @@
VERSION = 5
PATCHLEVEL = 8
SUBLEVEL = 0
EXTRAVERSION = -rc1
EXTRAVERSION = -rc3
NAME = Kleptomaniac Octopus
# *DOCUMENTATION*
@ -828,7 +828,7 @@ endif
ifdef CONFIG_DEBUG_INFO_COMPRESSED
DEBUG_CFLAGS += -gz=zlib
KBUILD_AFLAGS += -Wa,--compress-debug-sections=zlib
KBUILD_AFLAGS += -gz=zlib
KBUILD_LDFLAGS += --compress-debug-sections=zlib
endif
@ -1336,16 +1336,6 @@ dt_binding_check: scripts_dtc
# ---------------------------------------------------------------------------
# Modules
# install modules.builtin regardless of CONFIG_MODULES
PHONY += _builtin_inst_
_builtin_inst_:
@mkdir -p $(MODLIB)/
@cp -f modules.builtin $(MODLIB)/
@cp -f $(objtree)/modules.builtin.modinfo $(MODLIB)/
PHONY += install
install: _builtin_inst_
ifdef CONFIG_MODULES
# By default, build modules as well
@ -1389,7 +1379,7 @@ PHONY += modules_install
modules_install: _modinst_ _modinst_post
PHONY += _modinst_
_modinst_: _builtin_inst_
_modinst_:
@rm -rf $(MODLIB)/kernel
@rm -f $(MODLIB)/source
@mkdir -p $(MODLIB)/kernel
@ -1399,6 +1389,8 @@ _modinst_: _builtin_inst_
ln -s $(CURDIR) $(MODLIB)/build ; \
fi
@sed 's:^:kernel/:' modules.order > $(MODLIB)/modules.order
@cp -f modules.builtin $(MODLIB)/
@cp -f $(objtree)/modules.builtin.modinfo $(MODLIB)/
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst
# This depmod is only for convenience to give the initial

2
arch/arm/boot/dts/am335x-baltos.dtsi
View File

@ -369,7 +369,7 @@
&mmc2 {
status = "okay";
vmmc-supply = <&wl12xx_vmmc>;
ti,non-removable;
non-removable;
bus-width = <4>;
cap-power-off-card;
pinctrl-names = "default";

1
arch/arm/boot/dts/am335x-boneblack-common.dtsi
View File

@ -22,6 +22,7 @@
pinctrl-0 = <&emmc_pins>;
bus-width = <8>;
status = "okay";
non-removable;
};
&am33xx_pinmux {

1
arch/arm/boot/dts/am335x-boneblack-wireless.dts
View File

@ -75,7 +75,6 @@
bus-width = <4>;
non-removable;
cap-power-off-card;
ti,needs-special-hs-handling;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;

1
arch/arm/boot/dts/am335x-boneblue.dts
View File

@ -367,7 +367,6 @@
bus-width = <4>;
non-removable;
cap-power-off-card;
ti,needs-special-hs-handling;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;

1
arch/arm/boot/dts/am335x-bonegreen-wireless.dts
View File

@ -75,7 +75,6 @@
bus-width = <4>;
non-removable;
cap-power-off-card;
ti,needs-special-hs-handling;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;

3
arch/arm/boot/dts/am335x-evm.dts
View File

@ -743,8 +743,7 @@
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wlan_pins>;
ti,non-removable;
ti,needs-special-hs-handling;
non-removable;
cap-power-off-card;
keep-power-in-suspend;

2
arch/arm/boot/dts/am335x-evmsk.dts
View File

@ -655,7 +655,7 @@
&mmc2 {
status = "okay";
vmmc-supply = <&wl12xx_vmmc>;
ti,non-removable;
non-removable;
bus-width = <4>;
cap-power-off-card;
keep-power-in-suspend;

2
arch/arm/boot/dts/am335x-lxm.dts
View File

@ -339,7 +339,7 @@
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
ti,non-removable;
non-removable;
status = "okay";
};

2
arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi
View File

@ -159,7 +159,7 @@
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-0 = <&mmc1_pins_default>;
ti,non-removable;
non-removable;
status = "okay";
};

2
arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts
View File

@ -451,7 +451,7 @@
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-0 = <&mmc2_pins_default>;
ti,non-removable;
non-removable;
status = "okay";
};

4
arch/arm/boot/dts/am335x-pepper.dts
View File

@ -341,7 +341,7 @@
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&ldo3_reg>;
bus-width = <8>;
ti,non-removable;
non-removable;
};
&mmc3 {
@ -351,7 +351,7 @@
pinctrl-0 = <&wireless_pins>;
vmmmc-supply = <&v3v3c_reg>;
bus-width = <4>;
ti,non-removable;
non-removable;
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";

2
arch/arm/boot/dts/am335x-phycore-som.dtsi
View File

@ -69,7 +69,7 @@
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmc_reg>;
bus-width = <8>;
ti,non-removable;
non-removable;
status = "disabled";
};

1
arch/arm/boot/dts/am335x-pocketbeagle.dts
View File

@ -88,7 +88,6 @@
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
>;
};

6
arch/arm/boot/dts/am33xx-l4.dtsi
View File

@ -1335,10 +1335,8 @@
ranges = <0x0 0x60000 0x1000>;
mmc1: mmc@0 {
compatible = "ti,omap4-hsmmc";
ti,dual-volt;
compatible = "ti,am335-sdhci";
ti,needs-special-reset;
ti,needs-special-hs-handling;
dmas = <&edma_xbar 24 0 0
&edma_xbar 25 0 0>;
dma-names = "tx", "rx";
@ -1816,7 +1814,7 @@
ranges = <0x0 0xd8000 0x1000>;
mmc2: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am335-sdhci";
ti,needs-special-reset;
dmas = <&edma 2 0
&edma 3 0>;

7
arch/arm/boot/dts/am33xx.dtsi
View File

@ -322,10 +322,11 @@
ranges = <0x0 0x47810000 0x1000>;
mmc3: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am335-sdhci";
ti,needs-special-reset;
interrupts = <29>;
reg = <0x0 0x1000>;
status = "disabled";
};
};
@ -335,7 +336,7 @@
<0x47400010 0x4>;
reg-names = "rev", "sysc";
ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
SYSC_OMAP2_SOFTRESET)>;
SYSC_OMAP4_SOFTRESET)>;
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
@ -347,7 +348,7 @@
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x47400000 0x5000>;
ranges = <0x0 0x47400000 0x8000>;
usb0_phy: usb-phy@1300 {
compatible = "ti,am335x-usb-phy";

3
arch/arm/boot/dts/am4372.dtsi
View File

@ -316,10 +316,11 @@
ranges = <0x0 0x47810000 0x1000>;
mmc3: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am437-sdhci";
ti,needs-special-reset;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x1000>;
status = "disabled";
};
};

2
arch/arm/boot/dts/am437x-cm-t43.dts
View File

@ -291,7 +291,7 @@
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmc_3v3>;
bus-width = <8>;
ti,non-removable;
non-removable;
};
&spi0 {

20
arch/arm/boot/dts/am437x-gp-evm.dts
View File

@ -91,22 +91,6 @@
backlight = <&lcd_bl>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <210>;
hback-porch = <16>;
hsync-len = <30>;
vback-porch = <10>;
vfront-porch = <22>;
vsync-len = <13>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
@ -869,7 +853,7 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&emmc_pins_default>;
pinctrl-1 = <&emmc_pins_sleep>;
ti,non-removable;
non-removable;
};
&mmc3 {
@ -886,7 +870,7 @@
pinctrl-1 = <&mmc3_pins_sleep>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
non-removable;
#address-cells = <1>;
#size-cells = <0>;

5
arch/arm/boot/dts/am437x-l4.dtsi
View File

@ -1083,9 +1083,8 @@
ranges = <0x0 0x60000 0x1000>;
mmc1: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am437-sdhci";
reg = <0x0 0x1000>;
ti,dual-volt;
ti,needs-special-reset;
dmas = <&edma 24 0>,
<&edma 25 0>;
@ -1598,7 +1597,7 @@
ranges = <0x0 0xd8000 0x1000>;
mmc2: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am437-sdhci";
reg = <0x0 0x1000>;
ti,needs-special-reset;
dmas = <&edma 2 0>,

18
arch/arm/boot/dts/am437x-sk-evm.dts
View File

@ -134,22 +134,6 @@
enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
panel-timing {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <2>;
hback-porch = <2>;
hsync-len = <41>;
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
@ -719,7 +703,7 @@
pinctrl-1 = <&mmc3_pins_sleep>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
non-removable;
#address-cells = <1>;
#size-cells = <0>;

16
arch/arm/boot/dts/am43x-epos-evm.dts
View File

@ -47,22 +47,6 @@
backlight = <&lcd_bl>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <210>;
hback-porch = <16>;
hsync-len = <30>;
vback-porch = <10>;
vfront-porch = <22>;
vsync-len = <13>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;

2
arch/arm/boot/dts/am5729-beagleboneai.dts
View File

@ -505,7 +505,7 @@
&cpsw_emac0 {
phy-handle = <&phy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
};
&ocp {

10
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@ -200,7 +200,7 @@
status = "disabled";
};
dma@20000 {
dma: dma@20000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x20000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
@ -215,6 +215,8 @@
clocks = <&iprocslow>;
clock-names = "apb_pclk";
#dma-cells = <1>;
dma-coherent;
status = "disabled";
};
sdio: sdhci@21000 {
@ -257,10 +259,10 @@
status = "disabled";
};
mailbox: mailbox@25000 {
mailbox: mailbox@25c00 {
compatible = "brcm,iproc-fa2-mbox";
reg = <0x25000 0x445>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x25c00 0x400>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>;
brcm,rx-status-len = <32>;
brcm,use-bcm-hdr;

1
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
View File

@ -17,6 +17,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};

4
arch/arm/boot/dts/bcm958522er.dts
View File

@ -58,6 +58,10 @@
/* USB 3 support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

4
arch/arm/boot/dts/bcm958525er.dts
View File

@ -58,6 +58,10 @@
/* USB 3 support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

4
arch/arm/boot/dts/bcm958525xmc.dts
View File

@ -58,6 +58,10 @@
/* XHCI support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

4
arch/arm/boot/dts/bcm958622hr.dts
View File

@ -58,6 +58,10 @@
/* USB 3 and SLIC support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

4
arch/arm/boot/dts/bcm958623hr.dts
View File

@ -58,6 +58,10 @@
/* USB 3 and SLIC support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

4
arch/arm/boot/dts/bcm958625hr.dts
View File

@ -69,6 +69,10 @@
status = "okay";
};
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

4
arch/arm/boot/dts/bcm958625k.dts
View File

@ -48,6 +48,10 @@
};
};
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

20
arch/arm/boot/dts/dra7-evm-common.dtsi
View File

@ -245,26 +245,6 @@
rx-num-evt = <32>;
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};
&pcie1_rc {
status = "okay";
};

34
arch/arm/boot/dts/dra7-l4.dtsi
View File

@ -1207,9 +1207,8 @@
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): l4per_pwrdm, l4per_clkdm */
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x36000 0x1000>;
@ -3352,8 +3351,8 @@
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x20000 0x1000>;
@ -3361,8 +3360,8 @@
timer5: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
};
};
@ -3379,9 +3378,8 @@
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x22000 0x1000>;
@ -3389,8 +3387,8 @@
timer6: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
};
};
@ -3498,8 +3496,8 @@
timer14: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
@ -3526,8 +3524,8 @@
timer15: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
@ -3554,8 +3552,8 @@
timer16: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};

13
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
View File

@ -232,13 +232,6 @@
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
@ -409,10 +402,4 @@
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0
>;
};
};

13
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
View File

@ -57,6 +57,13 @@
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reset_out>;
@ -106,4 +113,10 @@
MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x18b0
>;
};
};

4
arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
View File

@ -13,8 +13,10 @@
#interrupt-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <3000000>;
spi-max-frequency = <9600000>;
spi-cs-high;
spi-cpol;
spi-cpha;
cpcap_adc: adc {
compatible = "motorola,mapphone-cpcap-adc";

2
arch/arm/boot/dts/omap4-duovero-parlor.dts
View File

@ -139,7 +139,7 @@
ethernet@gpmc {
reg = <5 0 0xff>;
interrupt-parent = <&gpio2>;
interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* gpio_44 */
interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */
phy-mode = "mii";

2
arch/arm/boot/dts/omap4.dtsi
View File

@ -662,6 +662,6 @@
ti,no-idle;
timer@0 {
assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
};

146
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
View File

@ -100,79 +100,6 @@
};
};
mcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
oscclk0 {
/* MCC static memory clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>;
freq-range = <25000000 60000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk0";
};
v2m_oscclk1: oscclk1 {
/* CLCD clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>;
freq-range = <23750000 65000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk1";
};
v2m_oscclk2: oscclk2 {
/* IO FPGA peripheral clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>;
freq-range = <24000000 24000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk2";
};
volt-vio {
/* Logic level voltage */
compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>;
regulator-name = "VIO";
regulator-always-on;
label = "VIO";
};
temp-mcc {
/* MCC internal operating temperature */
compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>;
label = "MCC";
};
reset {
compatible = "arm,vexpress-reset";
arm,vexpress-sysreg,func = <5 0>;
};
muxfpga {
compatible = "arm,vexpress-muxfpga";
arm,vexpress-sysreg,func = <7 0>;
};
shutdown {
compatible = "arm,vexpress-shutdown";
arm,vexpress-sysreg,func = <8 0>;
};
reboot {
compatible = "arm,vexpress-reboot";
arm,vexpress-sysreg,func = <9 0>;
};
dvimode {
compatible = "arm,vexpress-dvimode";
arm,vexpress-sysreg,func = <11 0>;
};
};
bus@8000000 {
motherboard-bus {
model = "V2M-P1";
@ -435,6 +362,79 @@
};
};
};
mcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
oscclk0 {
/* MCC static memory clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>;
freq-range = <25000000 60000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk0";
};
v2m_oscclk1: oscclk1 {
/* CLCD clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>;
freq-range = <23750000 65000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk1";
};
v2m_oscclk2: oscclk2 {
/* IO FPGA peripheral clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>;
freq-range = <24000000 24000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk2";
};
volt-vio {
/* Logic level voltage */
compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>;
regulator-name = "VIO";
regulator-always-on;
label = "VIO";
};
temp-mcc {
/* MCC internal operating temperature */
compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>;
label = "MCC";
};
reset {
compatible = "arm,vexpress-reset";
arm,vexpress-sysreg,func = <5 0>;
};
muxfpga {
compatible = "arm,vexpress-muxfpga";
arm,vexpress-sysreg,func = <7 0>;
};
shutdown {
compatible = "arm,vexpress-shutdown";
arm,vexpress-sysreg,func = <8 0>;
};
reboot {
compatible = "arm,vexpress-reboot";
arm,vexpress-sysreg,func = <9 0>;
};
dvimode {
compatible = "arm,vexpress-dvimode";
arm,vexpress-sysreg,func = <11 0>;
};
};
};
};
};

7
arch/arm/include/asm/efi.h
View File

@ -87,4 +87,11 @@ static inline unsigned long efi_get_max_initrd_addr(unsigned long dram_base,
return dram_base + SZ_512M;
}
struct efi_arm_entry_state {
u32 cpsr_before_ebs;
u32 sctlr_before_ebs;
u32 cpsr_after_ebs;
u32 sctlr_after_ebs;
};
#endif /* _ASM_ARM_EFI_H */

3
arch/arm/kernel/ftrace.c
View File

@ -84,7 +84,8 @@ static int ftrace_modify_code(unsigned long pc, unsigned long old,
old = __opcode_to_mem_arm(old);
if (validate) {
if (probe_kernel_read(&replaced, (void *)pc, MCOUNT_INSN_SIZE))
if (copy_from_kernel_nofault(&replaced, (void *)pc,
MCOUNT_INSN_SIZE))
return -EFAULT;
if (replaced != old)

2
arch/arm/kernel/kgdb.c
View File

@ -236,7 +236,7 @@ int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt)
/* patch_text() only supports int-sized breakpoints */
BUILD_BUG_ON(sizeof(int) != BREAK_INSTR_SIZE);
err = probe_kernel_read(bpt->saved_instr, (char *)bpt->bpt_addr,
err = copy_from_kernel_nofault(bpt->saved_instr, (char *)bpt->bpt_addr,
BREAK_INSTR_SIZE);
if (err)
return err;

2
arch/arm/kernel/traps.c
View File

@ -396,7 +396,7 @@ int is_valid_bugaddr(unsigned long pc)
u32 insn = __opcode_to_mem_arm(BUG_INSTR_VALUE);
#endif
if (probe_kernel_address((unsigned *)pc, bkpt))
if (get_kernel_nofault(bkpt, (void *)pc))
return 0;
return bkpt == insn;

1
arch/arm/mach-bcm/Kconfig
View File

@ -53,6 +53,7 @@ config ARCH_BCM_NSP
select ARM_ERRATA_754322
select ARM_ERRATA_775420
select ARM_ERRATA_764369 if SMP
select ARM_TIMER_SP804
select THERMAL
select THERMAL_OF
help

6
arch/arm/mach-imx/pm-imx5.c
View File

@ -295,14 +295,14 @@ static int __init imx_suspend_alloc_ocram(
if (!ocram_pool) {
pr_warn("%s: ocram pool unavailable!\n", __func__);
ret = -ENODEV;
goto put_node;
goto put_device;
}
ocram_base = gen_pool_alloc(ocram_pool, size);
if (!ocram_base) {
pr_warn("%s: unable to alloc ocram!\n", __func__);
ret = -ENOMEM;
goto put_node;
goto put_device;
}
phys = gen_pool_virt_to_phys(ocram_pool, ocram_base);
@ -312,6 +312,8 @@ static int __init imx_suspend_alloc_ocram(
if (virt_out)
*virt_out = virt;
put_device:
put_device(&pdev->dev);
put_node:
of_node_put(node);

10
arch/arm/mach-imx/pm-imx6.c
View File

@ -493,14 +493,14 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
if (!ocram_pool) {
pr_warn("%s: ocram pool unavailable!\n", __func__);
ret = -ENODEV;
goto put_node;
goto put_device;
}
ocram_base = gen_pool_alloc(ocram_pool, MX6Q_SUSPEND_OCRAM_SIZE);
if (!ocram_base) {
pr_warn("%s: unable to alloc ocram!\n", __func__);
ret = -ENOMEM;
goto put_node;
goto put_device;
}
ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
@ -523,7 +523,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
ret = imx6_pm_get_base(&pm_info->mmdc_base, socdata->mmdc_compat);
if (ret) {
pr_warn("%s: failed to get mmdc base %d!\n", __func__, ret);
goto put_node;
goto put_device;
}
ret = imx6_pm_get_base(&pm_info->src_base, socdata->src_compat);
@ -570,7 +570,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
&imx6_suspend,
MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info));
goto put_node;
goto put_device;
pl310_cache_map_failed:
iounmap(pm_info->gpc_base.vbase);
@ -580,6 +580,8 @@ iomuxc_map_failed:
iounmap(pm_info->src_base.vbase);
src_map_failed:
iounmap(pm_info->mmdc_base.vbase);
put_device:
put_device(&pdev->dev);
put_node:
of_node_put(node);

2
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -3489,7 +3489,7 @@ static const struct omap_hwmod_reset dra7_reset_quirks[] = {
};
static const struct omap_hwmod_reset omap_reset_quirks[] = {
{ .match = "dss", .len = 3, .reset = omap_dss_reset, },
{ .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
{ .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
{ .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
{ .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },

9
arch/arm/mach-sti/board-dt.c
View File

@ -20,14 +20,6 @@ static const char *const stih41x_dt_match[] __initconst = {
NULL
};
static void sti_l2_write_sec(unsigned long val, unsigned reg)
{
/*
* We can't write to secure registers as we are in non-secure
* mode, until we have some SMI service available.
*/
}
DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
.dt_compat = stih41x_dt_match,
.l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE |
@ -36,5 +28,4 @@ DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
L2C_AUX_CTRL_WAY_SIZE(4),
.l2c_aux_mask = 0xc0000fff,
.smp = smp_ops(sti_smp_ops),
.l2c_write_sec = sti_l2_write_sec,
MACHINE_END

4
arch/arm/mm/alignment.c
View File

@ -774,7 +774,7 @@ static int alignment_get_arm(struct pt_regs *regs, u32 *ip, u32 *inst)
if (user_mode(regs))
fault = get_user(instr, ip);
else
fault = probe_kernel_address(ip, instr);
fault = get_kernel_nofault(instr, ip);
*inst = __mem_to_opcode_arm(instr);
@ -789,7 +789,7 @@ static int alignment_get_thumb(struct pt_regs *regs, u16 *ip, u16 *inst)
if (user_mode(regs))
fault = get_user(instr, ip);
else
fault = probe_kernel_address(ip, instr);
fault = get_kernel_nofault(instr, ip);
*inst = __mem_to_opcode_thumb16(instr);

8
arch/arm64/Kconfig
View File

@ -1518,9 +1518,9 @@ config ARM64_PTR_AUTH
default y
depends on !KVM || ARM64_VHE
depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) && AS_HAS_PAC
# GCC 9.1 and later inserts a .note.gnu.property section note for PAC
# Modern compilers insert a .note.gnu.property section note for PAC
# which is only understood by binutils starting with version 2.33.1.
depends on !CC_IS_GCC || GCC_VERSION < 90100 || LD_VERSION >= 233010000
depends on LD_IS_LLD || LD_VERSION >= 233010000 || (CC_IS_GCC && GCC_VERSION < 90100)
depends on !CC_IS_CLANG || AS_HAS_CFI_NEGATE_RA_STATE
depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
help
@ -1564,7 +1564,7 @@ config CC_HAS_SIGN_RETURN_ADDRESS
def_bool $(cc-option,-msign-return-address=all)
config AS_HAS_PAC
def_bool $(as-option,-Wa$(comma)-march=armv8.3-a)
def_bool $(cc-option,-Wa$(comma)-march=armv8.3-a)
config AS_HAS_CFI_NEGATE_RA_STATE
def_bool $(as-instr,.cfi_startproc\n.cfi_negate_ra_state\n.cfi_endproc\n)
@ -1630,6 +1630,8 @@ config ARM64_BTI_KERNEL
depends on CC_HAS_BRANCH_PROT_PAC_RET_BTI
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697
depends on !CC_IS_GCC || GCC_VERSION >= 100100
# https://reviews.llvm.org/rGb8ae3fdfa579dbf366b1bb1cbfdbf8c51db7fa55
depends on !CC_IS_CLANG || CLANG_VERSION >= 100001
depends on !(CC_IS_CLANG && GCOV_KERNEL)
depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
help

15
arch/arm64/Kconfig.debug
View File

@ -8,21 +8,6 @@ config PID_IN_CONTEXTIDR
instructions during context switch. Say Y here only if you are
planning to use hardware trace tools with this kernel.
config ARM64_RANDOMIZE_TEXT_OFFSET
bool "Randomize TEXT_OFFSET at build time"
help
Say Y here if you want the image load offset (AKA TEXT_OFFSET)
of the kernel to be randomized at build-time. When selected,
this option will cause TEXT_OFFSET to be randomized upon any
build of the kernel, and the offset will be reflected in the
text_offset field of the resulting Image. This can be used to
fuzz-test bootloaders which respect text_offset.
This option is intended for bootloader and/or kernel testing
only. Bootloaders must make no assumptions regarding the value
of TEXT_OFFSET and platforms must not require a specific
value.
config DEBUG_EFI
depends on EFI && DEBUG_INFO
bool "UEFI debugging"

6
arch/arm64/Makefile
View File

@ -121,13 +121,7 @@ endif
head-y := arch/arm64/kernel/head.o
# The byte offset of the kernel image in RAM from the start of RAM.
ifeq ($(CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET), y)
TEXT_OFFSET := $(shell awk "BEGIN {srand(); printf \"0x%06x\n\", \
int(2 * 1024 * 1024 / (2 ^ $(CONFIG_ARM64_PAGE_SHIFT)) * \
rand()) * (2 ^ $(CONFIG_ARM64_PAGE_SHIFT))}")
else
TEXT_OFFSET := 0x0
endif
ifeq ($(CONFIG_KASAN_SW_TAGS), y)
KASAN_SHADOW_SCALE_SHIFT := 4

4
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
View File

@ -136,7 +136,7 @@
ldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <3000000>;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
@ -144,7 +144,7 @@
ldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <900000>;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;

4
arch/arm64/boot/dts/freescale/imx8mm-evk.dts
View File

@ -208,7 +208,7 @@
ldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <3000000>;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
@ -216,7 +216,7 @@
ldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <900000>;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;

4
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
View File

@ -113,7 +113,7 @@
ldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <3000000>;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
@ -121,7 +121,7 @@
ldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <900000>;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;

6
arch/arm64/include/asm/linkage.h
View File

@ -12,7 +12,6 @@
* instead.
*/
#define BTI_C hint 34 ;
#define BTI_J hint 36 ;
/*
* When using in-kernel BTI we need to ensure that PCS-conformant assembly
@ -43,11 +42,6 @@
SYM_START(name, SYM_L_WEAK, SYM_A_NONE) \
BTI_C
#define SYM_INNER_LABEL(name, linkage) \
.type name SYM_T_NONE ASM_NL \
SYM_ENTRY(name, linkage, SYM_A_NONE) \
BTI_J
#endif
/*

3
arch/arm64/include/asm/mmu.h
View File

@ -19,6 +19,9 @@
typedef struct {
atomic64_t id;
#ifdef CONFIG_COMPAT
void *sigpage;
#endif
void *vdso;
unsigned long flags;
} mm_context_t;

2
arch/arm64/include/asm/pgtable.h
View File

@ -416,7 +416,7 @@ static inline pmd_t pmd_mkdevmap(pmd_t pmd)
__pgprot((pgprot_val(prot) & ~(mask)) | (bits))
#define pgprot_nx(prot) \
__pgprot_modify(prot, 0, PTE_PXN)
__pgprot_modify(prot, PTE_MAYBE_GP, PTE_PXN)
/*
* Mark the prot value as uncacheable and unbufferable.

2
arch/arm64/kernel/Makefile
View File

@ -29,9 +29,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
obj-$(CONFIG_COMPAT) += sys32.o signal32.o \
sys_compat.o
ifneq ($(CONFIG_COMPAT_VDSO), y)
obj-$(CONFIG_COMPAT) += sigreturn32.o
endif
obj-$(CONFIG_KUSER_HELPERS) += kuser32.o
obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
obj-$(CONFIG_MODULES) += module.o

2
arch/arm64/kernel/cpu_errata.c
View File

@ -460,6 +460,8 @@ static const struct midr_range arm64_ssb_cpus[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{},
};

2
arch/arm64/kernel/cpufeature.c
View File

@ -1290,6 +1290,8 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{ /* sentinel */ }
};
char const *str = "kpti command line option";

31
arch/arm64/kernel/fpsimd.c
View File

@ -12,6 +12,7 @@
#include <linux/bug.h>
#include <linux/cache.h>
#include <linux/compat.h>
#include <linux/compiler.h>
#include <linux/cpu.h>
#include <linux/cpu_pm.h>
#include <linux/kernel.h>
@ -119,10 +120,20 @@ struct fpsimd_last_state_struct {
static DEFINE_PER_CPU(struct fpsimd_last_state_struct, fpsimd_last_state);
/* Default VL for tasks that don't set it explicitly: */
static int sve_default_vl = -1;
static int __sve_default_vl = -1;
static int get_sve_default_vl(void)
{
return READ_ONCE(__sve_default_vl);
}
#ifdef CONFIG_ARM64_SVE
static void set_sve_default_vl(int val)
{
WRITE_ONCE(__sve_default_vl, val);
}
/* Maximum supported vector length across all CPUs (initially poisoned) */
int __ro_after_init sve_max_vl = SVE_VL_MIN;
int __ro_after_init sve_max_virtualisable_vl = SVE_VL_MIN;
@ -338,13 +349,13 @@ static unsigned int find_supported_vector_length(unsigned int vl)
return sve_vl_from_vq(__bit_to_vq(bit));
}
#ifdef CONFIG_SYSCTL
#if defined(CONFIG_ARM64_SVE) && defined(CONFIG_SYSCTL)
static int sve_proc_do_default_vl(struct ctl_table *table, int write,
void *buffer, size_t *lenp, loff_t *ppos)
{
int ret;
int vl = sve_default_vl;
int vl = get_sve_default_vl();
struct ctl_table tmp_table = {
.data = &vl,
.maxlen = sizeof(vl),
@ -361,7 +372,7 @@ static int sve_proc_do_default_vl(struct ctl_table *table, int write,
if (!sve_vl_valid(vl))
return -EINVAL;
sve_default_vl = find_supported_vector_length(vl);
set_sve_default_vl(find_supported_vector_length(vl));
return 0;
}
@ -383,9 +394,9 @@ static int __init sve_sysctl_init(void)
return 0;
}
#else /* ! CONFIG_SYSCTL */
#else /* ! (CONFIG_ARM64_SVE && CONFIG_SYSCTL) */
static int __init sve_sysctl_init(void) { return 0; }
#endif /* ! CONFIG_SYSCTL */
#endif /* ! (CONFIG_ARM64_SVE && CONFIG_SYSCTL) */
#define ZREG(sve_state, vq, n) ((char *)(sve_state) + \
(SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
@ -868,7 +879,7 @@ void __init sve_setup(void)
* For the default VL, pick the maximum supported value <= 64.
* VL == 64 is guaranteed not to grow the signal frame.
*/
sve_default_vl = find_supported_vector_length(64);
set_sve_default_vl(find_supported_vector_length(64));
bitmap_andnot(tmp_map, sve_vq_partial_map, sve_vq_map,
SVE_VQ_MAX);
@ -889,7 +900,7 @@ void __init sve_setup(void)
pr_info("SVE: maximum available vector length %u bytes per vector\n",
sve_max_vl);
pr_info("SVE: default vector length %u bytes per vector\n",
sve_default_vl);
get_sve_default_vl());
/* KVM decides whether to support mismatched systems. Just warn here: */
if (sve_max_virtualisable_vl < sve_max_vl)
@ -1029,13 +1040,13 @@ void fpsimd_flush_thread(void)
* vector length configured: no kernel task can become a user
* task without an exec and hence a call to this function.
* By the time the first call to this function is made, all
* early hardware probing is complete, so sve_default_vl
* early hardware probing is complete, so __sve_default_vl
* should be valid.
* If a bug causes this to go wrong, we make some noise and
* try to fudge thread.sve_vl to a safe value here.
*/
vl = current->thread.sve_vl_onexec ?
current->thread.sve_vl_onexec : sve_default_vl;
current->thread.sve_vl_onexec : get_sve_default_vl();
if (WARN_ON(!sve_vl_valid(vl)))
vl = SVE_VL_MIN;

44
arch/arm64/kernel/hw_breakpoint.c
View File

@ -730,6 +730,27 @@ static u64 get_distance_from_watchpoint(unsigned long addr, u64 val,
return 0;
}
static int watchpoint_report(struct perf_event *wp, unsigned long addr,
struct pt_regs *regs)
{
int step = is_default_overflow_handler(wp);
struct arch_hw_breakpoint *info = counter_arch_bp(wp);
info->trigger = addr;
/*
* If we triggered a user watchpoint from a uaccess routine, then
* handle the stepping ourselves since userspace really can't help
* us with this.
*/
if (!user_mode(regs) && info->ctrl.privilege == AARCH64_BREAKPOINT_EL0)
step = 1;
else
perf_bp_event(wp, regs);
return step;
}
static int watchpoint_handler(unsigned long addr, unsigned int esr,
struct pt_regs *regs)
{
@ -739,7 +760,6 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr,
u64 val;
struct perf_event *wp, **slots;
struct debug_info *debug_info;
struct arch_hw_breakpoint *info;
struct arch_hw_breakpoint_ctrl ctrl;
slots = this_cpu_ptr(wp_on_reg);
@ -777,25 +797,13 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr,
if (dist != 0)
continue;
info = counter_arch_bp(wp);
info->trigger = addr;
perf_bp_event(wp, regs);
/* Do we need to handle the stepping? */
if (is_default_overflow_handler(wp))
step = 1;
step = watchpoint_report(wp, addr, regs);
}
if (min_dist > 0 && min_dist != -1) {
/* No exact match found. */
wp = slots[closest_match];
info = counter_arch_bp(wp);
info->trigger = addr;
perf_bp_event(wp, regs);
/* Do we need to handle the stepping? */
if (is_default_overflow_handler(wp))
step = 1;
}
/* No exact match found? */
if (min_dist > 0 && min_dist != -1)
step = watchpoint_report(slots[closest_match], addr, regs);
rcu_read_unlock();
if (!step)

4
arch/arm64/kernel/insn.c
View File

@ -135,7 +135,7 @@ int __kprobes aarch64_insn_read(void *addr, u32 *insnp)
int ret;
__le32 val;
ret = probe_kernel_read(&val, addr, AARCH64_INSN_SIZE);
ret = copy_from_kernel_nofault(&val, addr, AARCH64_INSN_SIZE);
if (!ret)
*insnp = le32_to_cpu(val);
@ -151,7 +151,7 @@ static int __kprobes __aarch64_insn_write(void *addr, __le32 insn)
raw_spin_lock_irqsave(&patch_lock, flags);
waddr = patch_map(addr, FIX_TEXT_POKE0);
ret = probe_kernel_write(waddr, &insn, AARCH64_INSN_SIZE);
ret = copy_to_kernel_nofault(waddr, &insn, AARCH64_INSN_SIZE);
patch_unmap(FIX_TEXT_POKE0);
raw_spin_unlock_irqrestore(&patch_lock, flags);

3
arch/arm64/kernel/machine_kexec_file.c
View File

@ -219,8 +219,7 @@ static int prepare_elf_headers(void **addr, unsigned long *sz)
MEMBLOCK_NONE, &start, &end, NULL)
nr_ranges++;
cmem = kmalloc(sizeof(struct crash_mem) +
sizeof(struct crash_mem_range) * nr_ranges, GFP_KERNEL);
cmem = kmalloc(struct_size(cmem, ranges, nr_ranges), GFP_KERNEL);
if (!cmem)
return -ENOMEM;

25
arch/arm64/kernel/perf_regs.c
View File

@ -15,15 +15,34 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
return 0;
/*
* Compat (i.e. 32 bit) mode:
* - PC has been set in the pt_regs struct in kernel_entry,
* - Handle SP and LR here.
* Our handling of compat tasks (PERF_SAMPLE_REGS_ABI_32) is weird, but
* we're stuck with it for ABI compatability reasons.
*
* For a 32-bit consumer inspecting a 32-bit task, then it will look at
* the first 16 registers (see arch/arm/include/uapi/asm/perf_regs.h).
* These correspond directly to a prefix of the registers saved in our
* 'struct pt_regs', with the exception of the PC, so we copy that down
* (x15 corresponds to SP_hyp in the architecture).
*
* So far, so good.
*
* The oddity arises when a 64-bit consumer looks at a 32-bit task and
* asks for registers beyond PERF_REG_ARM_MAX. In this case, we return
* SP_usr, LR_usr and PC in the positions where the AArch64 SP, LR and
* PC registers would normally live. The initial idea was to allow a
* 64-bit unwinder to unwind a 32-bit task and, although it's not clear
* how well that works in practice, somebody might be relying on it.
*
* At the time we make a sample, we don't know whether the consumer is
* 32-bit or 64-bit, so we have to cater for both possibilities.
*/
if (compat_user_mode(regs)) {
if ((u32)idx == PERF_REG_ARM64_SP)
return regs->compat_sp;
if ((u32)idx == PERF_REG_ARM64_LR)
return regs->compat_lr;
if (idx == 15)
return regs->pc;
}
if ((u32)idx == PERF_REG_ARM64_SP)

12
arch/arm64/kernel/probes/kprobes.c
View File

@ -120,15 +120,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
void *alloc_insn_page(void)
{
void *page;
page = vmalloc_exec(PAGE_SIZE);
if (page) {
set_memory_ro((unsigned long)page, 1);
set_vm_flush_reset_perms(page);
}
return page;
return __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START, VMALLOC_END,
GFP_KERNEL, PAGE_KERNEL_ROX, VM_FLUSH_RESET_PERMS,
NUMA_NO_NODE, __func__);
}
/* arm kprobe: install breakpoint in text */

27
arch/arm64/kernel/signal32.c
View File

@ -342,38 +342,13 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
retcode = ptr_to_compat(ka->sa.sa_restorer);
} else {
/* Set up sigreturn pointer */
#ifdef CONFIG_COMPAT_VDSO
void *vdso_base = current->mm->context.vdso;
void *vdso_trampoline;
if (ka->sa.sa_flags & SA_SIGINFO) {
if (thumb) {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_rt_sigreturn_thumb);
} else {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_rt_sigreturn_arm);
}
} else {
if (thumb) {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_sigreturn_thumb);
} else {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_sigreturn_arm);
}
}
retcode = ptr_to_compat(vdso_trampoline) + thumb;
#else
unsigned int idx = thumb << 1;
if (ka->sa.sa_flags & SA_SIGINFO)
idx += 3;
retcode = (unsigned long)current->mm->context.vdso +
retcode = (unsigned long)current->mm->context.sigpage +
(idx << 2) + thumb;
#endif
}
regs->regs[0] = usig;

3
arch/arm64/kernel/traps.c
View File

@ -376,7 +376,7 @@ static int call_undef_hook(struct pt_regs *regs)
if (!user_mode(regs)) {
__le32 instr_le;
if (probe_kernel_address((__force __le32 *)pc, instr_le))
if (get_kernel_nofault(instr_le, (__force __le32 *)pc))
goto exit;
instr = le32_to_cpu(instr_le);
} else if (compat_thumb_mode(regs)) {
@ -813,6 +813,7 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
handler[reason], smp_processor_id(), esr,
esr_get_class_string(esr));
__show_regs(regs);
local_daif_mask();
panic("bad mode");
}

61
arch/arm64/kernel/vdso.c
View File

@ -191,15 +191,12 @@ enum aarch32_map {
#ifdef CONFIG_COMPAT_VDSO
AA32_MAP_VVAR,
AA32_MAP_VDSO,
#else
AA32_MAP_SIGPAGE
#endif
AA32_MAP_SIGPAGE
};
static struct page *aarch32_vectors_page __ro_after_init;
#ifndef CONFIG_COMPAT_VDSO
static struct page *aarch32_sig_page __ro_after_init;
#endif
static struct vm_special_mapping aarch32_vdso_maps[] = {
[AA32_MAP_VECTORS] = {
@ -214,12 +211,11 @@ static struct vm_special_mapping aarch32_vdso_maps[] = {
.name = "[vdso]",
.mremap = aarch32_vdso_mremap,
},
#else
#endif /* CONFIG_COMPAT_VDSO */
[AA32_MAP_SIGPAGE] = {
.name = "[sigpage]", /* ABI */
.pages = &aarch32_sig_page,
},
#endif /* CONFIG_COMPAT_VDSO */
};
static int aarch32_alloc_kuser_vdso_page(void)
@ -242,27 +238,11 @@ static int aarch32_alloc_kuser_vdso_page(void)
return 0;
}
#ifdef CONFIG_COMPAT_VDSO
static int __aarch32_alloc_vdso_pages(void)
{
int ret;
vdso_info[VDSO_ABI_AA32].dm = &aarch32_vdso_maps[AA32_MAP_VVAR];
vdso_info[VDSO_ABI_AA32].cm = &aarch32_vdso_maps[AA32_MAP_VDSO];
ret = __vdso_init(VDSO_ABI_AA32);
if (ret)
return ret;
return aarch32_alloc_kuser_vdso_page();
}
#else
static int __aarch32_alloc_vdso_pages(void)
static int aarch32_alloc_sigpage(void)
{
extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[];
int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start;
unsigned long sigpage;
int ret;
sigpage = get_zeroed_page(GFP_ATOMIC);
if (!sigpage)
@ -271,18 +251,34 @@ static int __aarch32_alloc_vdso_pages(void)
memcpy((void *)sigpage, __aarch32_sigret_code_start, sigret_sz);
aarch32_sig_page = virt_to_page(sigpage);
flush_dcache_page(aarch32_sig_page);
return 0;
}
ret = aarch32_alloc_kuser_vdso_page();
if (ret)
free_page(sigpage);
#ifdef CONFIG_COMPAT_VDSO
static int __aarch32_alloc_vdso_pages(void)
{
vdso_info[VDSO_ABI_AA32].dm = &aarch32_vdso_maps[AA32_MAP_VVAR];
vdso_info[VDSO_ABI_AA32].cm = &aarch32_vdso_maps[AA32_MAP_VDSO];
return ret;
return __vdso_init(VDSO_ABI_AA32);
}
#endif /* CONFIG_COMPAT_VDSO */
static int __init aarch32_alloc_vdso_pages(void)
{
return __aarch32_alloc_vdso_pages();
int ret;
#ifdef CONFIG_COMPAT_VDSO
ret = __aarch32_alloc_vdso_pages();
if (ret)
return ret;
#endif
ret = aarch32_alloc_sigpage();
if (ret)
return ret;
return aarch32_alloc_kuser_vdso_page();
}
arch_initcall(aarch32_alloc_vdso_pages);
@ -305,7 +301,6 @@ static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
return PTR_ERR_OR_ZERO(ret);
}
#ifndef CONFIG_COMPAT_VDSO
static int aarch32_sigreturn_setup(struct mm_struct *mm)
{
unsigned long addr;
@ -328,12 +323,11 @@ static int aarch32_sigreturn_setup(struct mm_struct *mm)
if (IS_ERR(ret))
goto out;
mm->context.vdso = (void *)addr;
mm->context.sigpage = (void *)addr;
out:
return PTR_ERR_OR_ZERO(ret);
}
#endif /* !CONFIG_COMPAT_VDSO */
int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
{
@ -352,10 +346,11 @@ int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
mm,
bprm,
uses_interp);
#else
ret = aarch32_sigreturn_setup(mm);
if (ret)
goto out;
#endif /* CONFIG_COMPAT_VDSO */
ret = aarch32_sigreturn_setup(mm);
out:
mmap_write_unlock(mm);
return ret;

7
arch/arm64/kernel/vdso/Makefile
View File

@ -23,13 +23,14 @@ btildflags-$(CONFIG_ARM64_BTI_KERNEL) += -z force-bti
# potential future proofing if we end up with internal calls to the exported
# routines, as x86 does (see 6f121e548f83 ("x86, vdso: Reimplement vdso.so
# preparation in build-time C")).
ldflags-y := -shared -nostdlib -soname=linux-vdso.so.1 --hash-style=sysv \
-Bsymbolic --eh-frame-hdr --build-id -n $(btildflags-y) -T
ldflags-y := -shared -nostdlib -soname=linux-vdso.so.1 --hash-style=sysv \
-Bsymbolic $(call ld-option, --no-eh-frame-hdr) --build-id -n \
$(btildflags-y) -T
ccflags-y := -fno-common -fno-builtin -fno-stack-protector -ffixed-x18
ccflags-y += -DDISABLE_BRANCH_PROFILING
CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS)
CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) $(GCC_PLUGINS_CFLAGS)
KBUILD_CFLAGS += $(DISABLE_LTO)
KASAN_SANITIZE := n
UBSAN_SANITIZE := n

54
arch/arm64/kernel/vdso/sigreturn.S
View File

@ -18,29 +18,40 @@
.text
/*
* NOTE!!! You may notice that all of the .cfi directives in this file have
* been commented out. This is because they have been shown to trigger segfaults
* in libgcc when unwinding out of a SIGCANCEL handler to invoke pthread
* cleanup handlers during the thread cancellation dance. By omitting the
* directives, we trigger an arm64-specific fallback path in the unwinder which
* recognises the signal frame and restores many of the registers directly from
* the sigcontext. Re-enabling the cfi directives here therefore needs to be
* much more comprehensive to reduce the risk of further regressions.
*/
/* Ensure that the mysterious NOP can be associated with a function. */
.cfi_startproc
// .cfi_startproc
/*
* .cfi_signal_frame causes the corresponding Frame Description Entry in the
* .eh_frame section to be annotated as a signal frame. This allows DWARF
* unwinders (e.g. libstdc++) to implement _Unwind_GetIPInfo(), which permits
* unwinding out of the signal trampoline without the need for the mysterious
* NOP.
* .cfi_signal_frame causes the corresponding Frame Description Entry (FDE) in
* the .eh_frame section to be annotated as a signal frame. This allows DWARF
* unwinders (e.g. libstdc++) to implement _Unwind_GetIPInfo() and identify
* the next frame using the unmodified return address instead of subtracting 1,
* which may yield the wrong FDE.
*/
.cfi_signal_frame
// .cfi_signal_frame
/*
* Tell the unwinder where to locate the frame record linking back to the
* interrupted context. We don't provide unwind info for registers other
* than the frame pointer and the link register here; in practice, this
* is sufficient for unwinding in C/C++ based runtimes and the values in
* the sigcontext may have been modified by this point anyway. Debuggers
* interrupted context. We don't provide unwind info for registers other than
* the frame pointer and the link register here; in practice, this is likely to
* be insufficient for unwinding in C/C++ based runtimes, especially without a
* means to restore the stack pointer. Thankfully, unwinders and debuggers
* already have baked-in strategies for attempting to unwind out of signals.
*/
.cfi_def_cfa x29, 0
.cfi_offset x29, 0 * 8
.cfi_offset x30, 1 * 8
// .cfi_def_cfa x29, 0
// .cfi_offset x29, 0 * 8
// .cfi_offset x30, 1 * 8
/*
* This mysterious NOP is required for some unwinders (e.g. libc++) that
@ -51,16 +62,19 @@
nop // Mysterious NOP
/*
* GDB relies on being able to identify the sigreturn instruction sequence to
* unwind from signal handlers. We cannot, therefore, use SYM_FUNC_START()
* here, as it will emit a BTI C instruction and break the unwinder. Thankfully,
* this function is only ever called from a RET and so omitting the landing pad
* is perfectly fine.
* GDB, libgcc and libunwind rely on being able to identify the sigreturn
* instruction sequence to unwind from signal handlers. We cannot, therefore,
* use SYM_FUNC_START() here, as it will emit a BTI C instruction and break the
* unwinder. Thankfully, this function is only ever called from a RET and so
* omitting the landing pad is perfectly fine.
*/
SYM_CODE_START(__kernel_rt_sigreturn)
// PLEASE DO NOT MODIFY
mov x8, #__NR_rt_sigreturn
// PLEASE DO NOT MODIFY
svc #0
.cfi_endproc
// PLEASE DO NOT MODIFY
// .cfi_endproc
SYM_CODE_END(__kernel_rt_sigreturn)
emit_aarch64_feature_1_and

1
arch/arm64/kernel/vdso32/Makefile
View File

@ -140,7 +140,6 @@ hostprogs := $(munge)
c-obj-vdso := note.o
c-obj-vdso-gettimeofday := vgettimeofday.o
asm-obj-vdso := sigreturn.o
ifneq ($(c-gettimeofday-y),)
VDSO_CFLAGS_gettimeofday_o += -include $(c-gettimeofday-y)

58
arch/arm64/kernel/vdso32/sigreturn.S
View File

@ -1,58 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* This file provides both A32 and T32 versions, in accordance with the
* arm sigreturn code.
*
* Please read the comments in arch/arm64/kernel/vdso/sigreturn.S to
* understand some of the craziness in here.
*
* Copyright (C) 2018 ARM Limited
*/
#include <linux/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/unistd.h>
.text
.arm
.fnstart
.save {r0-r15}
.pad #COMPAT_SIGFRAME_REGS_OFFSET
nop
SYM_CODE_START(__kernel_sigreturn_arm)
mov r7, #__NR_compat_sigreturn
svc #0
.fnend
SYM_CODE_END(__kernel_sigreturn_arm)
.fnstart
.save {r0-r15}
.pad #COMPAT_RT_SIGFRAME_REGS_OFFSET
nop
SYM_CODE_START(__kernel_rt_sigreturn_arm)
mov r7, #__NR_compat_rt_sigreturn
svc #0
.fnend
SYM_CODE_END(__kernel_rt_sigreturn_arm)
.thumb
.fnstart
.save {r0-r15}
.pad #COMPAT_SIGFRAME_REGS_OFFSET
nop
SYM_CODE_START(__kernel_sigreturn_thumb)
mov r7, #__NR_compat_sigreturn
svc #0
.fnend
SYM_CODE_END(__kernel_sigreturn_thumb)
.fnstart
.save {r0-r15}
.pad #COMPAT_RT_SIGFRAME_REGS_OFFSET
nop
SYM_CODE_START(__kernel_rt_sigreturn_thumb)
mov r7, #__NR_compat_rt_sigreturn
svc #0
.fnend
SYM_CODE_END(__kernel_rt_sigreturn_thumb)

12
arch/arm64/kernel/vdso32/vdso.lds.S
View File

@ -64,19 +64,7 @@ VERSION
__vdso_clock_gettime;
__vdso_gettimeofday;
__vdso_clock_getres;
__kernel_sigreturn_arm;
__kernel_sigreturn_thumb;
__kernel_rt_sigreturn_arm;
__kernel_rt_sigreturn_thumb;
__vdso_clock_gettime64;
local: *;
};
}
/*
* Make the sigreturn code visible to the kernel.
*/
VDSO_compat_sigreturn_arm = __kernel_sigreturn_arm;
VDSO_compat_sigreturn_thumb = __kernel_sigreturn_thumb;
VDSO_compat_rt_sigreturn_arm = __kernel_rt_sigreturn_arm;
VDSO_compat_rt_sigreturn_thumb = __kernel_rt_sigreturn_thumb;

15
arch/arm64/mm/init.c
View File

@ -404,11 +404,6 @@ void __init arm64_memblock_init(void)
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
dma_contiguous_reserve(arm64_dma32_phys_limit);
#ifdef CONFIG_ARM64_4K_PAGES
hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
#endif
}
void __init bootmem_init(void)
@ -424,6 +419,16 @@ void __init bootmem_init(void)
min_low_pfn = min;
arm64_numa_init();
/*
* must be done after arm64_numa_init() which calls numa_init() to
* initialize node_online_map that gets used in hugetlb_cma_reserve()
* while allocating required CMA size across online nodes.
*/
#ifdef CONFIG_ARM64_4K_PAGES
hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
#endif
/*
* Sparsemem tries to allocate bootmem in memory_present(), so must be
* done after the fixed reservations.

1
arch/arm64/mm/mmu.c
View File

@ -723,6 +723,7 @@ int kern_addr_valid(unsigned long addr)
pmd_t *pmdp, pmd;
pte_t *ptep, pte;
addr = arch_kasan_reset_tag(addr);
if ((((long)addr) >> VA_BITS) != -1UL)
return 0;

5
arch/csky/kernel/ftrace.c
View File

@ -72,7 +72,8 @@ static int ftrace_check_current_nop(unsigned long hook)
uint16_t olds[7];
unsigned long hook_pos = hook - 2;
if (probe_kernel_read((void *)olds, (void *)hook_pos, sizeof(nops)))
if (copy_from_kernel_nofault((void *)olds, (void *)hook_pos,
sizeof(nops)))
return -EFAULT;
if (memcmp((void *)nops, (void *)olds, sizeof(nops))) {
@ -97,7 +98,7 @@ static int ftrace_modify_code(unsigned long hook, unsigned long target,
make_jbsr(target, hook, call, nolr);
ret = probe_kernel_write((void *)hook_pos, enable ? call : nops,
ret = copy_to_kernel_nofault((void *)hook_pos, enable ? call : nops,
sizeof(nops));
if (ret)
return -EPERM;

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