pwm-sifive: add a driver for SiFive SoC PWM
Wesley W. Terpstra
Alistair Francis
parent
49580344e3
commit
376999e330
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@ -0,0 +1,28 @@
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SiFive PWM controller
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Unlike most other PWM controllers, the SiFive PWM controller currently only
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supports one period for all channels in the PWM. This is set globally in DTS.
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The period also has significant restrictions on the values it can achieve,
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which the driver rounds to the nearest achievable frequency.
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Required properties:
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- compatible: should be "sifive,pwm0"
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- reg: physical base address and length of the controller's registers
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- clocks: The frequency the controller runs at
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- #pwm-cells: Should be 2.
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The first cell is the PWM channel number
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The second cell is the PWM polarity
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- sifive,approx-period: the driver will get as close to this period as it can
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- interrupts: one interrupt per PWM channel (currently unused in the driver)
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Examples:
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pwm: pwm@10020000 {
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compatible = "sifive,pwm0";
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reg = <0x0 0x10020000 0x0 0x1000>;
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clocks = <&tlclk>;
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interrupt-parent = <&plic>;
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interrupts = <42 43 44 45>;
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#pwm-cells = <2>;
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sifive,approx-period = <1000000>;
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};
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@ -389,6 +389,16 @@ config PWM_SAMSUNG
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To compile this driver as a module, choose M here: the module
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will be called pwm-samsung.
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config PWM_SIFIVE
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tristate "SiFive PWM support"
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depends on OF
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depends on COMMON_CLK
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help
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Generic PWM framework driver for SiFive SoCs.
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To compile this driver as a module, choose M here: the module
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will be called pwm-sifive.
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config PWM_SPEAR
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tristate "STMicroelectronics SPEAr PWM support"
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depends on PLAT_SPEAR
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@ -38,6 +38,7 @@ obj-$(CONFIG_PWM_RCAR) += pwm-rcar.o
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obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o
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obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o
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obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
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obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o
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obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
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obj-$(CONFIG_PWM_STI) += pwm-sti.o
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obj-$(CONFIG_PWM_STM32) += pwm-stm32.o
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@ -0,0 +1,252 @@
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/*
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* Copyright (C) 2018 SiFive, Inc
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2, as published by
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* the Free Software Foundation.
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*/
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#include <dt-bindings/pwm/pwm.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#define MAX_PWM 4
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/* Register offsets */
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#define REG_PWMCFG 0x0
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#define REG_PWMCOUNT 0x8
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#define REG_PWMS 0x10
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#define REG_PWMCMP0 0x20
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/* PWMCFG fields */
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#define BIT_PWM_SCALE 0
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#define BIT_PWM_STICKY 8
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#define BIT_PWM_ZERO_ZMP 9
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#define BIT_PWM_DEGLITCH 10
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#define BIT_PWM_EN_ALWAYS 12
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#define BIT_PWM_EN_ONCE 13
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#define BIT_PWM0_CENTER 16
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#define BIT_PWM0_GANG 24
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#define BIT_PWM0_IP 28
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#define SIZE_PWMCMP 4
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#define MASK_PWM_SCALE 0xf
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struct sifive_pwm_device {
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struct pwm_chip chip;
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struct notifier_block notifier;
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struct clk *clk;
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void __iomem *regs;
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int irq;
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unsigned int approx_period;
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unsigned int real_period;
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};
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static inline struct sifive_pwm_device *chip_to_sifive(struct pwm_chip *c)
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{
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return container_of(c, struct sifive_pwm_device, chip);
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}
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static inline struct sifive_pwm_device *notifier_to_sifive(struct notifier_block *nb)
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{
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return container_of(nb, struct sifive_pwm_device, notifier);
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}
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static int sifive_pwm_apply(struct pwm_chip *chip, struct pwm_device *dev, struct pwm_state *state)
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{
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struct sifive_pwm_device *pwm = chip_to_sifive(chip);
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unsigned int duty_cycle;
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u32 frac;
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duty_cycle = state->duty_cycle;
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if (!state->enabled) duty_cycle = 0;
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if (state->polarity == PWM_POLARITY_NORMAL) duty_cycle = state->period - duty_cycle;
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frac = ((u64)duty_cycle << 16) / state->period;
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frac = min(frac, 0xFFFFU);
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iowrite32(frac, pwm->regs + REG_PWMCMP0 + (dev->hwpwm * SIZE_PWMCMP));
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if (state->enabled) {
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state->period = pwm->real_period;
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state->duty_cycle = ((u64)frac * pwm->real_period) >> 16;
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if (state->polarity == PWM_POLARITY_NORMAL)
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state->duty_cycle = state->period - state->duty_cycle;
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}
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return 0;
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}
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static void sifive_pwm_get_state(struct pwm_chip *chip, struct pwm_device *dev, struct pwm_state *state)
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{
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struct sifive_pwm_device *pwm = chip_to_sifive(chip);
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unsigned long duty;
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duty = ioread32(pwm->regs + REG_PWMCMP0 + (dev->hwpwm * SIZE_PWMCMP));
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state->period = pwm->real_period;
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state->duty_cycle = ((u64)duty * pwm->real_period) >> 16;
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state->polarity = PWM_POLARITY_INVERSED;
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state->enabled = duty > 0;
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}
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static const struct pwm_ops sifive_pwm_ops = {
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.get_state = sifive_pwm_get_state,
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.apply = sifive_pwm_apply,
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.owner = THIS_MODULE,
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};
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static struct pwm_device *sifive_pwm_xlate(struct pwm_chip *chip, const struct of_phandle_args *args)
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{
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struct sifive_pwm_device *pwm = chip_to_sifive(chip);
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struct pwm_device *dev;
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if (args->args[0] >= chip->npwm)
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return ERR_PTR(-EINVAL);
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dev = pwm_request_from_chip(chip, args->args[0], NULL);
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if (IS_ERR(dev))
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return dev;
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/* The period cannot be changed on a per-PWM basis */
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dev->args.period = pwm->real_period;
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dev->args.polarity = PWM_POLARITY_NORMAL;
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if (args->args[1] & PWM_POLARITY_INVERTED)
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dev->args.polarity = PWM_POLARITY_INVERSED;
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return dev;
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}
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static void sifive_pwm_update_clock(struct sifive_pwm_device *pwm, unsigned long rate)
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{
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/* (1 << (16+scale)) * 10^9/rate = real_period */
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unsigned long scalePow = (pwm->approx_period * (u64)rate) / 1000000000;
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int scale = ilog2(scalePow) - 16;
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scale = clamp(scale, 0, 0xf);
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iowrite32((1 << BIT_PWM_EN_ALWAYS) | (scale << BIT_PWM_SCALE), pwm->regs + REG_PWMCFG);
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pwm->real_period = (1000000000ULL << (16 + scale)) / rate;
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}
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static int sifive_pwm_clock_notifier(struct notifier_block *nb, unsigned long event, void *data)
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{
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struct clk_notifier_data *ndata = data;
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struct sifive_pwm_device *pwm = notifier_to_sifive(nb);
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if (event == POST_RATE_CHANGE)
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sifive_pwm_update_clock(pwm, ndata->new_rate);
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return NOTIFY_OK;
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}
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static int sifive_pwm_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = pdev->dev.of_node;
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struct sifive_pwm_device *pwm;
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struct pwm_chip *chip;
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struct resource *res;
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int ret;
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pwm = devm_kzalloc(dev, sizeof(*pwm), GFP_KERNEL);
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if (!pwm) {
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dev_err(dev, "Out of memory\n");
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return -ENOMEM;
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}
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chip = &pwm->chip;
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chip->dev = dev;
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chip->ops = &sifive_pwm_ops;
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chip->of_xlate = sifive_pwm_xlate;
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chip->of_pwm_n_cells = 2;
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chip->base = -1;
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ret = of_property_read_u32(node, "sifive,npwm", &chip->npwm);
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if (ret < 0 || chip->npwm > MAX_PWM) chip->npwm = MAX_PWM;
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ret = of_property_read_u32(node, "sifive,approx-period", &pwm->approx_period);
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if (ret < 0) {
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dev_err(dev, "Unable to read sifive,approx-period from DTS\n");
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return -ENOENT;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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pwm->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(pwm->regs)) {
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dev_err(dev, "Unable to map IO resources\n");
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return PTR_ERR(pwm->regs);
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}
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pwm->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(pwm->clk)) {
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dev_err(dev, "Unable to find controller clock\n");
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return PTR_ERR(pwm->clk);
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}
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pwm->irq = platform_get_irq(pdev, 0);
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if (pwm->irq < 0) {
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dev_err(dev, "Unable to find interrupt\n");
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return pwm->irq;
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}
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/* Watch for changes to underlying clock frequency */
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pwm->notifier.notifier_call = sifive_pwm_clock_notifier;
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clk_notifier_register(pwm->clk, &pwm->notifier);
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/* Initialize PWM config */
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sifive_pwm_update_clock(pwm, clk_get_rate(pwm->clk));
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/* No interrupt handler needed yet */
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/*
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ret = devm_request_irq(dev, pwm->irq, sifive_pwm_irq, 0, dev_name(dev), pwm);
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if (ret) {
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dev_err(dev, "Unable to bind interrupt\n");
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return ret;
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}
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*/
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ret = pwmchip_add(chip);
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if (ret < 0) {
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dev_err(dev, "cannot register PWM: %d\n", ret);
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clk_notifier_unregister(pwm->clk, &pwm->notifier);
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return ret;
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}
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platform_set_drvdata(pdev, pwm);
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dev_info(dev, "SiFive PWM chip registered %d PWMs\n", chip->npwm);
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return 0;
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}
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static int sifive_pwm_remove(struct platform_device *dev)
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{
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struct sifive_pwm_device *pwm = platform_get_drvdata(dev);
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struct pwm_chip *chip = &pwm->chip;
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clk_notifier_unregister(pwm->clk, &pwm->notifier);
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return pwmchip_remove(chip);
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}
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static const struct of_device_id sifive_pwm_of_match[] = {
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{ .compatible = "sifive,pwm0" },
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{},
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};
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MODULE_DEVICE_TABLE(of, sifive_pwm_of_match);
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static struct platform_driver sifive_pwm_driver = {
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.probe = sifive_pwm_probe,
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.remove = sifive_pwm_remove,
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.driver = {
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.name = "pwm-sifivem",
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.of_match_table = of_match_ptr(sifive_pwm_of_match),
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},
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};
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module_platform_driver(sifive_pwm_driver);
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MODULE_DESCRIPTION("SiFive PWM driver");
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MODULE_LICENSE("GPL v2");
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