dt-bindings: clock: Document S32V234 MC_CGM and MC_ME
Add DT bindings documentation for the upcoming S32V234 clk driver. Add s32v234-clock.h header, which is referred in MC_CGM documentation. Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>5.4-rM2-2.2.x-imx-squashed
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* NXP S32V234 Clock Generation Modules (MC_CGMs)
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The SoC supports four Clock Generation Modules, which provide registers for
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system and peripherals clock source selection and division. See chapters 22
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("Clocking"), 23 ("Clock Generation Module (MC_CGM)") and 69 ("Mode Entry
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Module (MC_ME)") in the reference manual[1].
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This binding uses the common clock binding:
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible:
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Should be:
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- "fsl,s32v234-mc_cgm0" for MC_CGM_0
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- "fsl,s32v234-mc_cgm1" for MC_CGM_1
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- "fsl,s32v234-mc_cgm2" for MC_CGM_2
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- "fsl,s32v234-mc_cgm3" for MC_CGM_3
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- reg:
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Location and length of the register set
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- #clock-cells (only for MC_CGM_0):
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Should be <1>. See dt-bindings/clock/s32v234-clock.h for the clock
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specifiers allowed in the clocks property of consumers.
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Example:
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clks: mc_cgm0@4003c000 {
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compatible = "fsl,s32v234-mc_cgm0";
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reg = <0x0 0x4003C000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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[1] https://www.nxp.com/webapp/Download?colCode=S32V234RM
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* NXP S32V234 Mode Entry Module (MC_ME)
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See chapters 22 ("Clocking") and 69 ("Mode Entry Module (MC_ME)") in the
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reference manual[1].
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Required properties:
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- compatible: Should be "fsl,s32v234-mc_me"
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- reg: Location and length of the register set
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Example:
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mc_me: mc_me@4004a000 {
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compatible = "fsl,s32v234-mc_me";
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reg = <0x0 0x4004A000 0x0 0x1000>;
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};
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[1] https://www.nxp.com/webapp/Download?colCode=S32V234RM
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
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* Copyright (C) 2017 NXP
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*/
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#ifndef __DT_BINDINGS_CLOCK_S32V234_H
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#define __DT_BINDINGS_CLOCK_S32V234_H
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#define S32V234_CLK_DUMMY 0
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#define S32V234_CLK_FXOSC 1
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#define S32V234_CLK_FIRC 2
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/* PERIPH PLL */
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#define S32V234_CLK_PERIPHPLL_SRC_SEL 3
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#define S32V234_CLK_PERIPHPLL_VCO 4
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#define S32V234_CLK_PERIPHPLL_PHI0 5
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#define S32V234_CLK_PERIPHPLL_PHI0_DIV3 6
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#define S32V234_CLK_PERIPHPLL_PHI0_DIV5 7
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#define S32V234_CLK_PERIPHPLL_PHI1 8
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#define S32V234_CLK_END 9
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#endif /* __DT_BINDINGS_CLOCK_S32V234_H */
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