MLK-24174-04 arm64: dts: imx8: standardize the tja110x phy address
Some tja1100 cards phy address is 0x2, some cards is 0x5. tja1101 cards phy address is 0x2. To make thing simple, and to support tja1100 and tja1101 cards by one dts file, we define the tja110x card phy address to 0x2 in default bsp. Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com>5.4-rM2-2.2.x-imx-squashed
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42c2c51e07
commit
48daa0ca63
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@ -24,9 +24,9 @@
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy2: ethernet-phy@5 {
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ethphy2: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <5>;
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reg = <2>;
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tja110x,refclk_in;
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};
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};
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@ -18,24 +18,24 @@
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* to board limitation.
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*/
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&fec1 {
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/* PHY address should rework to 2 */
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phy-handle = <ðphy2>;
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/* PHY address should rework to 3 */
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phy-handle = <ðphy3>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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ethphy2: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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reg = <2>;
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tja110x,refclk_in;
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/delete-property/ at803x,eee-disabled;
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/delete-property/ at803x,vddio-1p8v;
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};
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ethphy2: ethernet-phy@2 {
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ethphy3: ethernet-phy@3 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <2>;
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reg = <3>;
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at803x,eee-disabled;
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at803x,vddio-1p8v;
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};
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@ -50,7 +50,7 @@
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<&enet1_lpcg 0>,
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<&enet1_lpcg 1>;
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phy-mode = "rmii";
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phy-handle = <ðphy0>;
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phy-handle = <ðphy2>;
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/delete-property/ phy-supply;
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};
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@ -31,9 +31,9 @@
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy2: ethernet-phy@5 {
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ethphy2: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <5>;
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reg = <2>;
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tja110x,refclk_in;
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};
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};
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