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mvebu dt changes for v4.1 (part #3) 

These changes have no influence on the kernel behavior (except
 removing a warning message), but they allow to have a better
 representation of the hardware.
 
 - conform L2CC node with ePAPR specification by adding cache-level
 - remove cpuclk resources overlapping coredivclk registers on Armada XP
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Merge tag 'mvebu-dt-4.1-3' of git://git.infradead.org/linux-mvebu into next/dt

Merge "ARM: mvebu: dt changes for v4.1 (round 3)" from Gregory Clement:

mvebu dt changes for v4.1 (part #3)

These changes have no influence on the kernel behavior (except
removing a warning message), but they allow to have a better
representation of the hardware.

- conform L2CC node with ePAPR specification by adding cache-level
- remove cpuclk resources overlapping coredivclk registers on Armada XP

* tag 'mvebu-dt-4.1-3' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-level
  ARM: mvebu: clk: remove cpuclk resources overlapping coredivclk registers on Armada XP

Signed-off-by: Olof Johansson <olof@lixom.net>
hifive-unleashed-5.1
Olof Johansson 2015-04-03 14:54:13 -07:00
parent ccca5d7d08 292a3546b9
commit 4b3be93dd0
2 changed files with 3 additions and 1 deletions
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1
arch/arm/boot/dts/armada-370.dtsi
View File

@ -129,6 +129,7 @@
compatible = "marvell,aurora-outer-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
cache-level = <2>;
cache-unified;
wt-override;
};

3
arch/arm/boot/dts/armada-xp.dtsi
View File

@ -79,6 +79,7 @@
compatible = "marvell,aurora-system-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
cache-level = <2>;
cache-unified;
wt-override;
};
@ -150,7 +151,7 @@
cpuclk: clock-complex@18700 {
#clock-cells = <1>;
compatible = "marvell,armada-xp-cpu-clock";
reg = <0x18700 0xA0>, <0x1c054 0x10>;
reg = <0x18700 0x24>, <0x1c054 0x10>;
clocks = <&coreclk 1>;
};