riscv: Using CSR numbers to access CSRs
Since commit a3182c91ef
("RISC-V: Access CSRs using CSR numbers"),
we should prefer accessing CSRs using their CSR numbers, but there
are several leftovers like sstatus / sptbr we missed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
alistair/sunxi64-5.4-dsi
parent
015b269337
commit
4f3f900846
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@ -167,7 +167,7 @@ ENTRY(handle_exception)
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tail do_IRQ
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tail do_IRQ
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1:
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1:
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/* Exceptions run with interrupts enabled */
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/* Exceptions run with interrupts enabled */
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csrs sstatus, SR_SIE
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csrs CSR_SSTATUS, SR_SIE
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/* Handle syscalls */
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/* Handle syscalls */
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li t0, EXC_SYSCALL
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li t0, EXC_SYSCALL
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@ -222,7 +222,7 @@ ret_from_syscall:
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ret_from_exception:
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ret_from_exception:
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REG_L s0, PT_SSTATUS(sp)
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REG_L s0, PT_SSTATUS(sp)
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csrc sstatus, SR_SIE
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csrc CSR_SSTATUS, SR_SIE
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andi s0, s0, SR_SPP
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andi s0, s0, SR_SPP
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bnez s0, resume_kernel
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bnez s0, resume_kernel
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@ -265,7 +265,7 @@ work_pending:
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bnez s1, work_resched
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bnez s1, work_resched
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work_notifysig:
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work_notifysig:
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/* Handle pending signals and notify-resume requests */
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/* Handle pending signals and notify-resume requests */
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csrs sstatus, SR_SIE /* Enable interrupts for do_notify_resume() */
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csrs CSR_SSTATUS, SR_SIE /* Enable interrupts for do_notify_resume() */
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move a0, sp /* pt_regs */
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move a0, sp /* pt_regs */
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move a1, s0 /* current_thread_info->flags */
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move a1, s0 /* current_thread_info->flags */
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tail do_notify_resume
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tail do_notify_resume
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@ -23,7 +23,7 @@ ENTRY(__fstate_save)
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li a2, TASK_THREAD_F0
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li a2, TASK_THREAD_F0
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add a0, a0, a2
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add a0, a0, a2
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li t1, SR_FS
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li t1, SR_FS
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csrs sstatus, t1
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csrs CSR_SSTATUS, t1
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frcsr t0
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frcsr t0
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fsd f0, TASK_THREAD_F0_F0(a0)
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fsd f0, TASK_THREAD_F0_F0(a0)
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fsd f1, TASK_THREAD_F1_F0(a0)
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fsd f1, TASK_THREAD_F1_F0(a0)
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@ -58,7 +58,7 @@ ENTRY(__fstate_save)
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fsd f30, TASK_THREAD_F30_F0(a0)
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fsd f30, TASK_THREAD_F30_F0(a0)
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fsd f31, TASK_THREAD_F31_F0(a0)
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fsd f31, TASK_THREAD_F31_F0(a0)
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sw t0, TASK_THREAD_FCSR_F0(a0)
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sw t0, TASK_THREAD_FCSR_F0(a0)
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csrc sstatus, t1
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csrc CSR_SSTATUS, t1
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ret
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ret
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ENDPROC(__fstate_save)
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ENDPROC(__fstate_save)
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@ -67,7 +67,7 @@ ENTRY(__fstate_restore)
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add a0, a0, a2
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add a0, a0, a2
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li t1, SR_FS
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li t1, SR_FS
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lw t0, TASK_THREAD_FCSR_F0(a0)
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lw t0, TASK_THREAD_FCSR_F0(a0)
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csrs sstatus, t1
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csrs CSR_SSTATUS, t1
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fld f0, TASK_THREAD_F0_F0(a0)
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fld f0, TASK_THREAD_F0_F0(a0)
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fld f1, TASK_THREAD_F1_F0(a0)
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fld f1, TASK_THREAD_F1_F0(a0)
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fld f2, TASK_THREAD_F2_F0(a0)
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fld f2, TASK_THREAD_F2_F0(a0)
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@ -101,6 +101,6 @@ ENTRY(__fstate_restore)
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fld f30, TASK_THREAD_F30_F0(a0)
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fld f30, TASK_THREAD_F30_F0(a0)
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fld f31, TASK_THREAD_F31_F0(a0)
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fld f31, TASK_THREAD_F31_F0(a0)
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fscsr t0
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fscsr t0
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csrc sstatus, t1
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csrc CSR_SSTATUS, t1
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ret
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ret
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ENDPROC(__fstate_restore)
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ENDPROC(__fstate_restore)
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@ -61,7 +61,7 @@ _start_kernel:
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* floating point in kernel space
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* floating point in kernel space
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*/
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*/
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li t0, SR_FS
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li t0, SR_FS
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csrc sstatus, t0
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csrc CSR_SSTATUS, t0
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/* Pick one hart to run the main boot sequence */
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/* Pick one hart to run the main boot sequence */
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la a3, hart_lottery
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la a3, hart_lottery
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@ -18,7 +18,7 @@ ENTRY(__asm_copy_from_user)
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/* Enable access to user memory */
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/* Enable access to user memory */
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li t6, SR_SUM
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li t6, SR_SUM
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csrs sstatus, t6
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csrs CSR_SSTATUS, t6
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add a3, a1, a2
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add a3, a1, a2
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/* Use word-oriented copy only if low-order bits match */
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/* Use word-oriented copy only if low-order bits match */
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@ -47,7 +47,7 @@ ENTRY(__asm_copy_from_user)
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3:
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3:
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/* Disable access to user memory */
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/* Disable access to user memory */
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csrc sstatus, t6
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csrc CSR_SSTATUS, t6
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li a0, 0
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li a0, 0
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ret
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ret
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4: /* Edge case: unalignment */
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4: /* Edge case: unalignment */
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@ -72,7 +72,7 @@ ENTRY(__clear_user)
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/* Enable access to user memory */
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/* Enable access to user memory */
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li t6, SR_SUM
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li t6, SR_SUM
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csrs sstatus, t6
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csrs CSR_SSTATUS, t6
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add a3, a0, a1
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add a3, a0, a1
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addi t0, a0, SZREG-1
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addi t0, a0, SZREG-1
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@ -94,7 +94,7 @@ ENTRY(__clear_user)
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3:
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3:
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/* Disable access to user memory */
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/* Disable access to user memory */
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csrc sstatus, t6
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csrc CSR_SSTATUS, t6
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li a0, 0
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li a0, 0
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ret
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ret
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4: /* Edge case: unalignment */
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4: /* Edge case: unalignment */
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@ -114,11 +114,11 @@ ENDPROC(__clear_user)
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/* Fixup code for __copy_user(10) and __clear_user(11) */
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/* Fixup code for __copy_user(10) and __clear_user(11) */
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10:
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10:
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/* Disable access to user memory */
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/* Disable access to user memory */
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csrs sstatus, t6
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csrs CSR_SSTATUS, t6
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mv a0, a2
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mv a0, a2
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ret
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ret
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11:
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11:
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csrs sstatus, t6
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csrs CSR_SSTATUS, t6
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mv a0, a1
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mv a0, a1
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ret
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ret
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.previous
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.previous
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@ -57,12 +57,7 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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cpumask_clear_cpu(cpu, mm_cpumask(prev));
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cpumask_clear_cpu(cpu, mm_cpumask(prev));
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cpumask_set_cpu(cpu, mm_cpumask(next));
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cpumask_set_cpu(cpu, mm_cpumask(next));
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/*
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csr_write(CSR_SATP, virt_to_pfn(next->pgd) | SATP_MODE);
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* Use the old spbtr name instead of using the current satp
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* name to support binutils 2.29 which doesn't know about the
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* privileged ISA 1.10 yet.
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*/
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csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE);
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local_flush_tlb_all();
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local_flush_tlb_all();
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flush_icache_deferred(next);
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flush_icache_deferred(next);
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@ -435,7 +435,7 @@ static void __init setup_vm_final(void)
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clear_fixmap(FIX_PMD);
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clear_fixmap(FIX_PMD);
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/* Move to swapper page table */
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/* Move to swapper page table */
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csr_write(sptbr, PFN_DOWN(__pa(swapper_pg_dir)) | SATP_MODE);
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csr_write(CSR_SATP, PFN_DOWN(__pa(swapper_pg_dir)) | SATP_MODE);
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local_flush_tlb_all();
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local_flush_tlb_all();
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}
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}
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