Merge branch 'at91/cleanup5' into next/drivers
The at91 cleanups changed a lot of files, this merges in the latest cleanups to resolve the conflicts Conflicts: arch/arm/mach-at91/at91sam9260.c arch/arm/mach-at91/at91sam9261.c arch/arm/mach-at91/at91sam9263.c arch/arm/mach-at91/clock.c arch/arm/mach-at91/clock.h drivers/rtc/Kconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>hifive-unleashed-5.1
Arnd Bergmann
commit
5db4500257
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@ -861,6 +861,7 @@ W: http://maxim.org.za/at91_26.html
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W: http://www.linux4sam.org
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S: Supported
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F: arch/arm/mach-at91/
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F: include/soc/at91/
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F: arch/arm/boot/dts/at91*.dts
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F: arch/arm/boot/dts/at91*.dtsi
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F: arch/arm/boot/dts/sama*.dts
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@ -376,10 +376,11 @@ config ARCH_AT91
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select IRQ_DOMAIN
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select NEED_MACH_IO_H if PCCARD
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select PINCTRL
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select PINCTRL_AT91 if USE_OF
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select PINCTRL_AT91
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select USE_OF
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help
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This enables support for systems based on Atmel
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AT91RM9200 and AT91SAM9* processors.
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AT91RM9200, AT91SAM9 and SAMA5 processors.
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config ARCH_CLPS711X
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bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
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@ -1,161 +0,0 @@
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# CONFIG_LOCALVERSION_AUTO is not set
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# CONFIG_SWAP is not set
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CONFIG_SYSVIPC=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_USER_NS=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_MODULES=y
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CONFIG_MODULE_FORCE_LOAD=y
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CONFIG_MODULE_UNLOAD=y
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CONFIG_MODVERSIONS=y
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CONFIG_MODULE_SRCVERSION_ALL=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_AT91=y
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CONFIG_ARCH_AT91RM9200=y
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CONFIG_MACH_ONEARM=y
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CONFIG_MACH_AT91RM9200EK=y
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CONFIG_MACH_CSB337=y
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CONFIG_MACH_CSB637=y
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CONFIG_MACH_CARMEVA=y
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CONFIG_MACH_ATEB9200=y
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CONFIG_MACH_KB9200=y
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CONFIG_MACH_PICOTUX2XX=y
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CONFIG_MACH_KAFA=y
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CONFIG_MACH_ECBAT91=y
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CONFIG_MACH_YL9200=y
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CONFIG_MACH_CPUAT91=y
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CONFIG_MACH_ECO920=y
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CONFIG_MTD_AT91_DATAFLASH_CARD=y
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CONFIG_AT91_TIMER_HZ=100
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# CONFIG_ARM_THUMB is not set
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CONFIG_PCCARD=y
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CONFIG_AT91_CF=y
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CONFIG_AEABI=y
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# CONFIG_COMPACTION is not set
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CONFIG_ZBOOT_ROM_TEXT=0x10000000
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CONFIG_ZBOOT_ROM_BSS=0x20040000
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CONFIG_KEXEC=y
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CONFIG_AUTO_ZRELADDR=y
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CONFIG_FPE_NWFPE=y
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CONFIG_BINFMT_MISC=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_IP_MULTICAST=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
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# CONFIG_INET_XFRM_MODE_TUNNEL is not set
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# CONFIG_INET_XFRM_MODE_BEET is not set
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# CONFIG_INET_DIAG is not set
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CONFIG_IPV6=y
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CONFIG_IPV6_PRIVACY=y
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CONFIG_IPV6_ROUTER_PREF=y
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CONFIG_IPV6_ROUTE_INFO=y
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CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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# CONFIG_STANDALONE is not set
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# CONFIG_PREVENT_FIRMWARE_BUILD is not set
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CONFIG_MTD=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_CHAR=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_CFI=y
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CONFIG_MTD_JEDECPROBE=y
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CONFIG_MTD_CFI_INTELEXT=y
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CONFIG_MTD_CFI_AMDSTD=y
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CONFIG_MTD_COMPLEX_MAPPINGS=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_PLATRAM=y
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CONFIG_MTD_DATAFLASH=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_ATMEL=y
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CONFIG_MTD_NAND_PLATFORM=y
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_GLUEBI=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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CONFIG_BLK_DEV_RAM_SIZE=8192
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CONFIG_NETDEVICES=y
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CONFIG_MII=y
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CONFIG_ARM_AT91_ETHER=y
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CONFIG_DAVICOM_PHY=y
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CONFIG_SMSC_PHY=y
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CONFIG_MICREL_PHY=y
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# CONFIG_WLAN is not set
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# CONFIG_INPUT_MOUSEDEV is not set
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CONFIG_INPUT_EVDEV=y
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CONFIG_KEYBOARD_GPIO=y
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# CONFIG_INPUT_MOUSE is not set
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CONFIG_INPUT_TOUCHSCREEN=y
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# CONFIG_LEGACY_PTYS is not set
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CONFIG_SERIAL_ATMEL=y
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CONFIG_SERIAL_ATMEL_CONSOLE=y
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CONFIG_HW_RANDOM=y
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CONFIG_I2C=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_GPIO=y
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CONFIG_SPI=y
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CONFIG_SPI_ATMEL=y
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CONFIG_GPIO_SYSFS=y
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# CONFIG_HWMON is not set
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CONFIG_WATCHDOG=y
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CONFIG_WATCHDOG_NOWAYOUT=y
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CONFIG_AT91RM9200_WATCHDOG=y
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CONFIG_FB=y
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CONFIG_FB_MODE_HELPERS=y
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CONFIG_FB_TILEBLITTING=y
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CONFIG_FB_S1D13XXX=y
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CONFIG_BACKLIGHT_LCD_SUPPORT=y
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CONFIG_LCD_CLASS_DEVICE=y
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CONFIG_BACKLIGHT_CLASS_DEVICE=y
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# CONFIG_BACKLIGHT_GENERIC is not set
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CONFIG_FRAMEBUFFER_CONSOLE=y
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CONFIG_FONTS=y
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CONFIG_LOGO=y
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CONFIG_USB=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_AT91=y
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CONFIG_USB_G_SERIAL=y
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CONFIG_MMC=y
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CONFIG_MMC_ATMELMCI=y
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CONFIG_NEW_LEDS=y
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CONFIG_LEDS_CLASS=y
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CONFIG_LEDS_GPIO=y
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CONFIG_LEDS_TRIGGERS=y
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CONFIG_LEDS_TRIGGER_TIMER=y
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CONFIG_LEDS_TRIGGER_HEARTBEAT=y
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CONFIG_LEDS_TRIGGER_GPIO=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_AT91RM9200=y
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CONFIG_EXT4_FS=y
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CONFIG_AUTOFS4_FS=y
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CONFIG_VFAT_FS=y
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CONFIG_TMPFS=y
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CONFIG_UBIFS_FS=y
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CONFIG_UBIFS_FS_ADVANCED_COMPR=y
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CONFIG_NFS_FS=y
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CONFIG_ROOT_NFS=y
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CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_CODEPAGE_850=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_NLS_UTF8=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_FS=y
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CONFIG_DEBUG_KERNEL=y
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# CONFIG_FTRACE is not set
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CONFIG_DEBUG_USER=y
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CONFIG_DEBUG_LL=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_CRYPTO_PCBC=y
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CONFIG_CRYPTO_SHA1=y
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CONFIG_XZ_DEC_ARMTHUMB=y
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@ -1,145 +0,0 @@
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# CONFIG_LOCALVERSION_AUTO is not set
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# CONFIG_SWAP is not set
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||||
CONFIG_SYSVIPC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_EMBEDDED=y
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CONFIG_SLAB=y
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_AT91=y
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CONFIG_ARCH_AT91SAM9260=y
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CONFIG_MACH_AT91SAM9260EK=y
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CONFIG_MACH_CAM60=y
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CONFIG_MACH_SAM9_L9260=y
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CONFIG_MACH_AFEB9260=y
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CONFIG_MACH_CPU9260=y
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CONFIG_MACH_FLEXIBITY=y
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CONFIG_MACH_AT91SAM9G20EK=y
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CONFIG_MACH_AT91SAM9G20EK_2MMC=y
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CONFIG_MACH_CPU9G20=y
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CONFIG_MACH_ACMENETUSFOXG20=y
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CONFIG_MACH_PORTUXG20=y
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CONFIG_MACH_STAMP9G20=y
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CONFIG_MACH_PCONTROL_G20=y
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CONFIG_MACH_GSIA18S=y
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CONFIG_MACH_SNAPPER_9260=y
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CONFIG_MACH_AT91SAM9_DT=y
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CONFIG_AT91_SLOW_CLOCK=y
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# CONFIG_ARM_THUMB is not set
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CONFIG_AEABI=y
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CONFIG_ZBOOT_ROM_TEXT=0x0
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CONFIG_ZBOOT_ROM_BSS=0x0
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CONFIG_ARM_APPENDED_DTB=y
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CONFIG_ARM_ATAG_DTB_COMPAT=y
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CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
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CONFIG_AUTO_ZRELADDR=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
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# CONFIG_INET_XFRM_MODE_TUNNEL is not set
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# CONFIG_INET_XFRM_MODE_BEET is not set
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# CONFIG_INET_LRO is not set
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# CONFIG_IPV6 is not set
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CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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CONFIG_MTD=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_DATAFLASH=y
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CONFIG_MTD_NAND=y
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||||
CONFIG_MTD_NAND_ATMEL=y
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||||
CONFIG_MTD_UBI=y
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CONFIG_BLK_DEV_LOOP=y
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||||
CONFIG_BLK_DEV_RAM=y
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CONFIG_BLK_DEV_RAM_SIZE=8192
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CONFIG_EEPROM_AT25=y
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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# CONFIG_SCSI_LOWLEVEL is not set
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CONFIG_NETDEVICES=y
|
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CONFIG_MACB=y
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||||
# CONFIG_NET_VENDOR_BROADCOM is not set
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||||
# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
CONFIG_SMSC_PHY=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_SPI_SPIDEV=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_RESET=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_WATCHDOG_NOWAYOUT=y
|
||||
CONFIG_AT91SAM9X_WATCHDOG=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SEQUENCER=y
|
||||
CONFIG_SND_MIXER_OSS=y
|
||||
CONFIG_SND_PCM_OSS=y
|
||||
CONFIG_SND_SEQUENCER_OSS=y
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_MON=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_AT91=y
|
||||
CONFIG_USB_G_SERIAL=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ATMELMCI=y
|
||||
CONFIG_MMC_SPI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_RV3029C2=y
|
||||
CONFIG_RTC_DRV_AT91SAM9=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_AT91_ADC=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_ISO8859_15=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_FTRACE is not set
|
||||
CONFIG_DEBUG_LL=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
|
|
@ -1,147 +0,0 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_KERNEL_LZMA=y
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARCH_AT91=y
|
||||
CONFIG_ARCH_AT91SAM9261=y
|
||||
CONFIG_MACH_AT91SAM9261EK=y
|
||||
CONFIG_MACH_AT91SAM9G10EK=y
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_VFP=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_CFG80211=y
|
||||
CONFIG_MAC80211=y
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_GLUEBI=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_ATMEL_SSC=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_DM9000=y
|
||||
CONFIG_USB_ZD1201=m
|
||||
CONFIG_RTL8187=m
|
||||
CONFIG_LIBERTAS=m
|
||||
CONFIG_LIBERTAS_USB=m
|
||||
CONFIG_LIBERTAS_SDIO=m
|
||||
CONFIG_LIBERTAS_SPI=m
|
||||
CONFIG_RT2X00=m
|
||||
CONFIG_RT2500USB=m
|
||||
CONFIG_RT73USB=m
|
||||
CONFIG_ZD1211RW=m
|
||||
CONFIG_INPUT_POLLDEV=m
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ADS7846=y
|
||||
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_RESET=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_WATCHDOG_NOWAYOUT=y
|
||||
CONFIG_AT91SAM9X_WATCHDOG=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_ATMEL_LCDC=y
|
||||
# CONFIG_BACKLIGHT_GENERIC is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SEQUENCER=y
|
||||
CONFIG_SND_MIXER_OSS=y
|
||||
CONFIG_SND_PCM_OSS=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
# CONFIG_SND_ARM is not set
|
||||
CONFIG_SND_AT73C213=y
|
||||
CONFIG_SND_USB_AUDIO=m
|
||||
# CONFIG_USB_HID is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_AT91=y
|
||||
CONFIG_USB_G_SERIAL=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ATMELMCI=m
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_LEDS_TRIGGER_GPIO=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT91SAM9=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
|
||||
CONFIG_SQUASHFS=y
|
||||
CONFIG_SQUASHFS_LZO=y
|
||||
CONFIG_SQUASHFS_XZ=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_ISO8859_15=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_CRC_CCITT=m
|
||||
|
|
@ -1,151 +0,0 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARCH_AT91=y
|
||||
CONFIG_ARCH_AT91SAM9263=y
|
||||
CONFIG_MACH_AT91SAM9263EK=y
|
||||
CONFIG_MTD_AT91_DATAFLASH_CARD=y
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_ROUTE_VERBOSE=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_IP_PNP_RARP=y
|
||||
CONFIG_NET_IPIP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_IP_PIMSM_V2=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
CONFIG_IPV6=y
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_NFTL=y
|
||||
CONFIG_NFTL_RW=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_GLUEBI=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
CONFIG_ATMEL_TCLIB=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MACB=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
# CONFIG_WLAN is not set
|
||||
CONFIG_INPUT_POLLDEV=m
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ADS7846=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
CONFIG_SERIAL_ATMEL_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ATMEL=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_RESET=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_WATCHDOG_NOWAYOUT=y
|
||||
CONFIG_AT91SAM9X_WATCHDOG=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ATMEL=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SEQUENCER=y
|
||||
CONFIG_SND_MIXER_OSS=y
|
||||
CONFIG_SND_PCM_OSS=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
# CONFIG_SND_ARM is not set
|
||||
CONFIG_SND_ATMEL_AC97C=y
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_SND_USB_AUDIO=m
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_MON=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_ATMEL_USBA=y
|
||||
CONFIG_USB_G_SERIAL=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_SDIO_UART=m
|
||||
CONFIG_MMC_ATMELMCI=m
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_PWM=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AT91SAM9=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ATMEL=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_DEBUG_USER=y
|
||||
CONFIG_XZ_DEC=y
|
||||
CONFIG_FONTS=y
|
||||
|
|
@ -20,7 +20,6 @@ CONFIG_ARCH_AT91=y
|
|||
CONFIG_SOC_SAM_V7=y
|
||||
CONFIG_SOC_SAMA5D3=y
|
||||
CONFIG_SOC_SAMA5D4=y
|
||||
CONFIG_MACH_SAMA5_DT=y
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_UACCESS_WITH_MEMCPY=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
|
|
|
|||
|
|
@ -15,23 +15,10 @@ config HAVE_AT91_DBGU1
|
|||
config HAVE_AT91_DBGU2
|
||||
bool
|
||||
|
||||
config AT91_USE_OLD_CLK
|
||||
bool
|
||||
|
||||
config COMMON_CLK_AT91
|
||||
bool
|
||||
default USE_OF && !AT91_USE_OLD_CLK
|
||||
select COMMON_CLK
|
||||
|
||||
config OLD_CLK_AT91
|
||||
bool
|
||||
default AT91_USE_OLD_CLK
|
||||
|
||||
config OLD_IRQ_AT91
|
||||
bool
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SPARSE_IRQ
|
||||
|
||||
config HAVE_AT91_SMD
|
||||
bool
|
||||
|
||||
|
|
@ -40,20 +27,22 @@ config HAVE_AT91_H32MX
|
|||
|
||||
config SOC_AT91SAM9
|
||||
bool
|
||||
select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
|
||||
select ATMEL_AIC_IRQ
|
||||
select COMMON_CLK_AT91
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select MEMORY if USE_OF
|
||||
select ATMEL_SDRAMC if USE_OF
|
||||
select MEMORY
|
||||
select ATMEL_SDRAMC
|
||||
|
||||
config SOC_SAMA5
|
||||
bool
|
||||
select ATMEL_AIC5_IRQ
|
||||
select COMMON_CLK_AT91
|
||||
select CPU_V7
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select USE_OF
|
||||
select MEMORY
|
||||
select ATMEL_SDRAMC
|
||||
select PHYLIB if NETDEVICES
|
||||
|
||||
menu "Atmel AT91 System-on-Chip"
|
||||
|
||||
|
|
@ -108,7 +97,8 @@ endif
|
|||
if SOC_SAM_V4_V5
|
||||
config SOC_AT91RM9200
|
||||
bool "AT91RM9200"
|
||||
select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
|
||||
select ATMEL_AIC_IRQ
|
||||
select COMMON_CLK_AT91
|
||||
select CPU_ARM920T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_DBGU0
|
||||
|
|
@ -184,37 +174,11 @@ config SOC_AT91SAM9N12
|
|||
# ----------------------------------------------------------
|
||||
endif # SOC_SAM_V4_V5
|
||||
|
||||
|
||||
if SOC_SAM_V4_V5
|
||||
source arch/arm/mach-at91/Kconfig.non_dt
|
||||
endif
|
||||
|
||||
comment "Generic Board Type"
|
||||
|
||||
config MACH_AT91RM9200_DT
|
||||
bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
|
||||
depends on SOC_AT91RM9200
|
||||
select USE_OF
|
||||
help
|
||||
Select this if you want to experiment device-tree with
|
||||
an Atmel RM9200 Evaluation Kit.
|
||||
def_bool SOC_AT91RM9200
|
||||
|
||||
config MACH_AT91SAM9_DT
|
||||
bool "Atmel AT91SAM Evaluation Kits with device-tree support"
|
||||
depends on SOC_AT91SAM9
|
||||
select USE_OF
|
||||
help
|
||||
Select this if you want to experiment device-tree with
|
||||
an Atmel Evaluation Kit.
|
||||
|
||||
config MACH_SAMA5_DT
|
||||
bool "Atmel SAMA5 Evaluation Kits with device-tree support"
|
||||
depends on SOC_SAMA5
|
||||
select USE_OF
|
||||
select PHYLIB if NETDEVICES
|
||||
help
|
||||
Select this if you want to experiment device-tree with
|
||||
an Atmel Evaluation Kit.
|
||||
def_bool SOC_AT91SAM9
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
||||
|
|
@ -237,7 +201,7 @@ config AT91_TIMER_HZ
|
|||
int "Kernel HZ (jiffies per second)"
|
||||
range 32 1024
|
||||
depends on ARCH_AT91
|
||||
default "128" if ARCH_AT91RM9200
|
||||
default "128" if SOC_AT91RM9200
|
||||
default "100"
|
||||
help
|
||||
On AT91rm9200 chips where you're using a system clock derived
|
||||
|
|
|
|||
|
|
@ -1,286 +0,0 @@
|
|||
menu "Atmel Non-DT world"
|
||||
|
||||
config HAVE_AT91_DATAFLASH_CARD
|
||||
bool
|
||||
|
||||
choice
|
||||
prompt "Atmel AT91 Processor Devices for non DT boards"
|
||||
|
||||
config ARCH_AT91_NONE
|
||||
bool "None"
|
||||
|
||||
config ARCH_AT91RM9200
|
||||
bool "AT91RM9200"
|
||||
select SOC_AT91RM9200
|
||||
select AT91_USE_OLD_CLK
|
||||
select OLD_IRQ_AT91
|
||||
|
||||
config ARCH_AT91SAM9260
|
||||
bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
|
||||
select SOC_AT91SAM9260
|
||||
select AT91_USE_OLD_CLK
|
||||
select OLD_IRQ_AT91
|
||||
|
||||
config ARCH_AT91SAM9261
|
||||
bool "AT91SAM9261 or AT91SAM9G10"
|
||||
select SOC_AT91SAM9261
|
||||
select AT91_USE_OLD_CLK
|
||||
select OLD_IRQ_AT91
|
||||
|
||||
config ARCH_AT91SAM9263
|
||||
bool "AT91SAM9263"
|
||||
select SOC_AT91SAM9263
|
||||
select AT91_USE_OLD_CLK
|
||||
select OLD_IRQ_AT91
|
||||
|
||||
endchoice
|
||||
|
||||
config ARCH_AT91SAM9G20
|
||||
bool
|
||||
select ARCH_AT91SAM9260
|
||||
|
||||
config ARCH_AT91SAM9G10
|
||||
bool
|
||||
select ARCH_AT91SAM9261
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
||||
if ARCH_AT91RM9200
|
||||
|
||||
comment "AT91RM9200 Board Type"
|
||||
|
||||
config MACH_ONEARM
|
||||
bool "Ajeco 1ARM Single Board Computer"
|
||||
help
|
||||
Select this if you are using Ajeco's 1ARM Single Board Computer.
|
||||
<http://www.ajeco.fi/>
|
||||
|
||||
config MACH_AT91RM9200EK
|
||||
bool "Atmel AT91RM9200-EK Evaluation Kit"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
|
||||
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
|
||||
|
||||
config MACH_CSB337
|
||||
bool "Cogent CSB337"
|
||||
help
|
||||
Select this if you are using Cogent's CSB337 board.
|
||||
<http://www.cogcomp.com/csb_csb337.htm>
|
||||
|
||||
config MACH_CSB637
|
||||
bool "Cogent CSB637"
|
||||
help
|
||||
Select this if you are using Cogent's CSB637 board.
|
||||
<http://www.cogcomp.com/csb_csb637.htm>
|
||||
|
||||
config MACH_CARMEVA
|
||||
bool "Conitec ARM&EVA"
|
||||
help
|
||||
Select this if you are using Conitec's AT91RM9200-MCU-Module.
|
||||
<http://www.conitec.net/english/linuxboard.php>
|
||||
|
||||
config MACH_ATEB9200
|
||||
bool "Embest ATEB9200"
|
||||
help
|
||||
Select this if you are using Embest's ATEB9200 board.
|
||||
<http://www.embedinfo.com/english/product/ATEB9200.asp>
|
||||
|
||||
config MACH_KB9200
|
||||
bool "KwikByte KB920x"
|
||||
help
|
||||
Select this if you are using KwikByte's KB920x board.
|
||||
<http://www.kwikbyte.com/KB9202.html>
|
||||
|
||||
config MACH_PICOTUX2XX
|
||||
bool "picotux 200"
|
||||
help
|
||||
Select this if you are using a picotux 200.
|
||||
<http://www.picotux.com/>
|
||||
|
||||
config MACH_KAFA
|
||||
bool "Sperry-Sun KAFA board"
|
||||
help
|
||||
Select this if you are using Sperry-Sun's KAFA board.
|
||||
|
||||
config MACH_ECBAT91
|
||||
bool "emQbit ECB_AT91 SBC"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using emQbit's ECB_AT91 board.
|
||||
<http://wiki.emqbit.com/free-ecb-at91>
|
||||
|
||||
config MACH_YL9200
|
||||
bool "ucDragon YL-9200"
|
||||
help
|
||||
Select this if you are using the ucDragon YL-9200 board.
|
||||
|
||||
config MACH_CPUAT91
|
||||
bool "Eukrea CPUAT91"
|
||||
help
|
||||
Select this if you are using the Eukrea Electromatique's
|
||||
CPUAT91 board <http://www.eukrea.com/>.
|
||||
|
||||
config MACH_ECO920
|
||||
bool "eco920"
|
||||
help
|
||||
Select this if you are using the eco920 board
|
||||
endif
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
||||
if ARCH_AT91SAM9260
|
||||
|
||||
comment "AT91SAM9260 Variants"
|
||||
|
||||
comment "AT91SAM9260 / AT91SAM9XE Board Type"
|
||||
|
||||
config MACH_AT91SAM9260EK
|
||||
bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
|
||||
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
|
||||
|
||||
config MACH_CAM60
|
||||
bool "KwikByte KB9260 (CAM60) board"
|
||||
help
|
||||
Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
|
||||
<http://www.kwikbyte.com/KB9260.html>
|
||||
|
||||
config MACH_SAM9_L9260
|
||||
bool "Olimex SAM9-L9260 board"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
|
||||
<http://www.olimex.com/dev/sam9-L9260.html>
|
||||
|
||||
config MACH_AFEB9260
|
||||
bool "Custom afeb9260 board v1"
|
||||
help
|
||||
Select this if you are using custom afeb9260 board based on
|
||||
open hardware design. Select this for revision 1 of the board.
|
||||
<svn://194.85.238.22/home/users/george/svn/arm9eb>
|
||||
<http://groups.google.com/group/arm9fpga-evolution-board>
|
||||
|
||||
config MACH_CPU9260
|
||||
bool "Eukrea CPU9260 board"
|
||||
help
|
||||
Select this if you are using a Eukrea Electromatique's
|
||||
CPU9260 Board <http://www.eukrea.com/>
|
||||
|
||||
config MACH_FLEXIBITY
|
||||
bool "Flexibity Connect board"
|
||||
help
|
||||
Select this if you are using Flexibity Connect board
|
||||
<http://www.flexibity.com>
|
||||
|
||||
comment "AT91SAM9G20 Board Type"
|
||||
|
||||
config MACH_AT91SAM9G20EK
|
||||
bool "Atmel AT91SAM9G20-EK Evaluation Kit"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit
|
||||
that embeds only one SD/MMC slot.
|
||||
|
||||
config MACH_AT91SAM9G20EK_2MMC
|
||||
depends on MACH_AT91SAM9G20EK
|
||||
bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots"
|
||||
help
|
||||
Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
|
||||
with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
|
||||
onwards.
|
||||
<http://www.atmel.com/tools/SAM9G20-EK.aspx>
|
||||
|
||||
config MACH_CPU9G20
|
||||
bool "Eukrea CPU9G20 board"
|
||||
help
|
||||
Select this if you are using a Eukrea Electromatique's
|
||||
CPU9G20 Board <http://www.eukrea.com/>
|
||||
|
||||
config MACH_PORTUXG20
|
||||
bool "taskit PortuxG20"
|
||||
help
|
||||
Select this if you are using taskit's PortuxG20.
|
||||
<http://www.taskit.de/en/>
|
||||
|
||||
config MACH_STAMP9G20
|
||||
bool "taskit Stamp9G20 CPU module"
|
||||
help
|
||||
Select this if you are using taskit's Stamp9G20 CPU module on its
|
||||
evaluation board.
|
||||
<http://www.taskit.de/en/>
|
||||
|
||||
config MACH_PCONTROL_G20
|
||||
bool "PControl G20 CPU module"
|
||||
help
|
||||
Select this if you are using taskit's Stamp9G20 CPU module on this
|
||||
carrier board, being the decentralized unit of a building automation
|
||||
system; featuring nvram, eth-switch, iso-rs485, display, io
|
||||
|
||||
config MACH_GSIA18S
|
||||
bool "GS_IA18_S board"
|
||||
help
|
||||
This enables support for the GS_IA18_S board
|
||||
produced by GeoSIG Ltd company. This is an internet accelerograph.
|
||||
<http://www.geosig.com>
|
||||
|
||||
config MACH_SNAPPER_9260
|
||||
bool "Bluewater Systems Snapper 9260/9G20 module"
|
||||
help
|
||||
Select this if you are using the Bluewater Systems Snapper 9260 or
|
||||
Snapper 9G20 modules.
|
||||
<http://www.bluewatersys.com/>
|
||||
endif
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
||||
if ARCH_AT91SAM9261
|
||||
|
||||
comment "AT91SAM9261 Board Type"
|
||||
|
||||
config MACH_AT91SAM9261EK
|
||||
bool "Atmel AT91SAM9261-EK Evaluation Kit"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
|
||||
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
|
||||
|
||||
comment "AT91SAM9G10 Board Type"
|
||||
|
||||
config MACH_AT91SAM9G10EK
|
||||
bool "Atmel AT91SAM9G10-EK Evaluation Kit"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
|
||||
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
|
||||
|
||||
endif
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
||||
if ARCH_AT91SAM9263
|
||||
|
||||
comment "AT91SAM9263 Board Type"
|
||||
|
||||
config MACH_AT91SAM9263EK
|
||||
bool "Atmel AT91SAM9263-EK Evaluation Kit"
|
||||
select HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
|
||||
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
|
||||
|
||||
endif
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
||||
comment "AT91 Board Options"
|
||||
|
||||
config MTD_AT91_DATAFLASH_CARD
|
||||
bool "Enable DataFlash Card support"
|
||||
depends on HAVE_AT91_DATAFLASH_CARD
|
||||
help
|
||||
Enable support for the DataFlash card.
|
||||
|
||||
endmenu
|
||||
|
|
@ -2,10 +2,8 @@
|
|||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
obj-y := gpio.o setup.o sysirq_mask.o
|
||||
obj-y := setup.o sysirq_mask.o
|
||||
|
||||
obj-$(CONFIG_OLD_IRQ_AT91) += irq.o
|
||||
obj-$(CONFIG_OLD_CLK_AT91) += clock.o
|
||||
obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
|
||||
|
||||
# CPU-specific support
|
||||
|
|
@ -20,61 +18,12 @@ obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
|
|||
obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
|
||||
obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
|
||||
|
||||
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
|
||||
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
|
||||
|
||||
# AT91RM9200 board-specific support
|
||||
obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
|
||||
obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o
|
||||
obj-$(CONFIG_MACH_CSB337) += board-csb337.o
|
||||
obj-$(CONFIG_MACH_CSB637) += board-csb637.o
|
||||
obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o
|
||||
obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
|
||||
obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
|
||||
obj-$(CONFIG_MACH_KAFA) += board-kafa.o
|
||||
obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
|
||||
obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
|
||||
obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o
|
||||
obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o
|
||||
obj-$(CONFIG_MACH_ECO920) += board-eco920.o
|
||||
|
||||
# AT91SAM9260 board-specific support
|
||||
obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
|
||||
obj-$(CONFIG_MACH_CAM60) += board-cam60.o
|
||||
obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
|
||||
obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o
|
||||
obj-$(CONFIG_MACH_CPU9260) += board-cpu9krea.o
|
||||
obj-$(CONFIG_MACH_FLEXIBITY) += board-flexibity.o
|
||||
|
||||
# AT91SAM9261 board-specific support
|
||||
obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
|
||||
obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o
|
||||
|
||||
# AT91SAM9263 board-specific support
|
||||
obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
|
||||
|
||||
# AT91SAM9G20 board-specific support
|
||||
obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
|
||||
obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
|
||||
obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
|
||||
obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
|
||||
obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
|
||||
obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
|
||||
|
||||
# AT91SAM9260/AT91SAM9G20 board-specific support
|
||||
obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
|
||||
|
||||
# AT91SAM board with device-tree
|
||||
obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o
|
||||
obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o
|
||||
|
||||
# SAMA5 board with device-tree
|
||||
obj-$(CONFIG_MACH_SAMA5_DT) += board-dt-sama5.o
|
||||
|
||||
# Drivers
|
||||
obj-y += leds.o
|
||||
obj-$(CONFIG_SOC_SAMA5) += board-dt-sama5.o
|
||||
|
||||
# Power Management
|
||||
obj-$(CONFIG_PM) += pm.o
|
||||
|
|
|
|||
|
|
@ -3,12 +3,6 @@
|
|||
# PARAMS_PHYS must be within 4MB of ZRELADDR
|
||||
# INITRD_PHYS must be in RAM
|
||||
|
||||
ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
|
||||
zreladdr-y += 0x70008000
|
||||
params_phys-y := 0x70000100
|
||||
initrd_phys-y := 0x70410000
|
||||
else
|
||||
zreladdr-y += 0x20008000
|
||||
params_phys-y := 0x20000100
|
||||
initrd_phys-y := 0x20410000
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,99 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-at91/include/mach/at91_aic.h
|
||||
*
|
||||
* Copyright (C) 2005 Ivan Kokshaysky
|
||||
* Copyright (C) SAN People
|
||||
*
|
||||
* Advanced Interrupt Controller (AIC) - System peripherals registers.
|
||||
* Based on AT91RM9200 datasheet revision E.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef AT91_AIC_H
|
||||
#define AT91_AIC_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern void __iomem *at91_aic_base;
|
||||
|
||||
#define at91_aic_read(field) \
|
||||
__raw_readl(at91_aic_base + field)
|
||||
|
||||
#define at91_aic_write(field, value) \
|
||||
__raw_writel(value, at91_aic_base + field)
|
||||
#else
|
||||
.extern at91_aic_base
|
||||
#endif
|
||||
|
||||
/* Number of irq lines managed by AIC */
|
||||
#define NR_AIC_IRQS 32
|
||||
#define NR_AIC5_IRQS 128
|
||||
|
||||
#define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */
|
||||
#define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */
|
||||
|
||||
#define AT91_AIC_IRQ_MIN_PRIORITY 0
|
||||
#define AT91_AIC_IRQ_MAX_PRIORITY 7
|
||||
|
||||
#define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */
|
||||
#define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */
|
||||
#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */
|
||||
#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */
|
||||
#define AT91_AIC_SRCTYPE_LOW (0 << 5)
|
||||
#define AT91_AIC_SRCTYPE_FALLING (1 << 5)
|
||||
#define AT91_AIC_SRCTYPE_HIGH (2 << 5)
|
||||
#define AT91_AIC_SRCTYPE_RISING (3 << 5)
|
||||
|
||||
#define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */
|
||||
#define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */
|
||||
#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */
|
||||
#define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */
|
||||
#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */
|
||||
#define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */
|
||||
#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */
|
||||
#define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */
|
||||
#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */
|
||||
|
||||
#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */
|
||||
#define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */
|
||||
#define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */
|
||||
#define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */
|
||||
#define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */
|
||||
#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */
|
||||
#define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */
|
||||
#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */
|
||||
#define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */
|
||||
#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */
|
||||
#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */
|
||||
|
||||
#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */
|
||||
#define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */
|
||||
#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */
|
||||
#define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */
|
||||
#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */
|
||||
#define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */
|
||||
#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */
|
||||
#define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */
|
||||
#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */
|
||||
#define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */
|
||||
#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */
|
||||
#define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */
|
||||
#define AT91_AIC_DCR 0x138 /* Debug Control Register */
|
||||
#define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */
|
||||
#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */
|
||||
#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */
|
||||
|
||||
#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */
|
||||
#define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */
|
||||
#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */
|
||||
#define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */
|
||||
#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */
|
||||
#define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */
|
||||
|
||||
void at91_aic_handle_irq(struct pt_regs *regs);
|
||||
void at91_aic5_handle_irq(struct pt_regs *regs);
|
||||
|
||||
#endif
|
||||
|
|
@ -1,146 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-at91/include/mach/at91_tc.h
|
||||
*
|
||||
* Copyright (C) SAN People
|
||||
*
|
||||
* Timer/Counter Unit (TC) registers.
|
||||
* Based on AT91RM9200 datasheet revision E.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef AT91_TC_H
|
||||
#define AT91_TC_H
|
||||
|
||||
#define AT91_TC_BCR 0xc0 /* TC Block Control Register */
|
||||
#define AT91_TC_SYNC (1 << 0) /* Synchro Command */
|
||||
|
||||
#define AT91_TC_BMR 0xc4 /* TC Block Mode Register */
|
||||
#define AT91_TC_TC0XC0S (3 << 0) /* External Clock Signal 0 Selection */
|
||||
#define AT91_TC_TC0XC0S_TCLK0 (0 << 0)
|
||||
#define AT91_TC_TC0XC0S_NONE (1 << 0)
|
||||
#define AT91_TC_TC0XC0S_TIOA1 (2 << 0)
|
||||
#define AT91_TC_TC0XC0S_TIOA2 (3 << 0)
|
||||
#define AT91_TC_TC1XC1S (3 << 2) /* External Clock Signal 1 Selection */
|
||||
#define AT91_TC_TC1XC1S_TCLK1 (0 << 2)
|
||||
#define AT91_TC_TC1XC1S_NONE (1 << 2)
|
||||
#define AT91_TC_TC1XC1S_TIOA0 (2 << 2)
|
||||
#define AT91_TC_TC1XC1S_TIOA2 (3 << 2)
|
||||
#define AT91_TC_TC2XC2S (3 << 4) /* External Clock Signal 2 Selection */
|
||||
#define AT91_TC_TC2XC2S_TCLK2 (0 << 4)
|
||||
#define AT91_TC_TC2XC2S_NONE (1 << 4)
|
||||
#define AT91_TC_TC2XC2S_TIOA0 (2 << 4)
|
||||
#define AT91_TC_TC2XC2S_TIOA1 (3 << 4)
|
||||
|
||||
|
||||
#define AT91_TC_CCR 0x00 /* Channel Control Register */
|
||||
#define AT91_TC_CLKEN (1 << 0) /* Counter Clock Enable Command */
|
||||
#define AT91_TC_CLKDIS (1 << 1) /* Counter CLock Disable Command */
|
||||
#define AT91_TC_SWTRG (1 << 2) /* Software Trigger Command */
|
||||
|
||||
#define AT91_TC_CMR 0x04 /* Channel Mode Register */
|
||||
#define AT91_TC_TCCLKS (7 << 0) /* Capture/Waveform Mode: Clock Selection */
|
||||
#define AT91_TC_TIMER_CLOCK1 (0 << 0)
|
||||
#define AT91_TC_TIMER_CLOCK2 (1 << 0)
|
||||
#define AT91_TC_TIMER_CLOCK3 (2 << 0)
|
||||
#define AT91_TC_TIMER_CLOCK4 (3 << 0)
|
||||
#define AT91_TC_TIMER_CLOCK5 (4 << 0)
|
||||
#define AT91_TC_XC0 (5 << 0)
|
||||
#define AT91_TC_XC1 (6 << 0)
|
||||
#define AT91_TC_XC2 (7 << 0)
|
||||
#define AT91_TC_CLKI (1 << 3) /* Capture/Waveform Mode: Clock Invert */
|
||||
#define AT91_TC_BURST (3 << 4) /* Capture/Waveform Mode: Burst Signal Selection */
|
||||
#define AT91_TC_LDBSTOP (1 << 6) /* Capture Mode: Counter Clock Stopped with TB Loading */
|
||||
#define AT91_TC_LDBDIS (1 << 7) /* Capture Mode: Counter Clock Disable with RB Loading */
|
||||
#define AT91_TC_ETRGEDG (3 << 8) /* Capture Mode: External Trigger Edge Selection */
|
||||
#define AT91_TC_ABETRG (1 << 10) /* Capture Mode: TIOA or TIOB External Trigger Selection */
|
||||
#define AT91_TC_CPCTRG (1 << 14) /* Capture Mode: RC Compare Trigger Enable */
|
||||
#define AT91_TC_WAVE (1 << 15) /* Capture/Waveform mode */
|
||||
#define AT91_TC_LDRA (3 << 16) /* Capture Mode: RA Loading Selection */
|
||||
#define AT91_TC_LDRB (3 << 18) /* Capture Mode: RB Loading Selection */
|
||||
|
||||
#define AT91_TC_CPCSTOP (1 << 6) /* Waveform Mode: Counter Clock Stopped with RC Compare */
|
||||
#define AT91_TC_CPCDIS (1 << 7) /* Waveform Mode: Counter Clock Disable with RC Compare */
|
||||
#define AT91_TC_EEVTEDG (3 << 8) /* Waveform Mode: External Event Edge Selection */
|
||||
#define AT91_TC_EEVTEDG_NONE (0 << 8)
|
||||
#define AT91_TC_EEVTEDG_RISING (1 << 8)
|
||||
#define AT91_TC_EEVTEDG_FALLING (2 << 8)
|
||||
#define AT91_TC_EEVTEDG_BOTH (3 << 8)
|
||||
#define AT91_TC_EEVT (3 << 10) /* Waveform Mode: External Event Selection */
|
||||
#define AT91_TC_EEVT_TIOB (0 << 10)
|
||||
#define AT91_TC_EEVT_XC0 (1 << 10)
|
||||
#define AT91_TC_EEVT_XC1 (2 << 10)
|
||||
#define AT91_TC_EEVT_XC2 (3 << 10)
|
||||
#define AT91_TC_ENETRG (1 << 12) /* Waveform Mode: External Event Trigger Enable */
|
||||
#define AT91_TC_WAVESEL (3 << 13) /* Waveform Mode: Waveform Selection */
|
||||
#define AT91_TC_WAVESEL_UP (0 << 13)
|
||||
#define AT91_TC_WAVESEL_UP_AUTO (2 << 13)
|
||||
#define AT91_TC_WAVESEL_UPDOWN (1 << 13)
|
||||
#define AT91_TC_WAVESEL_UPDOWN_AUTO (3 << 13)
|
||||
#define AT91_TC_ACPA (3 << 16) /* Waveform Mode: RA Compare Effect on TIOA */
|
||||
#define AT91_TC_ACPA_NONE (0 << 16)
|
||||
#define AT91_TC_ACPA_SET (1 << 16)
|
||||
#define AT91_TC_ACPA_CLEAR (2 << 16)
|
||||
#define AT91_TC_ACPA_TOGGLE (3 << 16)
|
||||
#define AT91_TC_ACPC (3 << 18) /* Waveform Mode: RC Compre Effect on TIOA */
|
||||
#define AT91_TC_ACPC_NONE (0 << 18)
|
||||
#define AT91_TC_ACPC_SET (1 << 18)
|
||||
#define AT91_TC_ACPC_CLEAR (2 << 18)
|
||||
#define AT91_TC_ACPC_TOGGLE (3 << 18)
|
||||
#define AT91_TC_AEEVT (3 << 20) /* Waveform Mode: External Event Effect on TIOA */
|
||||
#define AT91_TC_AEEVT_NONE (0 << 20)
|
||||
#define AT91_TC_AEEVT_SET (1 << 20)
|
||||
#define AT91_TC_AEEVT_CLEAR (2 << 20)
|
||||
#define AT91_TC_AEEVT_TOGGLE (3 << 20)
|
||||
#define AT91_TC_ASWTRG (3 << 22) /* Waveform Mode: Software Trigger Effect on TIOA */
|
||||
#define AT91_TC_ASWTRG_NONE (0 << 22)
|
||||
#define AT91_TC_ASWTRG_SET (1 << 22)
|
||||
#define AT91_TC_ASWTRG_CLEAR (2 << 22)
|
||||
#define AT91_TC_ASWTRG_TOGGLE (3 << 22)
|
||||
#define AT91_TC_BCPB (3 << 24) /* Waveform Mode: RB Compare Effect on TIOB */
|
||||
#define AT91_TC_BCPB_NONE (0 << 24)
|
||||
#define AT91_TC_BCPB_SET (1 << 24)
|
||||
#define AT91_TC_BCPB_CLEAR (2 << 24)
|
||||
#define AT91_TC_BCPB_TOGGLE (3 << 24)
|
||||
#define AT91_TC_BCPC (3 << 26) /* Waveform Mode: RC Compare Effect on TIOB */
|
||||
#define AT91_TC_BCPC_NONE (0 << 26)
|
||||
#define AT91_TC_BCPC_SET (1 << 26)
|
||||
#define AT91_TC_BCPC_CLEAR (2 << 26)
|
||||
#define AT91_TC_BCPC_TOGGLE (3 << 26)
|
||||
#define AT91_TC_BEEVT (3 << 28) /* Waveform Mode: External Event Effect on TIOB */
|
||||
#define AT91_TC_BEEVT_NONE (0 << 28)
|
||||
#define AT91_TC_BEEVT_SET (1 << 28)
|
||||
#define AT91_TC_BEEVT_CLEAR (2 << 28)
|
||||
#define AT91_TC_BEEVT_TOGGLE (3 << 28)
|
||||
#define AT91_TC_BSWTRG (3 << 30) /* Waveform Mode: Software Trigger Effect on TIOB */
|
||||
#define AT91_TC_BSWTRG_NONE (0 << 30)
|
||||
#define AT91_TC_BSWTRG_SET (1 << 30)
|
||||
#define AT91_TC_BSWTRG_CLEAR (2 << 30)
|
||||
#define AT91_TC_BSWTRG_TOGGLE (3 << 30)
|
||||
|
||||
#define AT91_TC_CV 0x10 /* Counter Value */
|
||||
#define AT91_TC_RA 0x14 /* Register A */
|
||||
#define AT91_TC_RB 0x18 /* Register B */
|
||||
#define AT91_TC_RC 0x1c /* Register C */
|
||||
|
||||
#define AT91_TC_SR 0x20 /* Status Register */
|
||||
#define AT91_TC_COVFS (1 << 0) /* Counter Overflow Status */
|
||||
#define AT91_TC_LOVRS (1 << 1) /* Load Overrun Status */
|
||||
#define AT91_TC_CPAS (1 << 2) /* RA Compare Status */
|
||||
#define AT91_TC_CPBS (1 << 3) /* RB Compare Status */
|
||||
#define AT91_TC_CPCS (1 << 4) /* RC Compare Status */
|
||||
#define AT91_TC_LDRAS (1 << 5) /* RA Loading Status */
|
||||
#define AT91_TC_LDRBS (1 << 6) /* RB Loading Status */
|
||||
#define AT91_TC_ETRGS (1 << 7) /* External Trigger Status */
|
||||
#define AT91_TC_CLKSTA (1 << 16) /* Clock Enabling Status */
|
||||
#define AT91_TC_MTIOA (1 << 17) /* TIOA Mirror */
|
||||
#define AT91_TC_MTIOB (1 << 18) /* TIOB Mirror */
|
||||
|
||||
#define AT91_TC_IER 0x24 /* Interrupt Enable Register */
|
||||
#define AT91_TC_IDR 0x28 /* Interrupt Disable Register */
|
||||
#define AT91_TC_IMR 0x2c /* Interrupt Mask Register */
|
||||
|
||||
#endif
|
||||
|
|
@ -11,296 +11,15 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/system_misc.h>
|
||||
#include <mach/at91rm9200.h>
|
||||
#include <mach/at91_st.h>
|
||||
#include <mach/cpu.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "pm.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
*/
|
||||
static struct clk udc_clk = {
|
||||
.name = "udc_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_UDP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ohci_clk = {
|
||||
.name = "ohci_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_UHP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ether_clk = {
|
||||
.name = "ether_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_EMAC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc_clk = {
|
||||
.name = "mci_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_MCI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi_clk = {
|
||||
.name = "twi_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TWI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart3_clk = {
|
||||
.name = "usart3_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_US3,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi_clk = {
|
||||
.name = "spi_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_SPI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioA_clk = {
|
||||
.name = "pioA_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOA,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioB_clk = {
|
||||
.name = "pioB_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioC_clk = {
|
||||
.name = "pioC_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioD_clk = {
|
||||
.name = "pioD_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_PIOD,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc0_clk = {
|
||||
.name = "ssc0_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_SSC0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc1_clk = {
|
||||
.name = "ssc1_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_SSC1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc2_clk = {
|
||||
.name = "ssc2_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_SSC2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc0_clk = {
|
||||
.name = "tc0_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TC0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc1_clk = {
|
||||
.name = "tc1_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TC1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc2_clk = {
|
||||
.name = "tc2_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TC2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc3_clk = {
|
||||
.name = "tc3_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TC3,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc4_clk = {
|
||||
.name = "tc4_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TC4,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc5_clk = {
|
||||
.name = "tc5_clk",
|
||||
.pmc_mask = 1 << AT91RM9200_ID_TC5,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
static struct clk *periph_clocks[] __initdata = {
|
||||
&pioA_clk,
|
||||
&pioB_clk,
|
||||
&pioC_clk,
|
||||
&pioD_clk,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&usart3_clk,
|
||||
&mmc_clk,
|
||||
&udc_clk,
|
||||
&twi_clk,
|
||||
&spi_clk,
|
||||
&ssc0_clk,
|
||||
&ssc1_clk,
|
||||
&ssc2_clk,
|
||||
&tc0_clk,
|
||||
&tc1_clk,
|
||||
&tc2_clk,
|
||||
&tc3_clk,
|
||||
&tc4_clk,
|
||||
&tc5_clk,
|
||||
&ohci_clk,
|
||||
ðer_clk,
|
||||
// irq0 .. irq6
|
||||
};
|
||||
|
||||
static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fffd0000.ssc", &ssc0_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fffd4000.ssc", &ssc1_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fffd8000.ssc", &ssc2_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200.0", &twi_clk),
|
||||
/* fake hclk clock */
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||
CLKDEV_CON_ID("pioC", &pioC_clk),
|
||||
CLKDEV_CON_ID("pioD", &pioD_clk),
|
||||
/* usart lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffc0000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffc4000.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffc8000.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffcc000.serial", &usart3_clk),
|
||||
/* tc lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffb4000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID("emac_clk", "fffbc000.ethernet", ðer_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffb8000.i2c", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
* The four programmable clocks.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 1,
|
||||
};
|
||||
static struct clk pck2 = {
|
||||
.name = "pck2",
|
||||
.pmc_mask = AT91_PMC_PCK2,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 2,
|
||||
};
|
||||
static struct clk pck3 = {
|
||||
.name = "pck3",
|
||||
.pmc_mask = AT91_PMC_PCK3,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 3,
|
||||
};
|
||||
|
||||
static void __init at91rm9200_register_clocks(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
||||
clk_register(periph_clocks[i]);
|
||||
|
||||
clkdev_add_table(periph_clocks_lookups,
|
||||
ARRAY_SIZE(periph_clocks_lookups));
|
||||
clkdev_add_table(usart_clocks_lookups,
|
||||
ARRAY_SIZE(usart_clocks_lookups));
|
||||
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
clk_register(&pck2);
|
||||
clk_register(&pck3);
|
||||
}
|
||||
#else
|
||||
#define at91rm9200_register_clocks NULL
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
|
||||
{
|
||||
.id = AT91RM9200_ID_PIOA,
|
||||
.regbase = AT91RM9200_BASE_PIOA,
|
||||
}, {
|
||||
.id = AT91RM9200_ID_PIOB,
|
||||
.regbase = AT91RM9200_BASE_PIOB,
|
||||
}, {
|
||||
.id = AT91RM9200_ID_PIOC,
|
||||
.regbase = AT91RM9200_BASE_PIOC,
|
||||
}, {
|
||||
.id = AT91RM9200_ID_PIOD,
|
||||
.regbase = AT91RM9200_BASE_PIOD,
|
||||
}
|
||||
};
|
||||
|
||||
static void at91rm9200_idle(void)
|
||||
{
|
||||
|
|
@ -329,74 +48,14 @@ static void __init at91rm9200_map_io(void)
|
|||
at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);
|
||||
}
|
||||
|
||||
static void __init at91rm9200_ioremap_registers(void)
|
||||
{
|
||||
at91rm9200_ioremap_st(AT91RM9200_BASE_ST);
|
||||
at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256);
|
||||
at91_pm_set_standby(at91rm9200_standby);
|
||||
}
|
||||
|
||||
static void __init at91rm9200_initialize(void)
|
||||
{
|
||||
arm_pm_idle = at91rm9200_idle;
|
||||
arm_pm_restart = at91rm9200_restart;
|
||||
|
||||
/* Initialize GPIO subsystem */
|
||||
at91_gpio_init(at91rm9200_gpio,
|
||||
cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
|
||||
}
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Interrupt initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
||||
*/
|
||||
static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
||||
7, /* Advanced Interrupt Controller (FIQ) */
|
||||
7, /* System Peripherals */
|
||||
1, /* Parallel IO Controller A */
|
||||
1, /* Parallel IO Controller B */
|
||||
1, /* Parallel IO Controller C */
|
||||
1, /* Parallel IO Controller D */
|
||||
5, /* USART 0 */
|
||||
5, /* USART 1 */
|
||||
5, /* USART 2 */
|
||||
5, /* USART 3 */
|
||||
0, /* Multimedia Card Interface */
|
||||
2, /* USB Device Port */
|
||||
6, /* Two-Wire Interface */
|
||||
5, /* Serial Peripheral Interface */
|
||||
4, /* Serial Synchronous Controller 0 */
|
||||
4, /* Serial Synchronous Controller 1 */
|
||||
4, /* Serial Synchronous Controller 2 */
|
||||
0, /* Timer Counter 0 */
|
||||
0, /* Timer Counter 1 */
|
||||
0, /* Timer Counter 2 */
|
||||
0, /* Timer Counter 3 */
|
||||
0, /* Timer Counter 4 */
|
||||
0, /* Timer Counter 5 */
|
||||
2, /* USB Host port */
|
||||
3, /* Ethernet MAC */
|
||||
0, /* Advanced Interrupt Controller (IRQ0) */
|
||||
0, /* Advanced Interrupt Controller (IRQ1) */
|
||||
0, /* Advanced Interrupt Controller (IRQ2) */
|
||||
0, /* Advanced Interrupt Controller (IRQ3) */
|
||||
0, /* Advanced Interrupt Controller (IRQ4) */
|
||||
0, /* Advanced Interrupt Controller (IRQ5) */
|
||||
0 /* Advanced Interrupt Controller (IRQ6) */
|
||||
};
|
||||
|
||||
AT91_SOC_START(at91rm9200)
|
||||
.map_io = at91rm9200_map_io,
|
||||
.default_irq_priority = at91rm9200_default_irq_priority,
|
||||
.extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
|
||||
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
|
||||
| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
|
||||
| (1 << AT91RM9200_ID_IRQ6),
|
||||
.ioremap_registers = at91rm9200_ioremap_registers,
|
||||
.register_clocks = at91rm9200_register_clocks,
|
||||
.init = at91rm9200_initialize,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -183,7 +183,6 @@ static struct clock_event_device clkevt = {
|
|||
void __iomem *at91_st_base;
|
||||
EXPORT_SYMBOL_GPL(at91_st_base);
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static struct of_device_id at91rm9200_st_timer_ids[] = {
|
||||
{ .compatible = "atmel,at91rm9200-st" },
|
||||
{ /* sentinel */ }
|
||||
|
|
@ -219,28 +218,6 @@ node_err:
|
|||
err:
|
||||
return -EINVAL;
|
||||
}
|
||||
#else
|
||||
static int __init of_at91rm9200_st_init(void)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init at91rm9200_ioremap_st(u32 addr)
|
||||
{
|
||||
#ifdef CONFIG_OF
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
|
||||
if (np) {
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
at91_st_base = ioremap(addr, 256);
|
||||
if (!at91_st_base)
|
||||
panic("Impossible to ioremap ST\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* ST (system timer) module supports both clockevents and clocksource.
|
||||
|
|
|
|||
|
|
@ -10,307 +10,13 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/system_misc.h>
|
||||
#include <mach/cpu.h>
|
||||
#include <mach/at91_dbgu.h>
|
||||
#include <mach/at91sam9260.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "pm.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
*/
|
||||
static struct clk pioA_clk = {
|
||||
.name = "pioA_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_PIOA,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioB_clk = {
|
||||
.name = "pioB_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_PIOB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioC_clk = {
|
||||
.name = "pioC_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_PIOC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk adc_clk = {
|
||||
.name = "adc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_ADC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
static struct clk adc_op_clk = {
|
||||
.name = "adc_op_clk",
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
.rate_hz = 5000000,
|
||||
};
|
||||
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_US0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_US1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_US2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc_clk = {
|
||||
.name = "mci_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_MCI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk udc_clk = {
|
||||
.name = "udc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_UDP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi_clk = {
|
||||
.name = "twi_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_TWI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi0_clk = {
|
||||
.name = "spi0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_SPI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi1_clk = {
|
||||
.name = "spi1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_SPI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc_clk = {
|
||||
.name = "ssc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_SSC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc0_clk = {
|
||||
.name = "tc0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_TC0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc1_clk = {
|
||||
.name = "tc1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_TC1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc2_clk = {
|
||||
.name = "tc2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_TC2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ohci_clk = {
|
||||
.name = "ohci_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_UHP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk macb_clk = {
|
||||
.name = "pclk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_EMAC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk isi_clk = {
|
||||
.name = "isi_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_ISI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart3_clk = {
|
||||
.name = "usart3_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_US3,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart4_clk = {
|
||||
.name = "usart4_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_US4,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart5_clk = {
|
||||
.name = "usart5_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_US5,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc3_clk = {
|
||||
.name = "tc3_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_TC3,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc4_clk = {
|
||||
.name = "tc4_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_TC4,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc5_clk = {
|
||||
.name = "tc5_clk",
|
||||
.pmc_mask = 1 << AT91SAM9260_ID_TC5,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
static struct clk *periph_clocks[] __initdata = {
|
||||
&pioA_clk,
|
||||
&pioB_clk,
|
||||
&pioC_clk,
|
||||
&adc_clk,
|
||||
&adc_op_clk,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&mmc_clk,
|
||||
&udc_clk,
|
||||
&twi_clk,
|
||||
&spi0_clk,
|
||||
&spi1_clk,
|
||||
&ssc_clk,
|
||||
&tc0_clk,
|
||||
&tc1_clk,
|
||||
&tc2_clk,
|
||||
&ohci_clk,
|
||||
&macb_clk,
|
||||
&isi_clk,
|
||||
&usart3_clk,
|
||||
&usart4_clk,
|
||||
&usart5_clk,
|
||||
&tc3_clk,
|
||||
&tc4_clk,
|
||||
&tc5_clk,
|
||||
// irq0 .. irq2
|
||||
};
|
||||
|
||||
static struct clk_lookup periph_clocks_lookups[] = {
|
||||
/* One additional fake clock for macb_hclk */
|
||||
CLKDEV_CON_ID("hclk", &macb_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
|
||||
/* more usart lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffb4000.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffb8000.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
|
||||
/* more tc lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
|
||||
/* fake hclk clock */
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||
CLKDEV_CON_ID("pioC", &pioC_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
* The two programmable clocks.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 1,
|
||||
};
|
||||
|
||||
static void __init at91sam9260_register_clocks(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
||||
clk_register(periph_clocks[i]);
|
||||
|
||||
clkdev_add_table(periph_clocks_lookups,
|
||||
ARRAY_SIZE(periph_clocks_lookups));
|
||||
clkdev_add_table(usart_clocks_lookups,
|
||||
ARRAY_SIZE(usart_clocks_lookups));
|
||||
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
}
|
||||
#else
|
||||
#define at91sam9260_register_clocks NULL
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
|
||||
{
|
||||
.id = AT91SAM9260_ID_PIOA,
|
||||
.regbase = AT91SAM9260_BASE_PIOA,
|
||||
}, {
|
||||
.id = AT91SAM9260_ID_PIOB,
|
||||
.regbase = AT91SAM9260_BASE_PIOB,
|
||||
}, {
|
||||
.id = AT91SAM9260_ID_PIOC,
|
||||
.regbase = AT91SAM9260_BASE_PIOC,
|
||||
}
|
||||
};
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9260 processor initialization
|
||||
|
|
@ -342,119 +48,14 @@ static void __init at91sam9260_map_io(void)
|
|||
at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
|
||||
}
|
||||
|
||||
static void __init at91sam9260_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
|
||||
at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
|
||||
at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
|
||||
at91_pm_set_standby(at91sam9_sdram_standby);
|
||||
}
|
||||
|
||||
static void __init at91sam9260_initialize(void)
|
||||
{
|
||||
arm_pm_idle = at91sam9_idle;
|
||||
|
||||
at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
|
||||
|
||||
/* Register GPIO subsystem */
|
||||
at91_gpio_init(at91sam9260_gpio, 3);
|
||||
}
|
||||
|
||||
static struct resource rstc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9260_BASE_RSTC,
|
||||
.end = AT91SAM9260_BASE_RSTC + SZ_16 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91SAM9260_BASE_SDRAMC,
|
||||
.end = AT91SAM9260_BASE_SDRAMC + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device rstc_device = {
|
||||
.name = "at91-sam9260-reset",
|
||||
.resource = rstc_resources,
|
||||
.num_resources = ARRAY_SIZE(rstc_resources),
|
||||
};
|
||||
|
||||
static struct resource shdwc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9260_BASE_SHDWC,
|
||||
.end = AT91SAM9260_BASE_SHDWC + SZ_16 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device shdwc_device = {
|
||||
.name = "at91-poweroff",
|
||||
.resource = shdwc_resources,
|
||||
.num_resources = ARRAY_SIZE(shdwc_resources),
|
||||
};
|
||||
|
||||
static void __init at91sam9260_register_devices(void)
|
||||
{
|
||||
platform_device_register(&rstc_device);
|
||||
platform_device_register(&shdwc_device);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Interrupt initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
||||
*/
|
||||
static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
||||
7, /* Advanced Interrupt Controller */
|
||||
7, /* System Peripherals */
|
||||
1, /* Parallel IO Controller A */
|
||||
1, /* Parallel IO Controller B */
|
||||
1, /* Parallel IO Controller C */
|
||||
0, /* Analog-to-Digital Converter */
|
||||
5, /* USART 0 */
|
||||
5, /* USART 1 */
|
||||
5, /* USART 2 */
|
||||
0, /* Multimedia Card Interface */
|
||||
2, /* USB Device Port */
|
||||
6, /* Two-Wire Interface */
|
||||
5, /* Serial Peripheral Interface 0 */
|
||||
5, /* Serial Peripheral Interface 1 */
|
||||
5, /* Serial Synchronous Controller */
|
||||
0,
|
||||
0,
|
||||
0, /* Timer Counter 0 */
|
||||
0, /* Timer Counter 1 */
|
||||
0, /* Timer Counter 2 */
|
||||
2, /* USB Host port */
|
||||
3, /* Ethernet */
|
||||
0, /* Image Sensor Interface */
|
||||
5, /* USART 3 */
|
||||
5, /* USART 4 */
|
||||
5, /* USART 5 */
|
||||
0, /* Timer Counter 3 */
|
||||
0, /* Timer Counter 4 */
|
||||
0, /* Timer Counter 5 */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
};
|
||||
|
||||
static void __init at91sam9260_init_time(void)
|
||||
{
|
||||
at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
|
||||
}
|
||||
|
||||
AT91_SOC_START(at91sam9260)
|
||||
.map_io = at91sam9260_map_io,
|
||||
.default_irq_priority = at91sam9260_default_irq_priority,
|
||||
.extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
|
||||
| (1 << AT91SAM9260_ID_IRQ2),
|
||||
.ioremap_registers = at91sam9260_ioremap_registers,
|
||||
.register_clocks = at91sam9260_register_clocks,
|
||||
.register_devices = at91sam9260_register_devices,
|
||||
.init = at91sam9260_initialize,
|
||||
.init_time = at91sam9260_init_time,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -10,284 +10,12 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/system_misc.h>
|
||||
#include <mach/cpu.h>
|
||||
#include <mach/at91sam9261.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "pm.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
*/
|
||||
static struct clk pioA_clk = {
|
||||
.name = "pioA_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_PIOA,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioB_clk = {
|
||||
.name = "pioB_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_PIOB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioC_clk = {
|
||||
.name = "pioC_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_PIOC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_US0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_US1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_US2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc_clk = {
|
||||
.name = "mci_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_MCI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk udc_clk = {
|
||||
.name = "udc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_UDP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi_clk = {
|
||||
.name = "twi_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_TWI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi0_clk = {
|
||||
.name = "spi0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_SPI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi1_clk = {
|
||||
.name = "spi1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_SPI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc0_clk = {
|
||||
.name = "ssc0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_SSC0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc1_clk = {
|
||||
.name = "ssc1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_SSC1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc2_clk = {
|
||||
.name = "ssc2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_SSC2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc0_clk = {
|
||||
.name = "tc0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_TC0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc1_clk = {
|
||||
.name = "tc1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_TC1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tc2_clk = {
|
||||
.name = "tc2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_TC2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ohci_clk = {
|
||||
.name = "ohci_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_UHP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk lcdc_clk = {
|
||||
.name = "lcdc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9261_ID_LCDC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
/* HClocks */
|
||||
static struct clk hck0 = {
|
||||
.name = "hck0",
|
||||
.pmc_mask = AT91_PMC_HCK0,
|
||||
.type = CLK_TYPE_SYSTEM,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk hck1 = {
|
||||
.name = "hck1",
|
||||
.pmc_mask = AT91_PMC_HCK1,
|
||||
.type = CLK_TYPE_SYSTEM,
|
||||
.id = 1,
|
||||
};
|
||||
|
||||
static struct clk *periph_clocks[] __initdata = {
|
||||
&pioA_clk,
|
||||
&pioB_clk,
|
||||
&pioC_clk,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&mmc_clk,
|
||||
&udc_clk,
|
||||
&twi_clk,
|
||||
&spi0_clk,
|
||||
&spi1_clk,
|
||||
&ssc0_clk,
|
||||
&ssc1_clk,
|
||||
&ssc2_clk,
|
||||
&tc0_clk,
|
||||
&tc1_clk,
|
||||
&tc2_clk,
|
||||
&ohci_clk,
|
||||
&lcdc_clk,
|
||||
// irq0 .. irq2
|
||||
};
|
||||
|
||||
static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91sam9261-lcdfb.0", &hck1),
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91sam9g10-lcdfb.0", &hck1),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc0_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fffc0000.ssc", &ssc1_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fffc4000.ssc", &ssc2_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
|
||||
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk),
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||
CLKDEV_CON_ID("pioC", &pioC_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
|
||||
/* more lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
|
||||
CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
* The four programmable clocks.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 1,
|
||||
};
|
||||
static struct clk pck2 = {
|
||||
.name = "pck2",
|
||||
.pmc_mask = AT91_PMC_PCK2,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 2,
|
||||
};
|
||||
static struct clk pck3 = {
|
||||
.name = "pck3",
|
||||
.pmc_mask = AT91_PMC_PCK3,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 3,
|
||||
};
|
||||
|
||||
static void __init at91sam9261_register_clocks(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
||||
clk_register(periph_clocks[i]);
|
||||
|
||||
clkdev_add_table(periph_clocks_lookups,
|
||||
ARRAY_SIZE(periph_clocks_lookups));
|
||||
clkdev_add_table(usart_clocks_lookups,
|
||||
ARRAY_SIZE(usart_clocks_lookups));
|
||||
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
clk_register(&pck2);
|
||||
clk_register(&pck3);
|
||||
|
||||
clk_register(&hck0);
|
||||
clk_register(&hck1);
|
||||
}
|
||||
#else
|
||||
#define at91sam9261_register_clocks NULL
|
||||
#endif
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
|
||||
{
|
||||
.id = AT91SAM9261_ID_PIOA,
|
||||
.regbase = AT91SAM9261_BASE_PIOA,
|
||||
}, {
|
||||
.id = AT91SAM9261_ID_PIOB,
|
||||
.regbase = AT91SAM9261_BASE_PIOB,
|
||||
}, {
|
||||
.id = AT91SAM9261_ID_PIOC,
|
||||
.regbase = AT91SAM9261_BASE_PIOC,
|
||||
}
|
||||
};
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9261 processor initialization
|
||||
|
|
@ -301,119 +29,14 @@ static void __init at91sam9261_map_io(void)
|
|||
at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
|
||||
}
|
||||
|
||||
static void __init at91sam9261_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
|
||||
at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
|
||||
at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
|
||||
at91_pm_set_standby(at91sam9_sdram_standby);
|
||||
}
|
||||
|
||||
static void __init at91sam9261_initialize(void)
|
||||
{
|
||||
arm_pm_idle = at91sam9_idle;
|
||||
|
||||
at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);
|
||||
|
||||
/* Register GPIO subsystem */
|
||||
at91_gpio_init(at91sam9261_gpio, 3);
|
||||
}
|
||||
|
||||
static struct resource rstc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9261_BASE_RSTC,
|
||||
.end = AT91SAM9261_BASE_RSTC + SZ_16 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91SAM9261_BASE_SDRAMC,
|
||||
.end = AT91SAM9261_BASE_SDRAMC + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device rstc_device = {
|
||||
.name = "at91-sam9260-reset",
|
||||
.resource = rstc_resources,
|
||||
.num_resources = ARRAY_SIZE(rstc_resources),
|
||||
};
|
||||
|
||||
static struct resource shdwc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9261_BASE_SHDWC,
|
||||
.end = AT91SAM9261_BASE_SHDWC + SZ_16 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device shdwc_device = {
|
||||
.name = "at91-poweroff",
|
||||
.resource = shdwc_resources,
|
||||
.num_resources = ARRAY_SIZE(shdwc_resources),
|
||||
};
|
||||
|
||||
static void __init at91sam9261_register_devices(void)
|
||||
{
|
||||
platform_device_register(&rstc_device);
|
||||
platform_device_register(&shdwc_device);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Interrupt initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
||||
*/
|
||||
static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
||||
7, /* Advanced Interrupt Controller */
|
||||
7, /* System Peripherals */
|
||||
1, /* Parallel IO Controller A */
|
||||
1, /* Parallel IO Controller B */
|
||||
1, /* Parallel IO Controller C */
|
||||
0,
|
||||
5, /* USART 0 */
|
||||
5, /* USART 1 */
|
||||
5, /* USART 2 */
|
||||
0, /* Multimedia Card Interface */
|
||||
2, /* USB Device Port */
|
||||
6, /* Two-Wire Interface */
|
||||
5, /* Serial Peripheral Interface 0 */
|
||||
5, /* Serial Peripheral Interface 1 */
|
||||
4, /* Serial Synchronous Controller 0 */
|
||||
4, /* Serial Synchronous Controller 1 */
|
||||
4, /* Serial Synchronous Controller 2 */
|
||||
0, /* Timer Counter 0 */
|
||||
0, /* Timer Counter 1 */
|
||||
0, /* Timer Counter 2 */
|
||||
2, /* USB Host port */
|
||||
3, /* LCD Controller */
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
0, /* Advanced Interrupt Controller */
|
||||
};
|
||||
|
||||
static void __init at91sam9261_init_time(void)
|
||||
{
|
||||
at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
|
||||
}
|
||||
|
||||
AT91_SOC_START(at91sam9261)
|
||||
.map_io = at91sam9261_map_io,
|
||||
.default_irq_priority = at91sam9261_default_irq_priority,
|
||||
.extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
|
||||
| (1 << AT91SAM9261_ID_IRQ2),
|
||||
.ioremap_registers = at91sam9261_ioremap_registers,
|
||||
.register_clocks = at91sam9261_register_clocks,
|
||||
.register_devices = at91sam9261_register_devices,
|
||||
.init = at91sam9261_initialize,
|
||||
.init_time = at91sam9261_init_time,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -10,308 +10,11 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/system_misc.h>
|
||||
#include <mach/at91sam9263.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "pm.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
*/
|
||||
static struct clk pioA_clk = {
|
||||
.name = "pioA_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_PIOA,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioB_clk = {
|
||||
.name = "pioB_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_PIOB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioCDE_clk = {
|
||||
.name = "pioCDE_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_US0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_US1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_US2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc0_clk = {
|
||||
.name = "mci0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_MCI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc1_clk = {
|
||||
.name = "mci1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_MCI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk can_clk = {
|
||||
.name = "can_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_CAN,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi_clk = {
|
||||
.name = "twi_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_TWI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi0_clk = {
|
||||
.name = "spi0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_SPI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi1_clk = {
|
||||
.name = "spi1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_SPI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc0_clk = {
|
||||
.name = "ssc0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_SSC0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc1_clk = {
|
||||
.name = "ssc1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_SSC1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ac97_clk = {
|
||||
.name = "ac97_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_AC97C,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tcb_clk = {
|
||||
.name = "tcb_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_TCB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pwm_clk = {
|
||||
.name = "pwm_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_PWMC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk macb_clk = {
|
||||
.name = "pclk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_EMAC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk dma_clk = {
|
||||
.name = "dma_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_DMA,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twodge_clk = {
|
||||
.name = "2dge_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_2DGE,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk udc_clk = {
|
||||
.name = "udc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_UDP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk isi_clk = {
|
||||
.name = "isi_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_ISI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk lcdc_clk = {
|
||||
.name = "lcdc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_LCDC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ohci_clk = {
|
||||
.name = "ohci_clk",
|
||||
.pmc_mask = 1 << AT91SAM9263_ID_UHP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
static struct clk *periph_clocks[] __initdata = {
|
||||
&pioA_clk,
|
||||
&pioB_clk,
|
||||
&pioCDE_clk,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&mmc0_clk,
|
||||
&mmc1_clk,
|
||||
&can_clk,
|
||||
&twi_clk,
|
||||
&spi0_clk,
|
||||
&spi1_clk,
|
||||
&ssc0_clk,
|
||||
&ssc1_clk,
|
||||
&ac97_clk,
|
||||
&tcb_clk,
|
||||
&pwm_clk,
|
||||
&macb_clk,
|
||||
&twodge_clk,
|
||||
&udc_clk,
|
||||
&isi_clk,
|
||||
&lcdc_clk,
|
||||
&dma_clk,
|
||||
&ohci_clk,
|
||||
// irq0 .. irq1
|
||||
};
|
||||
|
||||
static struct clk_lookup periph_clocks_lookups[] = {
|
||||
/* One additional fake clock for macb_hclk */
|
||||
CLKDEV_CON_ID("hclk", &macb_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91sam9263-lcdfb.0", &lcdc_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),
|
||||
CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.1", &clk32k),
|
||||
/* fake hclk clock */
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||
CLKDEV_CON_ID("pioC", &pioCDE_clk),
|
||||
CLKDEV_CON_ID("pioD", &pioCDE_clk),
|
||||
CLKDEV_CON_ID("pioE", &pioCDE_clk),
|
||||
/* more usart lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
|
||||
/* more tc lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffd50.rtc", &clk32k),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
* The four programmable clocks.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 1,
|
||||
};
|
||||
static struct clk pck2 = {
|
||||
.name = "pck2",
|
||||
.pmc_mask = AT91_PMC_PCK2,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 2,
|
||||
};
|
||||
static struct clk pck3 = {
|
||||
.name = "pck3",
|
||||
.pmc_mask = AT91_PMC_PCK3,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 3,
|
||||
};
|
||||
|
||||
static void __init at91sam9263_register_clocks(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
||||
clk_register(periph_clocks[i]);
|
||||
|
||||
clkdev_add_table(periph_clocks_lookups,
|
||||
ARRAY_SIZE(periph_clocks_lookups));
|
||||
clkdev_add_table(usart_clocks_lookups,
|
||||
ARRAY_SIZE(usart_clocks_lookups));
|
||||
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
clk_register(&pck2);
|
||||
clk_register(&pck3);
|
||||
}
|
||||
#else
|
||||
#define at91sam9263_register_clocks NULL
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
|
||||
{
|
||||
.id = AT91SAM9263_ID_PIOA,
|
||||
.regbase = AT91SAM9263_BASE_PIOA,
|
||||
}, {
|
||||
.id = AT91SAM9263_ID_PIOB,
|
||||
.regbase = AT91SAM9263_BASE_PIOB,
|
||||
}, {
|
||||
.id = AT91SAM9263_ID_PIOCDE,
|
||||
.regbase = AT91SAM9263_BASE_PIOC,
|
||||
}, {
|
||||
.id = AT91SAM9263_ID_PIOCDE,
|
||||
.regbase = AT91SAM9263_BASE_PIOD,
|
||||
}, {
|
||||
.id = AT91SAM9263_ID_PIOCDE,
|
||||
.regbase = AT91SAM9263_BASE_PIOE,
|
||||
}
|
||||
};
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9263 processor initialization
|
||||
|
|
@ -323,121 +26,15 @@ static void __init at91sam9263_map_io(void)
|
|||
at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
|
||||
}
|
||||
|
||||
static void __init at91sam9263_ioremap_registers(void)
|
||||
{
|
||||
at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
|
||||
at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
|
||||
at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
|
||||
at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
|
||||
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
|
||||
at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
|
||||
at91_pm_set_standby(at91sam9_sdram_standby);
|
||||
}
|
||||
|
||||
static void __init at91sam9263_initialize(void)
|
||||
{
|
||||
arm_pm_idle = at91sam9_idle;
|
||||
|
||||
at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
|
||||
at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
|
||||
|
||||
/* Register GPIO subsystem */
|
||||
at91_gpio_init(at91sam9263_gpio, 5);
|
||||
}
|
||||
|
||||
static struct resource rstc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9263_BASE_RSTC,
|
||||
.end = AT91SAM9263_BASE_RSTC + SZ_16 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91SAM9263_BASE_SDRAMC0,
|
||||
.end = AT91SAM9263_BASE_SDRAMC0 + SZ_512 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device rstc_device = {
|
||||
.name = "at91-sam9260-reset",
|
||||
.resource = rstc_resources,
|
||||
.num_resources = ARRAY_SIZE(rstc_resources),
|
||||
};
|
||||
|
||||
static struct resource shdwc_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9263_BASE_SHDWC,
|
||||
.end = AT91SAM9263_BASE_SHDWC + SZ_16 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device shdwc_device = {
|
||||
.name = "at91-poweroff",
|
||||
.resource = shdwc_resources,
|
||||
.num_resources = ARRAY_SIZE(shdwc_resources),
|
||||
};
|
||||
|
||||
static void __init at91sam9263_register_devices(void)
|
||||
{
|
||||
platform_device_register(&rstc_device);
|
||||
platform_device_register(&shdwc_device);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Interrupt initialization
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
||||
*/
|
||||
static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
||||
7, /* Advanced Interrupt Controller (FIQ) */
|
||||
7, /* System Peripherals */
|
||||
1, /* Parallel IO Controller A */
|
||||
1, /* Parallel IO Controller B */
|
||||
1, /* Parallel IO Controller C, D and E */
|
||||
0,
|
||||
0,
|
||||
5, /* USART 0 */
|
||||
5, /* USART 1 */
|
||||
5, /* USART 2 */
|
||||
0, /* Multimedia Card Interface 0 */
|
||||
0, /* Multimedia Card Interface 1 */
|
||||
3, /* CAN */
|
||||
6, /* Two-Wire Interface */
|
||||
5, /* Serial Peripheral Interface 0 */
|
||||
5, /* Serial Peripheral Interface 1 */
|
||||
4, /* Serial Synchronous Controller 0 */
|
||||
4, /* Serial Synchronous Controller 1 */
|
||||
5, /* AC97 Controller */
|
||||
0, /* Timer Counter 0, 1 and 2 */
|
||||
0, /* Pulse Width Modulation Controller */
|
||||
3, /* Ethernet */
|
||||
0,
|
||||
0, /* 2D Graphic Engine */
|
||||
2, /* USB Device Port */
|
||||
0, /* Image Sensor Interface */
|
||||
3, /* LDC Controller */
|
||||
0, /* DMA Controller */
|
||||
0,
|
||||
2, /* USB Host port */
|
||||
0, /* Advanced Interrupt Controller (IRQ0) */
|
||||
0, /* Advanced Interrupt Controller (IRQ1) */
|
||||
};
|
||||
|
||||
static void __init at91sam9263_init_time(void)
|
||||
{
|
||||
at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
|
||||
}
|
||||
|
||||
AT91_SOC_START(at91sam9263)
|
||||
.map_io = at91sam9263_map_io,
|
||||
.default_irq_priority = at91sam9263_default_irq_priority,
|
||||
.extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
|
||||
.ioremap_registers = at91sam9263_ioremap_registers,
|
||||
.register_clocks = at91sam9263_register_clocks,
|
||||
.register_devices = at91sam9263_register_devices,
|
||||
.init = at91sam9263_initialize,
|
||||
.init_time = at91sam9263_init_time,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -11,7 +11,6 @@
|
|||
*/
|
||||
|
||||
#include <asm/system_misc.h>
|
||||
#include <mach/cpu.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "soc.h"
|
||||
|
|
@ -34,13 +33,7 @@ static void __init at91sam9g45_initialize(void)
|
|||
at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);
|
||||
}
|
||||
|
||||
static void __init at91sam9g45_init_time(void)
|
||||
{
|
||||
at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
|
||||
}
|
||||
|
||||
AT91_SOC_START(at91sam9g45)
|
||||
.map_io = at91sam9g45_map_io,
|
||||
.init = at91sam9g45_initialize,
|
||||
.init_time = at91sam9g45_init_time,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
|
|
@ -6,219 +6,11 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
#include <asm/system_misc.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <mach/at91sam9n12.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "sam9_smc.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
*/
|
||||
static struct clk pioAB_clk = {
|
||||
.name = "pioAB_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_PIOAB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioCD_clk = {
|
||||
.name = "pioCD_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_PIOCD,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_USART0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_USART1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_USART2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart3_clk = {
|
||||
.name = "usart3_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_USART3,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi0_clk = {
|
||||
.name = "twi0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_TWI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi1_clk = {
|
||||
.name = "twi1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_TWI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc_clk = {
|
||||
.name = "mci_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_MCI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi0_clk = {
|
||||
.name = "spi0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_SPI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi1_clk = {
|
||||
.name = "spi1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_SPI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk uart0_clk = {
|
||||
.name = "uart0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_UART0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk uart1_clk = {
|
||||
.name = "uart1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_UART1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tcb_clk = {
|
||||
.name = "tcb_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_TCB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pwm_clk = {
|
||||
.name = "pwm_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_PWM,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk adc_clk = {
|
||||
.name = "adc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_ADC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk dma_clk = {
|
||||
.name = "dma_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_DMA,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk uhp_clk = {
|
||||
.name = "uhp",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_UHP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk udp_clk = {
|
||||
.name = "udp_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_UDP,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk lcdc_clk = {
|
||||
.name = "lcdc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_LCDC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc_clk = {
|
||||
.name = "ssc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9N12_ID_SSC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
static struct clk *periph_clocks[] __initdata = {
|
||||
&pioAB_clk,
|
||||
&pioCD_clk,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&usart3_clk,
|
||||
&twi0_clk,
|
||||
&twi1_clk,
|
||||
&mmc_clk,
|
||||
&spi0_clk,
|
||||
&spi1_clk,
|
||||
&lcdc_clk,
|
||||
&uart0_clk,
|
||||
&uart1_clk,
|
||||
&tcb_clk,
|
||||
&pwm_clk,
|
||||
&adc_clk,
|
||||
&dma_clk,
|
||||
&uhp_clk,
|
||||
&udp_clk,
|
||||
&ssc_clk,
|
||||
};
|
||||
|
||||
static struct clk_lookup periph_clocks_lookups[] = {
|
||||
/* lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "f801c000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f0010000.ssc", &ssc_clk),
|
||||
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
|
||||
/* additional fake clock for macb_hclk */
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
|
||||
CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8034000.pwm", &pwm_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
* The two programmable clocks.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 1,
|
||||
};
|
||||
|
||||
static void __init at91sam9n12_register_clocks(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
||||
clk_register(periph_clocks[i]);
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
|
||||
clkdev_add_table(periph_clocks_lookups,
|
||||
ARRAY_SIZE(periph_clocks_lookups));
|
||||
|
||||
}
|
||||
#else
|
||||
#define at91sam9n12_register_clocks NULL
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9N12 processor initialization
|
||||
|
|
@ -236,6 +28,5 @@ static void __init at91sam9n12_initialize(void)
|
|||
|
||||
AT91_SOC_START(at91sam9n12)
|
||||
.map_io = at91sam9n12_map_io,
|
||||
.register_clocks = at91sam9n12_register_clocks,
|
||||
.init = at91sam9n12_initialize,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
|
|
@ -46,13 +46,7 @@ static void __init at91sam9rl_initialize(void)
|
|||
at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT);
|
||||
}
|
||||
|
||||
static void __init at91sam9rl_init_time(void)
|
||||
{
|
||||
at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
|
||||
}
|
||||
|
||||
AT91_SOC_START(at91sam9rl)
|
||||
.map_io = at91sam9rl_map_io,
|
||||
.init = at91sam9rl_initialize,
|
||||
.init_time = at91sam9rl_init_time,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
|
|
@ -6,317 +6,11 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
#include <asm/system_misc.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <mach/at91sam9x5.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "sam9_smc.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
*/
|
||||
static struct clk pioAB_clk = {
|
||||
.name = "pioAB_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_PIOAB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pioCD_clk = {
|
||||
.name = "pioCD_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_PIOCD,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk smd_clk = {
|
||||
.name = "smd_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_SMD,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart0_clk = {
|
||||
.name = "usart0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_USART0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart1_clk = {
|
||||
.name = "usart1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_USART1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk usart2_clk = {
|
||||
.name = "usart2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_USART2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
/* USART3 clock - Only for sam9g25/sam9x25 */
|
||||
static struct clk usart3_clk = {
|
||||
.name = "usart3_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_USART3,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi0_clk = {
|
||||
.name = "twi0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_TWI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi1_clk = {
|
||||
.name = "twi1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_TWI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk twi2_clk = {
|
||||
.name = "twi2_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_TWI2,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc0_clk = {
|
||||
.name = "mci0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_MCI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi0_clk = {
|
||||
.name = "spi0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_SPI0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk spi1_clk = {
|
||||
.name = "spi1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_SPI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk uart0_clk = {
|
||||
.name = "uart0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_UART0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk uart1_clk = {
|
||||
.name = "uart1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_UART1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk tcb0_clk = {
|
||||
.name = "tcb0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_TCB,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk pwm_clk = {
|
||||
.name = "pwm_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_PWM,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk adc_clk = {
|
||||
.name = "adc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_ADC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk adc_op_clk = {
|
||||
.name = "adc_op_clk",
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
.rate_hz = 5000000,
|
||||
};
|
||||
static struct clk dma0_clk = {
|
||||
.name = "dma0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_DMA0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk dma1_clk = {
|
||||
.name = "dma1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_DMA1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk uhphs_clk = {
|
||||
.name = "uhphs",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_UHPHS,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk udphs_clk = {
|
||||
.name = "udphs_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_UDPHS,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
/* emac0 clock - Only for sam9g25/sam9x25/sam9g35/sam9x35 */
|
||||
static struct clk macb0_clk = {
|
||||
.name = "pclk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_EMAC0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
/* lcd clock - Only for sam9g15/sam9g35/sam9x35 */
|
||||
static struct clk lcdc_clk = {
|
||||
.name = "lcdc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_LCDC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
/* isi clock - Only for sam9g25 */
|
||||
static struct clk isi_clk = {
|
||||
.name = "isi_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_ISI,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk mmc1_clk = {
|
||||
.name = "mci1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_MCI1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
/* emac1 clock - Only for sam9x25 */
|
||||
static struct clk macb1_clk = {
|
||||
.name = "pclk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_EMAC1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
static struct clk ssc_clk = {
|
||||
.name = "ssc_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_SSC,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
/* can0 clock - Only for sam9x35 */
|
||||
static struct clk can0_clk = {
|
||||
.name = "can0_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_CAN0,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
/* can1 clock - Only for sam9x35 */
|
||||
static struct clk can1_clk = {
|
||||
.name = "can1_clk",
|
||||
.pmc_mask = 1 << AT91SAM9X5_ID_CAN1,
|
||||
.type = CLK_TYPE_PERIPHERAL,
|
||||
};
|
||||
|
||||
static struct clk *periph_clocks[] __initdata = {
|
||||
&pioAB_clk,
|
||||
&pioCD_clk,
|
||||
&smd_clk,
|
||||
&usart0_clk,
|
||||
&usart1_clk,
|
||||
&usart2_clk,
|
||||
&twi0_clk,
|
||||
&twi1_clk,
|
||||
&twi2_clk,
|
||||
&mmc0_clk,
|
||||
&spi0_clk,
|
||||
&spi1_clk,
|
||||
&uart0_clk,
|
||||
&uart1_clk,
|
||||
&tcb0_clk,
|
||||
&pwm_clk,
|
||||
&adc_clk,
|
||||
&adc_op_clk,
|
||||
&dma0_clk,
|
||||
&dma1_clk,
|
||||
&uhphs_clk,
|
||||
&udphs_clk,
|
||||
&mmc1_clk,
|
||||
&ssc_clk,
|
||||
// irq0
|
||||
};
|
||||
|
||||
static struct clk_lookup periph_clocks_lookups[] = {
|
||||
/* lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "f801c000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8040000.serial", &uart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "f8044000.serial", &uart1_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "f000c000.mmc", &mmc1_clk),
|
||||
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
|
||||
CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "f0010000.ssc", &ssc_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
|
||||
/* additional fake clock for macb_hclk */
|
||||
CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
|
||||
CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
|
||||
CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8034000.pwm", &pwm_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
* The two programmable clocks.
|
||||
* You must configure pin multiplexing to bring these signals out.
|
||||
*/
|
||||
static struct clk pck0 = {
|
||||
.name = "pck0",
|
||||
.pmc_mask = AT91_PMC_PCK0,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 0,
|
||||
};
|
||||
static struct clk pck1 = {
|
||||
.name = "pck1",
|
||||
.pmc_mask = AT91_PMC_PCK1,
|
||||
.type = CLK_TYPE_PROGRAMMABLE,
|
||||
.id = 1,
|
||||
};
|
||||
|
||||
static void __init at91sam9x5_register_clocks(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
|
||||
clk_register(periph_clocks[i]);
|
||||
|
||||
clkdev_add_table(periph_clocks_lookups,
|
||||
ARRAY_SIZE(periph_clocks_lookups));
|
||||
|
||||
if (cpu_is_at91sam9g25()
|
||||
|| cpu_is_at91sam9x25())
|
||||
clk_register(&usart3_clk);
|
||||
|
||||
if (cpu_is_at91sam9g25()
|
||||
|| cpu_is_at91sam9x25()
|
||||
|| cpu_is_at91sam9g35()
|
||||
|| cpu_is_at91sam9x35())
|
||||
clk_register(&macb0_clk);
|
||||
|
||||
if (cpu_is_at91sam9g15()
|
||||
|| cpu_is_at91sam9g35()
|
||||
|| cpu_is_at91sam9x35())
|
||||
clk_register(&lcdc_clk);
|
||||
|
||||
if (cpu_is_at91sam9g25())
|
||||
clk_register(&isi_clk);
|
||||
|
||||
if (cpu_is_at91sam9x25())
|
||||
clk_register(&macb1_clk);
|
||||
|
||||
if (cpu_is_at91sam9x25()
|
||||
|| cpu_is_at91sam9x35()) {
|
||||
clk_register(&can0_clk);
|
||||
clk_register(&can1_clk);
|
||||
}
|
||||
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
}
|
||||
#else
|
||||
#define at91sam9x5_register_clocks NULL
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* AT91SAM9x5 processor initialization
|
||||
|
|
@ -338,6 +32,5 @@ static void __init at91sam9x5_initialize(void)
|
|||
|
||||
AT91_SOC_START(at91sam9x5)
|
||||
.map_io = at91sam9x5_map_io,
|
||||
.register_clocks = at91sam9x5_register_clocks,
|
||||
.init = at91sam9x5_initialize,
|
||||
AT91_SOC_END
|
||||
|
|
|
|||
|
|
@ -1,99 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-1arm.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
static void __init onearm_init_early(void)
|
||||
{
|
||||
/* Set cpu type: PQFP */
|
||||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata onearm_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata onearm_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata onearm_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC2,
|
||||
.pullup_pin = AT91_PIN_PC3,
|
||||
};
|
||||
|
||||
static void __init onearm_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&onearm_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&onearm_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&onearm_udc_data);
|
||||
}
|
||||
|
||||
MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = onearm_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = onearm_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,223 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-afeb-9260v1.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2006 Atmel
|
||||
* Copyright (C) 2008 Sergey Lapin
|
||||
*
|
||||
* A custom board designed as open hardware; PCBs and various information
|
||||
* is available at http://groups.google.com/group/arm9fpga-evolution-board/
|
||||
* Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init afeb9260_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata afeb9260_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata afeb9260_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC5,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* SPI devices.
|
||||
*/
|
||||
static struct spi_board_info afeb9260_spi_devices[] = {
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata afeb9260_macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PA9,
|
||||
.is_rmii = 0,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct mtd_partition __initdata afeb9260_nand_partition[] = {
|
||||
{
|
||||
.name = "bootloader",
|
||||
.offset = 0,
|
||||
.size = (640 * SZ_1K),
|
||||
},
|
||||
{
|
||||
.name = "kernel",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = SZ_2M,
|
||||
},
|
||||
{
|
||||
.name = "rootfs",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata afeb9260_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.rdy_pin = AT91_PIN_PC13,
|
||||
.enable_pin = AT91_PIN_PC14,
|
||||
.bus_width_16 = 0,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.parts = afeb9260_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(afeb9260_nand_partition),
|
||||
.det_pin = -EINVAL,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
*/
|
||||
static struct mci_platform_data __initdata afeb9260_mci0_data = {
|
||||
.slot[1] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PC9,
|
||||
.wp_pin = AT91_PIN_PC4,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
|
||||
static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("tlv320aic23", 0x1a),
|
||||
}, {
|
||||
I2C_BOARD_INFO("fm3130", 0x68),
|
||||
}, {
|
||||
I2C_BOARD_INFO("24c64", 0x50),
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* IDE (CF True IDE mode)
|
||||
*/
|
||||
static struct at91_cf_data afeb9260_cf_data = {
|
||||
.chipselect = 4,
|
||||
.irq_pin = AT91_PIN_PA6,
|
||||
.det_pin = -EINVAL,
|
||||
.vcc_pin = -EINVAL,
|
||||
.rst_pin = AT91_PIN_PA7,
|
||||
.flags = AT91_CF_TRUE_IDE,
|
||||
};
|
||||
|
||||
static void __init afeb9260_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&afeb9260_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&afeb9260_udc_data);
|
||||
/* SPI */
|
||||
at91_add_device_spi(afeb9260_spi_devices,
|
||||
ARRAY_SIZE(afeb9260_spi_devices));
|
||||
/* NAND */
|
||||
at91_add_device_nand(&afeb9260_nand_data);
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&afeb9260_macb_data);
|
||||
|
||||
/* Standard function's pin assignments are not
|
||||
* appropriate for us and generic code provide
|
||||
* no API to configure these pins any other way */
|
||||
at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
|
||||
at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &afeb9260_mci0_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(afeb9260_i2c_devices,
|
||||
ARRAY_SIZE(afeb9260_i2c_devices));
|
||||
/* Audio */
|
||||
at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
|
||||
/* IDE */
|
||||
at91_add_device_cf(&afeb9260_cf_data);
|
||||
}
|
||||
|
||||
MACHINE_START(AFEB9260, "Custom afeb9260 board")
|
||||
/* Maintainer: Sergey Lapin <slapin@ossfans.org> */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = afeb9260_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = afeb9260_board_init,
|
||||
MACHINE_END
|
||||
|
||||
|
|
@ -1,199 +0,0 @@
|
|||
/*
|
||||
* KwikByte CAM60 (KB9260)
|
||||
*
|
||||
* based on board-sam9260ek.c
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2006 Atmel
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/at91sam9_smc.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init cam60_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 10 MHz crystal */
|
||||
at91_initialize(10000000);
|
||||
}
|
||||
|
||||
/*
|
||||
* USB Host
|
||||
*/
|
||||
static struct at91_usbh_data __initdata cam60_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* SPI devices.
|
||||
*/
|
||||
#if defined(CONFIG_MTD_DATAFLASH)
|
||||
static struct mtd_partition cam60_spi_partitions[] = {
|
||||
{
|
||||
.name = "BOOT1",
|
||||
.offset = 0,
|
||||
.size = 4 * 1056,
|
||||
},
|
||||
{
|
||||
.name = "BOOT2",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = 256 * 1056,
|
||||
},
|
||||
{
|
||||
.name = "kernel",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = 2222 * 1056,
|
||||
},
|
||||
{
|
||||
.name = "file system",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct flash_platform_data cam60_spi_flash_platform_data = {
|
||||
.name = "spi_flash",
|
||||
.parts = cam60_spi_partitions,
|
||||
.nr_parts = ARRAY_SIZE(cam60_spi_partitions)
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct spi_board_info cam60_spi_devices[] __initdata = {
|
||||
#if defined(CONFIG_MTD_DATAFLASH)
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
.platform_data = &cam60_spi_flash_platform_data
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data cam60_macb_data __initdata = {
|
||||
.phy_irq_pin = AT91_PIN_PB5,
|
||||
.is_rmii = 0,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* NAND Flash
|
||||
*/
|
||||
static struct mtd_partition __initdata cam60_nand_partition[] = {
|
||||
{
|
||||
.name = "nand_fs",
|
||||
.offset = 0,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata cam60_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.det_pin = -EINVAL,
|
||||
.rdy_pin = AT91_PIN_PA9,
|
||||
.enable_pin = AT91_PIN_PA7,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.parts = cam60_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(cam60_nand_partition),
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata cam60_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 3,
|
||||
.nrd_pulse = 3,
|
||||
.ncs_write_pulse = 3,
|
||||
.nwe_pulse = 3,
|
||||
|
||||
.read_cycle = 5,
|
||||
.write_cycle = 5,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
|
||||
static void __init cam60_add_device_nand(void)
|
||||
{
|
||||
/* configure chip-select 3 (NAND) */
|
||||
sam9_smc_configure(0, 3, &cam60_nand_smc_config);
|
||||
|
||||
at91_add_device_nand(&cam60_nand_data);
|
||||
}
|
||||
|
||||
|
||||
static void __init cam60_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* SPI */
|
||||
at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&cam60_macb_data);
|
||||
/* USB Host */
|
||||
/* enable USB power supply circuit */
|
||||
at91_set_gpio_output(AT91_PIN_PB18, 1);
|
||||
at91_add_device_usbh(&cam60_usbh_data);
|
||||
/* NAND */
|
||||
cam60_add_device_nand();
|
||||
}
|
||||
|
||||
MACHINE_START(CAM60, "KwikByte CAM60")
|
||||
/* Maintainer: KwikByte */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = cam60_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = cam60_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,167 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-carmeva.c
|
||||
*
|
||||
* Copyright (c) 2005 Peer Georgi
|
||||
* Conitec Datasystems
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init carmeva_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 20.000 MHz crystal */
|
||||
at91_initialize(20000000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata carmeva_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata carmeva_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata carmeva_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PD12,
|
||||
.pullup_pin = AT91_PIN_PD9,
|
||||
};
|
||||
|
||||
/* FIXME: user dependent */
|
||||
// static struct at91_cf_data __initdata carmeva_cf_data = {
|
||||
// .det_pin = AT91_PIN_PB0,
|
||||
// .rst_pin = AT91_PIN_PC5,
|
||||
// .irq_pin = -EINVAL,
|
||||
// .vcc_pin = -EINVAL,
|
||||
// };
|
||||
|
||||
static struct mci_platform_data __initdata carmeva_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PB10,
|
||||
.wp_pin = AT91_PIN_PC14,
|
||||
},
|
||||
};
|
||||
|
||||
static struct spi_board_info carmeva_spi_devices[] = {
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
},
|
||||
{ /* User accessible spi - cs1 (250KHz) */
|
||||
.modalias = "spi-cs1",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 250 * 1000,
|
||||
},
|
||||
{ /* User accessible spi - cs2 (1MHz) */
|
||||
.modalias = "spi-cs2",
|
||||
.chip_select = 2,
|
||||
.max_speed_hz = 1 * 1000 * 1000,
|
||||
},
|
||||
{ /* User accessible spi - cs3 (10MHz) */
|
||||
.modalias = "spi-cs3",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led carmeva_leds[] = {
|
||||
{ /* "user led 1", LED9 */
|
||||
.name = "led9",
|
||||
.gpio = AT91_PIN_PA21,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* "user led 2", LED10 */
|
||||
.name = "led10",
|
||||
.gpio = AT91_PIN_PA25,
|
||||
.active_low = 1,
|
||||
},
|
||||
{ /* "user led 3", LED11 */
|
||||
.name = "led11",
|
||||
.gpio = AT91_PIN_PA26,
|
||||
.active_low = 1,
|
||||
},
|
||||
{ /* "user led 4", LED12 */
|
||||
.name = "led12",
|
||||
.gpio = AT91_PIN_PA18,
|
||||
.active_low = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init carmeva_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&carmeva_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&carmeva_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&carmeva_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* SPI */
|
||||
at91_add_device_spi(carmeva_spi_devices, ARRAY_SIZE(carmeva_spi_devices));
|
||||
/* Compact Flash */
|
||||
// at91_add_device_cf(&carmeva_cf_data);
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &carmeva_mci0_data);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(carmeva_leds, ARRAY_SIZE(carmeva_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(CARMEVA, "Carmeva")
|
||||
/* Maintainer: Conitec Datasystems */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = carmeva_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = carmeva_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,386 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-cpu9krea.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2006 Atmel
|
||||
* Copyright (C) 2009 Eric Benard - eric@eukrea.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/at91sam9260_matrix.h>
|
||||
#include <mach/at91_matrix.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
static void __init cpu9krea_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata cpu9krea_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC8,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata cpu9krea_macb_data = {
|
||||
.phy_irq_pin = -EINVAL,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct atmel_nand_data __initdata cpu9krea_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.rdy_pin = AT91_PIN_PC13,
|
||||
.enable_pin = AT91_PIN_PC14,
|
||||
.bus_width_16 = 0,
|
||||
.det_pin = -EINVAL,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_MACH_CPU9260
|
||||
static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 3,
|
||||
.nrd_pulse = 3,
|
||||
.ncs_write_pulse = 3,
|
||||
.nwe_pulse = 3,
|
||||
|
||||
.read_cycle = 5,
|
||||
.write_cycle = 5,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
|
||||
| AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
#else
|
||||
static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 2,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 2,
|
||||
|
||||
.ncs_read_pulse = 4,
|
||||
.nrd_pulse = 4,
|
||||
.ncs_write_pulse = 4,
|
||||
.nwe_pulse = 4,
|
||||
|
||||
.read_cycle = 7,
|
||||
.write_cycle = 7,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
|
||||
| AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
|
||||
.tdf_cycles = 3,
|
||||
};
|
||||
#endif
|
||||
|
||||
static void __init cpu9krea_add_device_nand(void)
|
||||
{
|
||||
sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
|
||||
at91_add_device_nand(&cpu9krea_nand_data);
|
||||
}
|
||||
|
||||
/*
|
||||
* NOR flash
|
||||
*/
|
||||
static struct physmap_flash_data cpuat9260_nor_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
#define NOR_BASE AT91_CHIPSELECT_0
|
||||
#define NOR_SIZE SZ_64M
|
||||
|
||||
static struct resource nor_flash_resources[] = {
|
||||
{
|
||||
.start = NOR_BASE,
|
||||
.end = NOR_BASE + NOR_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device cpu9krea_nor_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &cpuat9260_nor_data,
|
||||
},
|
||||
.resource = nor_flash_resources,
|
||||
.num_resources = ARRAY_SIZE(nor_flash_resources),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_MACH_CPU9260
|
||||
static struct sam9_smc_config __initdata cpu9krea_nor_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 10,
|
||||
.nrd_pulse = 10,
|
||||
.ncs_write_pulse = 6,
|
||||
.nwe_pulse = 6,
|
||||
|
||||
.read_cycle = 12,
|
||||
.write_cycle = 8,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
|
||||
| AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
|
||||
| AT91_SMC_DBW_16,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
#else
|
||||
static struct sam9_smc_config __initdata cpu9krea_nor_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 13,
|
||||
.nrd_pulse = 13,
|
||||
.ncs_write_pulse = 8,
|
||||
.nwe_pulse = 8,
|
||||
|
||||
.read_cycle = 15,
|
||||
.write_cycle = 10,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
|
||||
| AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
|
||||
| AT91_SMC_DBW_16,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
#endif
|
||||
|
||||
static __init void cpu9krea_add_device_nor(void)
|
||||
{
|
||||
unsigned long csa;
|
||||
|
||||
csa = at91_matrix_read(AT91_MATRIX_EBICSA);
|
||||
at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
|
||||
|
||||
/* configure chip-select 0 (NOR) */
|
||||
sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
|
||||
|
||||
platform_device_register(&cpu9krea_nor_flash);
|
||||
}
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led cpu9krea_leds[] = {
|
||||
{ /* LED1 */
|
||||
.name = "LED1",
|
||||
.gpio = AT91_PIN_PC11,
|
||||
.active_low = 1,
|
||||
.default_trigger = "timer",
|
||||
},
|
||||
{ /* LED2 */
|
||||
.name = "LED2",
|
||||
.gpio = AT91_PIN_PC12,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* LED3 */
|
||||
.name = "LED3",
|
||||
.gpio = AT91_PIN_PC7,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
},
|
||||
{ /* LED4 */
|
||||
.name = "LED4",
|
||||
.gpio = AT91_PIN_PC9,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
}
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata cpu9krea_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("ds1339", 0x68),
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* GPIO Buttons
|
||||
*/
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button cpu9krea_buttons[] = {
|
||||
{
|
||||
.gpio = AT91_PIN_PC3,
|
||||
.code = BTN_0,
|
||||
.desc = "BP1",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PB20,
|
||||
.code = BTN_1,
|
||||
.desc = "BP2",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data cpu9krea_button_data = {
|
||||
.buttons = cpu9krea_buttons,
|
||||
.nbuttons = ARRAY_SIZE(cpu9krea_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device cpu9krea_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &cpu9krea_button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init cpu9krea_add_device_buttons(void)
|
||||
{
|
||||
at91_set_gpio_input(AT91_PIN_PC3, 1); /* BP1 */
|
||||
at91_set_deglitch(AT91_PIN_PC3, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PB20, 1); /* BP2 */
|
||||
at91_set_deglitch(AT91_PIN_PB20, 1);
|
||||
|
||||
platform_device_register(&cpu9krea_button_device);
|
||||
}
|
||||
#else
|
||||
static void __init cpu9krea_add_device_buttons(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
*/
|
||||
static struct mci_platform_data __initdata cpu9krea_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PA29,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cpu9krea_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* NOR */
|
||||
cpu9krea_add_device_nor();
|
||||
/* Serial */
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART3 on ttyS4. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
|
||||
|
||||
/* USART4 on ttyS5. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx, Tx) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&cpu9krea_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&cpu9krea_udc_data);
|
||||
/* NAND */
|
||||
cpu9krea_add_device_nand();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&cpu9krea_macb_data);
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &cpu9krea_mci0_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(cpu9krea_i2c_devices,
|
||||
ARRAY_SIZE(cpu9krea_i2c_devices));
|
||||
/* LEDs */
|
||||
at91_gpio_leds(cpu9krea_leds, ARRAY_SIZE(cpu9krea_leds));
|
||||
/* Push Buttons */
|
||||
cpu9krea_add_device_buttons();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MACH_CPU9260
|
||||
MACHINE_START(CPUAT9260, "Eukrea CPU9260")
|
||||
#else
|
||||
MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
|
||||
#endif
|
||||
/* Maintainer: Eric Benard - EUKREA Electromatique */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = cpu9krea_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = cpu9krea_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,189 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-cpuat91.c
|
||||
*
|
||||
* Copyright (C) 2009 Eric Benard - eric@eukrea.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/mtd/plat-ram.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/at91rm9200_mc.h>
|
||||
#include <mach/at91_ramc.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static struct gpio_led cpuat91_leds[] = {
|
||||
{
|
||||
.name = "led1",
|
||||
.default_trigger = "heartbeat",
|
||||
.active_low = 1,
|
||||
.gpio = AT91_PIN_PC0,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cpuat91_init_early(void)
|
||||
{
|
||||
/* Set cpu type: PQFP */
|
||||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata cpuat91_eth_data = {
|
||||
.phy_irq_pin = -EINVAL,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata cpuat91_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata cpuat91_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC15,
|
||||
.pullup_pin = AT91_PIN_PC14,
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata cpuat91_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PC2,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data cpuat91_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource cpuat91_flash_resource = {
|
||||
.start = AT91_CHIPSELECT_0,
|
||||
.end = AT91_CHIPSELECT_0 + SZ_16M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device cpuat91_norflash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &cpuat91_flash_data,
|
||||
},
|
||||
.resource = &cpuat91_flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_MTD_PLATRAM
|
||||
struct platdata_mtd_ram at91_sram_pdata = {
|
||||
.mapname = "SRAM",
|
||||
.bankwidth = 2,
|
||||
};
|
||||
|
||||
static struct resource at91_sram_resource[] = {
|
||||
[0] = {
|
||||
.start = AT91RM9200_SRAM_BASE,
|
||||
.end = AT91RM9200_SRAM_BASE + AT91RM9200_SRAM_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device at91_sram = {
|
||||
.name = "mtd-ram",
|
||||
.id = 0,
|
||||
.resource = at91_sram_resource,
|
||||
.num_resources = ARRAY_SIZE(at91_sram_resource),
|
||||
.dev = {
|
||||
.platform_data = &at91_sram_pdata,
|
||||
},
|
||||
};
|
||||
#endif /* MTD_PLATRAM */
|
||||
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&cpuat91_norflash,
|
||||
#ifdef CONFIG_MTD_PLATRAM
|
||||
&at91_sram,
|
||||
#endif /* CONFIG_MTD_PLATRAM */
|
||||
};
|
||||
|
||||
static void __init cpuat91_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART2 on ttyS3 (Rx, Tx) */
|
||||
at91_register_uart(AT91RM9200_ID_US2, 3, 0);
|
||||
|
||||
/* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |
|
||||
ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* LEDs. */
|
||||
at91_gpio_leds(cpuat91_leds, ARRAY_SIZE(cpuat91_leds));
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&cpuat91_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&cpuat91_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&cpuat91_udc_data);
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &cpuat91_mci0_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* Platform devices */
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
}
|
||||
|
||||
MACHINE_START(CPUAT91, "Eukrea")
|
||||
/* Maintainer: Eric Benard - EUKREA Electromatique */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = cpuat91_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = cpuat91_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,260 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-csb337.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
static void __init csb337_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 3.6864 MHz crystal */
|
||||
at91_initialize(3686400);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata csb337_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC2,
|
||||
.is_rmii = 0,
|
||||
/* The CSB337 bootloader stores the MAC the wrong-way around */
|
||||
.rev_eth_addr = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata csb337_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata csb337_udc_data = {
|
||||
.pullup_pin = AT91_PIN_PA24,
|
||||
.vbus_pin = -EINVAL,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata csb337_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("ds1307", 0x68),
|
||||
},
|
||||
};
|
||||
|
||||
static struct at91_cf_data __initdata csb337_cf_data = {
|
||||
/*
|
||||
* connector P4 on the CSB 337 mates to
|
||||
* connector P8 on the CSB 300CF
|
||||
*/
|
||||
|
||||
/* CSB337 specific */
|
||||
.det_pin = AT91_PIN_PC3,
|
||||
|
||||
/* CSB300CF specific */
|
||||
.irq_pin = AT91_PIN_PA19,
|
||||
.vcc_pin = AT91_PIN_PD0,
|
||||
.rst_pin = AT91_PIN_PD2,
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata csb337_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PD5,
|
||||
.wp_pin = AT91_PIN_PD6,
|
||||
},
|
||||
};
|
||||
|
||||
static struct spi_board_info csb337_spi_devices[] = {
|
||||
{ /* CAN controller */
|
||||
.modalias = "sak82c900",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 6 * 1000 * 1000,
|
||||
},
|
||||
};
|
||||
|
||||
#define CSB_FLASH_BASE AT91_CHIPSELECT_0
|
||||
#define CSB_FLASH_SIZE SZ_8M
|
||||
|
||||
static struct mtd_partition csb_flash_partitions[] = {
|
||||
{
|
||||
.name = "uMON flash",
|
||||
.offset = 0,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.mask_flags = MTD_WRITEABLE, /* read only */
|
||||
}
|
||||
};
|
||||
|
||||
static struct physmap_flash_data csb_flash_data = {
|
||||
.width = 2,
|
||||
.parts = csb_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(csb_flash_partitions),
|
||||
};
|
||||
|
||||
static struct resource csb_flash_resources[] = {
|
||||
{
|
||||
.start = CSB_FLASH_BASE,
|
||||
.end = CSB_FLASH_BASE + CSB_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device csb_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &csb_flash_data,
|
||||
},
|
||||
.resource = csb_flash_resources,
|
||||
.num_resources = ARRAY_SIZE(csb_flash_resources),
|
||||
};
|
||||
|
||||
/*
|
||||
* GPIO Buttons (on CSB300)
|
||||
*/
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button csb300_buttons[] = {
|
||||
{
|
||||
.gpio = AT91_PIN_PB29,
|
||||
.code = BTN_0,
|
||||
.desc = "sw0",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PB28,
|
||||
.code = BTN_1,
|
||||
.desc = "sw1",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PA21,
|
||||
.code = BTN_2,
|
||||
.desc = "sw2",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data csb300_button_data = {
|
||||
.buttons = csb300_buttons,
|
||||
.nbuttons = ARRAY_SIZE(csb300_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device csb300_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &csb300_button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init csb300_add_device_buttons(void)
|
||||
{
|
||||
at91_set_gpio_input(AT91_PIN_PB29, 1); /* sw0 */
|
||||
at91_set_deglitch(AT91_PIN_PB29, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PB28, 1); /* sw1 */
|
||||
at91_set_deglitch(AT91_PIN_PB28, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PA21, 1); /* sw2 */
|
||||
at91_set_deglitch(AT91_PIN_PA21, 1);
|
||||
|
||||
platform_device_register(&csb300_button_device);
|
||||
}
|
||||
#else
|
||||
static void __init csb300_add_device_buttons(void) {}
|
||||
#endif
|
||||
|
||||
static struct gpio_led csb_leds[] = {
|
||||
{ /* "led0", yellow */
|
||||
.name = "led0",
|
||||
.gpio = AT91_PIN_PB2,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* "led1", green */
|
||||
.name = "led1",
|
||||
.gpio = AT91_PIN_PB1,
|
||||
.active_low = 1,
|
||||
.default_trigger = "mmc0",
|
||||
},
|
||||
{ /* "led2", yellow */
|
||||
.name = "led2",
|
||||
.gpio = AT91_PIN_PB0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "ide-disk",
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
static void __init csb337_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0 */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&csb337_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&csb337_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&csb337_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(csb337_i2c_devices, ARRAY_SIZE(csb337_i2c_devices));
|
||||
/* Compact Flash */
|
||||
at91_set_gpio_input(AT91_PIN_PB22, 1); /* IOIS16 */
|
||||
at91_add_device_cf(&csb337_cf_data);
|
||||
/* SPI */
|
||||
at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &csb337_mci0_data);
|
||||
/* NOR flash */
|
||||
platform_device_register(&csb_flash);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
|
||||
/* Switches on CSB300 */
|
||||
csb300_add_device_buttons();
|
||||
}
|
||||
|
||||
MACHINE_START(CSB337, "Cogent CSB337")
|
||||
/* Maintainer: Bill Gatliff */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = csb337_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = csb337_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,142 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-csb637.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init csb637_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 3.6864 MHz crystal */
|
||||
at91_initialize(3686400);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata csb637_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC0,
|
||||
.is_rmii = 0,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata csb637_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata csb637_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PB28,
|
||||
.pullup_pin = AT91_PIN_PB1,
|
||||
};
|
||||
|
||||
#define CSB_FLASH_BASE AT91_CHIPSELECT_0
|
||||
#define CSB_FLASH_SIZE SZ_16M
|
||||
|
||||
static struct mtd_partition csb_flash_partitions[] = {
|
||||
{
|
||||
.name = "uMON flash",
|
||||
.offset = 0,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.mask_flags = MTD_WRITEABLE, /* read only */
|
||||
}
|
||||
};
|
||||
|
||||
static struct physmap_flash_data csb_flash_data = {
|
||||
.width = 2,
|
||||
.parts = csb_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(csb_flash_partitions),
|
||||
};
|
||||
|
||||
static struct resource csb_flash_resources[] = {
|
||||
{
|
||||
.start = CSB_FLASH_BASE,
|
||||
.end = CSB_FLASH_BASE + CSB_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device csb_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &csb_flash_data,
|
||||
},
|
||||
.resource = csb_flash_resources,
|
||||
.num_resources = ARRAY_SIZE(csb_flash_resources),
|
||||
};
|
||||
|
||||
static struct gpio_led csb_leds[] = {
|
||||
{ /* "d1", red */
|
||||
.name = "d1",
|
||||
.gpio = AT91_PIN_PB2,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
};
|
||||
|
||||
static void __init csb637_board_init(void)
|
||||
{
|
||||
/* LED(s) */
|
||||
at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&csb637_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&csb637_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&csb637_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* SPI */
|
||||
at91_add_device_spi(NULL, 0);
|
||||
/* NOR flash */
|
||||
platform_device_register(&csb_flash);
|
||||
}
|
||||
|
||||
MACHINE_START(CSB637, "Cogent CSB637")
|
||||
/* Maintainer: Bill Gatliff */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = csb637_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = csb637_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -22,14 +22,11 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "generic.h"
|
||||
|
||||
static void __init at91rm9200_dt_timer_init(void)
|
||||
{
|
||||
#if defined(CONFIG_COMMON_CLK)
|
||||
of_clk_init(NULL);
|
||||
#endif
|
||||
at91rm9200_timer_init();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,8 +21,6 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
|
||||
static const char *at91_dt_board_compat[] __initdata = {
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "generic.h"
|
||||
|
||||
static void __init sama5_dt_device_init(void)
|
||||
|
|
|
|||
|
|
@ -1,126 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-eb9200.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People, adapted for ATEB9200 from Embest
|
||||
* by Andrew Patrikalakis
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/device.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init eb9200_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata eb9200_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata eb9200_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata eb9200_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PD4,
|
||||
.pullup_pin = AT91_PIN_PD5,
|
||||
};
|
||||
|
||||
static struct at91_cf_data __initdata eb9200_cf_data = {
|
||||
.irq_pin = -EINVAL,
|
||||
.det_pin = AT91_PIN_PB0,
|
||||
.vcc_pin = -EINVAL,
|
||||
.rst_pin = AT91_PIN_PC5,
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata eb9200_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -EINVAL,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("24c512", 0x50),
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static void __init eb9200_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART2 on ttyS2. (Rx, Tx) - IRDA */
|
||||
at91_register_uart(AT91RM9200_ID_US2, 2, 0);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&eb9200_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&eb9200_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&eb9200_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(eb9200_i2c_devices, ARRAY_SIZE(eb9200_i2c_devices));
|
||||
/* Compact Flash */
|
||||
at91_add_device_cf(&eb9200_cf_data);
|
||||
/* SPI */
|
||||
at91_add_device_spi(NULL, 0);
|
||||
/* MMC */
|
||||
/* only supports 1 or 4 bit interface, not wired through to SPI */
|
||||
at91_add_device_mci(0, &eb9200_mci0_data);
|
||||
}
|
||||
|
||||
MACHINE_START(ATEB9200, "Embest ATEB9200")
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = eb9200_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = eb9200_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,191 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91rm9200/board-ecbat91.c
|
||||
* Copyright (C) 2007 emQbit.com.
|
||||
*
|
||||
* We started from board-dk.c, which is Copyright (C) 2005 SAN People.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init ecb_at91init_early(void)
|
||||
{
|
||||
/* Set cpu type: PQFP */
|
||||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata ecb_at91eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 0,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata ecb_at91usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata ecbat91_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -EINVAL,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
#if defined(CONFIG_MTD_DATAFLASH)
|
||||
static struct mtd_partition __initdata my_flash0_partitions[] =
|
||||
{
|
||||
{ /* 0x8400 */
|
||||
.name = "Darrell-loader",
|
||||
.offset = 0,
|
||||
.size = 12 * 1056,
|
||||
},
|
||||
{
|
||||
.name = "U-boot",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = 110 * 1056,
|
||||
},
|
||||
{ /* 1336 (167 blocks) pages * 1056 bytes = 0x158700 bytes */
|
||||
.name = "UBoot-env",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = 8 * 1056,
|
||||
},
|
||||
{ /* 1336 (167 blocks) pages * 1056 bytes = 0x158700 bytes */
|
||||
.name = "Kernel",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = 1534 * 1056,
|
||||
},
|
||||
{ /* 190200 - jffs2 root filesystem */
|
||||
.name = "Filesystem",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL, /* 26 sectors */
|
||||
}
|
||||
};
|
||||
|
||||
static struct flash_platform_data __initdata my_flash0_platform = {
|
||||
.name = "Removable flash card",
|
||||
.parts = my_flash0_partitions,
|
||||
.nr_parts = ARRAY_SIZE(my_flash0_partitions)
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
static struct spi_board_info __initdata ecb_at91spi_devices[] = {
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
#if defined(CONFIG_MTD_DATAFLASH)
|
||||
.platform_data = &my_flash0_platform,
|
||||
#endif
|
||||
},
|
||||
{ /* User accessible spi - cs1 (250KHz) */
|
||||
.modalias = "spi-cs1",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 250 * 1000,
|
||||
},
|
||||
{ /* User accessible spi - cs2 (1MHz) */
|
||||
.modalias = "spi-cs2",
|
||||
.chip_select = 2,
|
||||
.max_speed_hz = 1 * 1000 * 1000,
|
||||
},
|
||||
{ /* User accessible spi - cs3 (10MHz) */
|
||||
.modalias = "spi-cs3",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led ecb_leds[] = {
|
||||
{ /* D1 */
|
||||
.name = "led1",
|
||||
.gpio = AT91_PIN_PC7,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ecb_at91board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx & Tx only) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
|
||||
at91_add_device_serial();
|
||||
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&ecb_at91eth_data);
|
||||
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ecb_at91usbh_data);
|
||||
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &ecbat91_mci0_data);
|
||||
|
||||
/* SPI */
|
||||
at91_add_device_spi(ecb_at91spi_devices, ARRAY_SIZE(ecb_at91spi_devices));
|
||||
|
||||
/* LEDs */
|
||||
at91_gpio_leds(ecb_leds, ARRAY_SIZE(ecb_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
|
||||
/* Maintainer: emQbit.com */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ecb_at91init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ecb_at91board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,160 +0,0 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <mach/at91rm9200_mc.h>
|
||||
#include <mach/at91_ramc.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init eco920_init_early(void)
|
||||
{
|
||||
/* Set cpu type: PQFP */
|
||||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata eco920_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC2,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata eco920_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata eco920_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PB12,
|
||||
.pullup_pin = AT91_PIN_PB13,
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata eco920_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 1,
|
||||
.detect_pin = -EINVAL,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data eco920_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource eco920_flash_resource = {
|
||||
.start = 0x11000000,
|
||||
.end = 0x11ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device eco920_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &eco920_flash_data,
|
||||
},
|
||||
.resource = &eco920_flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
static struct spi_board_info eco920_spi_devices[] = {
|
||||
{ /* CAN controller */
|
||||
.modalias = "tlv5638",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 20 * 1000 * 1000,
|
||||
.mode = SPI_CPHA,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led eco920_leds[] = {
|
||||
{ /* D1 */
|
||||
.name = "led1",
|
||||
.gpio = AT91_PIN_PB0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* D2 */
|
||||
.name = "led2",
|
||||
.gpio = AT91_PIN_PB1,
|
||||
.active_low = 1,
|
||||
.default_trigger = "timer",
|
||||
}
|
||||
};
|
||||
|
||||
static void __init eco920_board_init(void)
|
||||
{
|
||||
/* DBGU on ttyS0. (Rx & Tx only */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
at91_add_device_eth(&eco920_eth_data);
|
||||
at91_add_device_usbh(&eco920_usbh_data);
|
||||
at91_add_device_udc(&eco920_udc_data);
|
||||
|
||||
at91_add_device_mci(0, &eco920_mci0_data);
|
||||
platform_device_register(&eco920_flash);
|
||||
|
||||
at91_ramc_write(0, AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1)
|
||||
| AT91_SMC_RWSETUP_(1)
|
||||
| AT91_SMC_DBW_8
|
||||
| AT91_SMC_WSEN
|
||||
| AT91_SMC_NWS_(15));
|
||||
|
||||
at91_set_A_periph(AT91_PIN_PC6, 1);
|
||||
|
||||
at91_set_gpio_input(AT91_PIN_PA23, 0);
|
||||
at91_set_deglitch(AT91_PIN_PA23, 1);
|
||||
|
||||
/* Initialization of the Static Memory Controller for Chip Select 3 */
|
||||
at91_ramc_write(0, AT91_SMC_CSR(3),
|
||||
AT91_SMC_DBW_16 | /* 16 bit */
|
||||
AT91_SMC_WSEN |
|
||||
AT91_SMC_NWS_(5) | /* wait states */
|
||||
AT91_SMC_TDF_(1) /* float time */
|
||||
);
|
||||
|
||||
at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices));
|
||||
/* LEDs */
|
||||
at91_gpio_leds(eco920_leds, ARRAY_SIZE(eco920_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(ECO920, "eco920")
|
||||
/* Maintainer: Sascha Hauer */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = eco920_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = eco920_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,171 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-flexibity.c
|
||||
*
|
||||
* Copyright (C) 2010-2011 Flexibity
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2006 Atmel
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
static void __init flexibity_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/* USB Host port */
|
||||
static struct at91_usbh_data __initdata flexibity_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/* USB Device port */
|
||||
static struct at91_udc_data __initdata flexibity_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC5,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
/* I2C devices */
|
||||
static struct i2c_board_info __initdata flexibity_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("ds1307", 0x68),
|
||||
},
|
||||
};
|
||||
|
||||
/* SPI devices */
|
||||
static struct spi_board_info flexibity_spi_devices[] = {
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
};
|
||||
|
||||
/* MCI (SD/MMC) */
|
||||
static struct mci_platform_data __initdata flexibity_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PC9,
|
||||
.wp_pin = AT91_PIN_PC4,
|
||||
},
|
||||
};
|
||||
|
||||
/* LEDs */
|
||||
static struct gpio_led flexibity_leds[] = {
|
||||
{
|
||||
.name = "usb1:green",
|
||||
.gpio = AT91_PIN_PA12,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
.name = "usb1:red",
|
||||
.gpio = AT91_PIN_PA13,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
.name = "usb2:green",
|
||||
.gpio = AT91_PIN_PB26,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
.name = "usb2:red",
|
||||
.gpio = AT91_PIN_PB27,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
.name = "usb3:green",
|
||||
.gpio = AT91_PIN_PC8,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
.name = "usb3:red",
|
||||
.gpio = AT91_PIN_PC6,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
.name = "usb4:green",
|
||||
.gpio = AT91_PIN_PB4,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
},
|
||||
{
|
||||
.name = "usb4:red",
|
||||
.gpio = AT91_PIN_PB5,
|
||||
.active_low = 1,
|
||||
.default_trigger = "default-on",
|
||||
}
|
||||
};
|
||||
|
||||
static void __init flexibity_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&flexibity_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&flexibity_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(flexibity_i2c_devices,
|
||||
ARRAY_SIZE(flexibity_i2c_devices));
|
||||
/* SPI */
|
||||
at91_add_device_spi(flexibity_spi_devices,
|
||||
ARRAY_SIZE(flexibity_spi_devices));
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &flexibity_mci0_data);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(flexibity_leds, ARRAY_SIZE(flexibity_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(FLEXIBITY, "Flexibity Connect")
|
||||
/* Maintainer: Maxim Osipov */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = flexibity_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = flexibity_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,585 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
|
||||
* taskit GmbH
|
||||
* 2010 Igor Plyatov <plyatov@gmail.com>
|
||||
* GeoSIG Ltd
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/w1-gpio.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/pcf857x.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gsia18s.h"
|
||||
#include "stamp9g20.h"
|
||||
#include "gpio.h"
|
||||
|
||||
static void __init gsia18s_init_early(void)
|
||||
{
|
||||
stamp9g20_init_early();
|
||||
}
|
||||
|
||||
/*
|
||||
* Two USB Host ports
|
||||
*/
|
||||
static struct at91_usbh_data __initdata usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata udc_data = {
|
||||
.vbus_pin = AT91_PIN_PA22,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PA28,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* LEDs and GPOs
|
||||
*/
|
||||
static struct gpio_led gpio_leds[] = {
|
||||
{
|
||||
.name = "gpo:spi1reset",
|
||||
.gpio = AT91_PIN_PC1,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{
|
||||
.name = "gpo:trig_net_out",
|
||||
.gpio = AT91_PIN_PB20,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{
|
||||
.name = "gpo:trig_net_dir",
|
||||
.gpio = AT91_PIN_PB19,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{
|
||||
.name = "gpo:charge_dis",
|
||||
.gpio = AT91_PIN_PC2,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{
|
||||
.name = "led:event",
|
||||
.gpio = AT91_PIN_PB17,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{
|
||||
.name = "led:lan",
|
||||
.gpio = AT91_PIN_PB18,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{
|
||||
.name = "led:error",
|
||||
.gpio = AT91_PIN_PB16,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_ON,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data gpio_led_info = {
|
||||
.leds = gpio_leds,
|
||||
.num_leds = ARRAY_SIZE(gpio_leds),
|
||||
};
|
||||
|
||||
static struct platform_device leds = {
|
||||
.name = "leds-gpio",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &gpio_led_info,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init gsia18s_leds_init(void)
|
||||
{
|
||||
platform_device_register(&leds);
|
||||
}
|
||||
|
||||
/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */
|
||||
static struct gpio_led pcf_gpio_leds1[] = {
|
||||
{ /* bit 0 */
|
||||
.name = "gpo:hdc_power",
|
||||
.gpio = PCF_GPIO_HDC_POWER,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{ /* bit 1 */
|
||||
.name = "gpo:wifi_setup",
|
||||
.gpio = PCF_GPIO_WIFI_SETUP,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{ /* bit 2 */
|
||||
.name = "gpo:wifi_enable",
|
||||
.gpio = PCF_GPIO_WIFI_ENABLE,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{ /* bit 3 */
|
||||
.name = "gpo:wifi_reset",
|
||||
.gpio = PCF_GPIO_WIFI_RESET,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_ON,
|
||||
},
|
||||
/* bit 4 used as GPI */
|
||||
{ /* bit 5 */
|
||||
.name = "gpo:gps_setup",
|
||||
.gpio = PCF_GPIO_GPS_SETUP,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{ /* bit 6 */
|
||||
.name = "gpo:gps_standby",
|
||||
.gpio = PCF_GPIO_GPS_STANDBY,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_ON,
|
||||
},
|
||||
{ /* bit 7 */
|
||||
.name = "gpo:gps_power",
|
||||
.gpio = PCF_GPIO_GPS_POWER,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data pcf_gpio_led_info1 = {
|
||||
.leds = pcf_gpio_leds1,
|
||||
.num_leds = ARRAY_SIZE(pcf_gpio_leds1),
|
||||
};
|
||||
|
||||
static struct platform_device pcf_leds1 = {
|
||||
.name = "leds-gpio", /* GS_IA18-CB_board */
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &pcf_gpio_led_info1,
|
||||
}
|
||||
};
|
||||
|
||||
/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
|
||||
static struct gpio_led pcf_gpio_leds2[] = {
|
||||
{ /* bit 0 */
|
||||
.name = "gpo:alarm_1",
|
||||
.gpio = PCF_GPIO_ALARM1,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{ /* bit 1 */
|
||||
.name = "gpo:alarm_2",
|
||||
.gpio = PCF_GPIO_ALARM2,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{ /* bit 2 */
|
||||
.name = "gpo:alarm_3",
|
||||
.gpio = PCF_GPIO_ALARM3,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
{ /* bit 3 */
|
||||
.name = "gpo:alarm_4",
|
||||
.gpio = PCF_GPIO_ALARM4,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
/* bits 4, 5, 6 not used */
|
||||
{ /* bit 7 */
|
||||
.name = "gpo:alarm_v_relay_on",
|
||||
.gpio = PCF_GPIO_ALARM_V_RELAY_ON,
|
||||
.active_low = 0,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data pcf_gpio_led_info2 = {
|
||||
.leds = pcf_gpio_leds2,
|
||||
.num_leds = ARRAY_SIZE(pcf_gpio_leds2),
|
||||
};
|
||||
|
||||
static struct platform_device pcf_leds2 = {
|
||||
.name = "leds-gpio",
|
||||
.id = 2,
|
||||
.dev = {
|
||||
.platform_data = &pcf_gpio_led_info2,
|
||||
}
|
||||
};
|
||||
|
||||
/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */
|
||||
static struct gpio_led pcf_gpio_leds3[] = {
|
||||
{ /* bit 0 */
|
||||
.name = "gpo:modem_power",
|
||||
.gpio = PCF_GPIO_MODEM_POWER,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_OFF,
|
||||
},
|
||||
/* bits 1 and 2 not used */
|
||||
{ /* bit 3 */
|
||||
.name = "gpo:modem_reset",
|
||||
.gpio = PCF_GPIO_MODEM_RESET,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_ON,
|
||||
},
|
||||
/* bits 4, 5 and 6 not used */
|
||||
{ /* bit 7 */
|
||||
.name = "gpo:trx_reset",
|
||||
.gpio = PCF_GPIO_TRX_RESET,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
.default_state = LEDS_GPIO_DEFSTATE_ON,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data pcf_gpio_led_info3 = {
|
||||
.leds = pcf_gpio_leds3,
|
||||
.num_leds = ARRAY_SIZE(pcf_gpio_leds3),
|
||||
};
|
||||
|
||||
static struct platform_device pcf_leds3 = {
|
||||
.name = "leds-gpio",
|
||||
.id = 3,
|
||||
.dev = {
|
||||
.platform_data = &pcf_gpio_led_info3,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init gsia18s_pcf_leds_init(void)
|
||||
{
|
||||
platform_device_register(&pcf_leds1);
|
||||
platform_device_register(&pcf_leds2);
|
||||
platform_device_register(&pcf_leds3);
|
||||
}
|
||||
|
||||
/*
|
||||
* SPI busses.
|
||||
*/
|
||||
static struct spi_board_info gsia18s_spi_devices[] = {
|
||||
{ /* User accessible spi0, cs0 used for communication with MSP RTC */
|
||||
.modalias = "spidev",
|
||||
.bus_num = 0,
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 580000,
|
||||
.mode = SPI_MODE_1,
|
||||
},
|
||||
{ /* User accessible spi1, cs0 used for communication with int. DSP */
|
||||
.modalias = "spidev",
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 5600000,
|
||||
.mode = SPI_MODE_0,
|
||||
},
|
||||
{ /* User accessible spi1, cs1 used for communication with ext. DSP */
|
||||
.modalias = "spidev",
|
||||
.bus_num = 1,
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 5600000,
|
||||
.mode = SPI_MODE_0,
|
||||
},
|
||||
{ /* User accessible spi1, cs2 used for communication with ext. DSP */
|
||||
.modalias = "spidev",
|
||||
.bus_num = 1,
|
||||
.chip_select = 2,
|
||||
.max_speed_hz = 5600000,
|
||||
.mode = SPI_MODE_0,
|
||||
},
|
||||
{ /* User accessible spi1, cs3 used for communication with ext. DSP */
|
||||
.modalias = "spidev",
|
||||
.bus_num = 1,
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 5600000,
|
||||
.mode = SPI_MODE_0,
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* GPI Buttons
|
||||
*/
|
||||
static struct gpio_keys_button buttons[] = {
|
||||
{
|
||||
.gpio = GPIO_TRIG_NET_IN,
|
||||
.code = BTN_1,
|
||||
.desc = "TRIG_NET_IN",
|
||||
.type = EV_KEY,
|
||||
.active_low = 0,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{ /* SW80 on the GS_IA18_S-MN board*/
|
||||
.gpio = GPIO_CARD_UNMOUNT_0,
|
||||
.code = BTN_2,
|
||||
.desc = "Card umount 0",
|
||||
.type = EV_KEY,
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{ /* SW79 on the GS_IA18_S-MN board*/
|
||||
.gpio = GPIO_CARD_UNMOUNT_1,
|
||||
.code = BTN_3,
|
||||
.desc = "Card umount 1",
|
||||
.type = EV_KEY,
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{ /* SW280 on the GS_IA18-CB board*/
|
||||
.gpio = GPIO_KEY_POWER,
|
||||
.code = KEY_POWER,
|
||||
.desc = "Power Off Button",
|
||||
.type = EV_KEY,
|
||||
.active_low = 0,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data button_data = {
|
||||
.buttons = buttons,
|
||||
.nbuttons = ARRAY_SIZE(buttons),
|
||||
};
|
||||
|
||||
static struct platform_device button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init gsia18s_add_device_buttons(void)
|
||||
{
|
||||
at91_set_gpio_input(GPIO_TRIG_NET_IN, 1);
|
||||
at91_set_deglitch(GPIO_TRIG_NET_IN, 1);
|
||||
at91_set_gpio_input(GPIO_CARD_UNMOUNT_0, 1);
|
||||
at91_set_deglitch(GPIO_CARD_UNMOUNT_0, 1);
|
||||
at91_set_gpio_input(GPIO_CARD_UNMOUNT_1, 1);
|
||||
at91_set_deglitch(GPIO_CARD_UNMOUNT_1, 1);
|
||||
at91_set_gpio_input(GPIO_KEY_POWER, 0);
|
||||
at91_set_deglitch(GPIO_KEY_POWER, 1);
|
||||
|
||||
platform_device_register(&button_device);
|
||||
}
|
||||
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
static int pcf8574x_0x20_setup(struct i2c_client *client, int gpio,
|
||||
unsigned int ngpio, void *context)
|
||||
{
|
||||
int status;
|
||||
|
||||
status = gpio_request(gpio + PCF_GPIO_ETH_DETECT, "eth_det");
|
||||
if (status < 0) {
|
||||
pr_err("error: can't request GPIO%d\n",
|
||||
gpio + PCF_GPIO_ETH_DETECT);
|
||||
return status;
|
||||
}
|
||||
status = gpio_direction_input(gpio + PCF_GPIO_ETH_DETECT);
|
||||
if (status < 0) {
|
||||
pr_err("error: can't setup GPIO%d as input\n",
|
||||
gpio + PCF_GPIO_ETH_DETECT);
|
||||
return status;
|
||||
}
|
||||
status = gpio_export(gpio + PCF_GPIO_ETH_DETECT, false);
|
||||
if (status < 0) {
|
||||
pr_err("error: can't export GPIO%d\n",
|
||||
gpio + PCF_GPIO_ETH_DETECT);
|
||||
return status;
|
||||
}
|
||||
status = gpio_sysfs_set_active_low(gpio + PCF_GPIO_ETH_DETECT, 1);
|
||||
if (status < 0) {
|
||||
pr_err("error: gpio_sysfs_set active_low(GPIO%d, 1)\n",
|
||||
gpio + PCF_GPIO_ETH_DETECT);
|
||||
return status;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pcf8574x_0x20_teardown(struct i2c_client *client, int gpio,
|
||||
unsigned ngpio, void *context)
|
||||
{
|
||||
gpio_free(gpio + PCF_GPIO_ETH_DETECT);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct pcf857x_platform_data pcf20_pdata = {
|
||||
.gpio_base = GS_IA18_S_PCF_GPIO_BASE0,
|
||||
.n_latch = (1 << 4),
|
||||
.setup = pcf8574x_0x20_setup,
|
||||
.teardown = pcf8574x_0x20_teardown,
|
||||
};
|
||||
|
||||
static struct pcf857x_platform_data pcf22_pdata = {
|
||||
.gpio_base = GS_IA18_S_PCF_GPIO_BASE1,
|
||||
};
|
||||
|
||||
static struct pcf857x_platform_data pcf24_pdata = {
|
||||
.gpio_base = GS_IA18_S_PCF_GPIO_BASE2,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
|
||||
{ /* U1 on the GS_IA18-CB_V3 board */
|
||||
I2C_BOARD_INFO("pcf8574", 0x20),
|
||||
.platform_data = &pcf20_pdata,
|
||||
},
|
||||
{ /* U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
|
||||
I2C_BOARD_INFO("pcf8574", 0x22),
|
||||
.platform_data = &pcf22_pdata,
|
||||
},
|
||||
{ /* U1 on the GS_2G-OPT23-A_V0 board (Modem) */
|
||||
I2C_BOARD_INFO("pcf8574", 0x24),
|
||||
.platform_data = &pcf24_pdata,
|
||||
},
|
||||
{ /* U161 on the GS_IA18_S-MN board */
|
||||
I2C_BOARD_INFO("24c1024", 0x50),
|
||||
},
|
||||
{ /* U162 on the GS_IA18_S-MN board */
|
||||
I2C_BOARD_INFO("24c01", 0x53),
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Compact Flash
|
||||
*/
|
||||
static struct at91_cf_data __initdata gsia18s_cf1_data = {
|
||||
.irq_pin = AT91_PIN_PA27,
|
||||
.det_pin = AT91_PIN_PB30,
|
||||
.vcc_pin = -EINVAL,
|
||||
.rst_pin = AT91_PIN_PB31,
|
||||
.chipselect = 5,
|
||||
.flags = AT91_CF_TRUE_IDE,
|
||||
};
|
||||
|
||||
/* Power Off by RTC */
|
||||
static void gsia18s_power_off(void)
|
||||
{
|
||||
pr_notice("Power supply will be switched off automatically now or after 60 seconds without ArmDAS.\n");
|
||||
at91_set_gpio_output(AT91_PIN_PA25, 1);
|
||||
/* Spin to death... */
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
static int __init gsia18s_power_off_init(void)
|
||||
{
|
||||
pm_power_off = gsia18s_power_off;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ---------------------------------------------------------------------------*/
|
||||
|
||||
static void __init gsia18s_board_init(void)
|
||||
{
|
||||
/*
|
||||
* USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
|
||||
* Used for Internal Analog Modem.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS |
|
||||
ATMEL_UART_DTR | ATMEL_UART_DSR |
|
||||
ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
/*
|
||||
* USART1 on ttyS2 (Rx, Tx, CTS, RTS).
|
||||
* Used for GPS or WiFi or Data stream.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
/*
|
||||
* USART2 on ttyS3 (Rx, Tx, CTS, RTS).
|
||||
* Used for External Modem.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
/*
|
||||
* USART3 on ttyS4 (Rx, Tx, RTS).
|
||||
* Used for RS-485.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
|
||||
|
||||
/*
|
||||
* USART4 on ttyS5 (Rx, Tx).
|
||||
* Used for TRX433 Radio Module.
|
||||
*/
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
stamp9g20_board_init();
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
at91_add_device_udc(&udc_data);
|
||||
at91_add_device_eth(&macb_data);
|
||||
gsia18s_leds_init();
|
||||
gsia18s_pcf_leds_init();
|
||||
gsia18s_add_device_buttons();
|
||||
at91_add_device_i2c(gsia18s_i2c_devices,
|
||||
ARRAY_SIZE(gsia18s_i2c_devices));
|
||||
at91_add_device_cf(&gsia18s_cf1_data);
|
||||
at91_add_device_spi(gsia18s_spi_devices,
|
||||
ARRAY_SIZE(gsia18s_spi_devices));
|
||||
gsia18s_power_off_init();
|
||||
}
|
||||
|
||||
MACHINE_START(GSIA18S, "GS_IA18_S")
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = gsia18s_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = gsia18s_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,113 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-kafa.c
|
||||
*
|
||||
* Copyright (C) 2006 Sperry-Sun
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init kafa_init_early(void)
|
||||
{
|
||||
/* Set cpu type: PQFP */
|
||||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata kafa_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 0,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata kafa_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata kafa_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PB6,
|
||||
.pullup_pin = AT91_PIN_PB7,
|
||||
};
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led kafa_leds[] = {
|
||||
{ /* D1 */
|
||||
.name = "led1",
|
||||
.gpio = AT91_PIN_PB4,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
};
|
||||
|
||||
static void __init kafa_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&kafa_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&kafa_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&kafa_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* SPI */
|
||||
at91_add_device_spi(NULL, 0);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(kafa_leds, ARRAY_SIZE(kafa_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(KAFA, "Sperry-Sun KAFA")
|
||||
/* Maintainer: Sergei Sharonov */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = kafa_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = kafa_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,159 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-kb9202.c
|
||||
*
|
||||
* Copyright (c) 2005 kb_admin
|
||||
* KwikByte, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/cpu.h>
|
||||
#include <mach/at91rm9200_mc.h>
|
||||
#include <mach/at91_ramc.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init kb9202_init_early(void)
|
||||
{
|
||||
/* Set cpu type: PQFP */
|
||||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
/* Initialize processor: 10 MHz crystal */
|
||||
at91_initialize(10000000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata kb9202_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PB29,
|
||||
.is_rmii = 0,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata kb9202_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata kb9202_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PB24,
|
||||
.pullup_pin = AT91_PIN_PB22,
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata kb9202_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PB2,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition __initdata kb9202_nand_partition[] = {
|
||||
{
|
||||
.name = "nand_fs",
|
||||
.offset = 0,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata kb9202_nand_data = {
|
||||
.ale = 22,
|
||||
.cle = 21,
|
||||
.det_pin = -EINVAL,
|
||||
.rdy_pin = AT91_PIN_PC29,
|
||||
.enable_pin = AT91_PIN_PC28,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.parts = kb9202_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(kb9202_nand_partition),
|
||||
};
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led kb9202_leds[] = {
|
||||
{ /* D1 */
|
||||
.name = "led1",
|
||||
.gpio = AT91_PIN_PC19,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* D2 */
|
||||
.name = "led2",
|
||||
.gpio = AT91_PIN_PC18,
|
||||
.active_low = 1,
|
||||
.default_trigger = "timer",
|
||||
}
|
||||
};
|
||||
|
||||
static void __init kb9202_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1 (Rx & Tx only) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 1, 0);
|
||||
|
||||
/* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 2, 0);
|
||||
|
||||
/* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&kb9202_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&kb9202_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&kb9202_udc_data);
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &kb9202_mci0_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* SPI */
|
||||
at91_add_device_spi(NULL, 0);
|
||||
/* NAND */
|
||||
at91_add_device_nand(&kb9202_nand_data);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(kb9202_leds, ARRAY_SIZE(kb9202_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(KB9200, "KB920x")
|
||||
/* Maintainer: KwikByte, Inc. */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = kb9202_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = kb9202_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,228 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
|
||||
* taskit GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
/*
|
||||
* copied and adjusted from board-stamp9g20.c
|
||||
* by Peter Gsellmann <pgsellmann@portner-elektronik.at>
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/w1-gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "stamp9g20.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init pcontrol_g20_init_early(void)
|
||||
{
|
||||
stamp9g20_init_early();
|
||||
}
|
||||
|
||||
static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
|
||||
.ncs_read_setup = 16,
|
||||
.nrd_setup = 18,
|
||||
.ncs_write_setup = 16,
|
||||
.nwe_setup = 18,
|
||||
|
||||
.ncs_read_pulse = 63,
|
||||
.nrd_pulse = 55,
|
||||
.ncs_write_pulse = 63,
|
||||
.nwe_pulse = 55,
|
||||
|
||||
.read_cycle = 127,
|
||||
.write_cycle = 127,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
|
||||
| AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT
|
||||
| AT91_SMC_DBW_8 | AT91_SMC_PS_4
|
||||
| AT91_SMC_TDFMODE,
|
||||
.tdf_cycles = 3,
|
||||
}, {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 0,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 8,
|
||||
.nrd_pulse = 8,
|
||||
.ncs_write_pulse = 5,
|
||||
.nwe_pulse = 4,
|
||||
|
||||
.read_cycle = 8,
|
||||
.write_cycle = 7,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
|
||||
| AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT
|
||||
| AT91_SMC_DBW_16 | AT91_SMC_PS_8
|
||||
| AT91_SMC_TDFMODE,
|
||||
.tdf_cycles = 1,
|
||||
} };
|
||||
|
||||
static void __init add_device_pcontrol(void)
|
||||
{
|
||||
/* configure chip-select 4 (IO compatible to 8051 X4 ) */
|
||||
sam9_smc_configure(0, 4, &pcontrol_smc_config[0]);
|
||||
/* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */
|
||||
sam9_smc_configure(0, 7, &pcontrol_smc_config[1]);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata pcontrol_g20_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PA22, /* Detect +5V bus voltage */
|
||||
.pullup_pin = AT91_PIN_PA4, /* K-state, active low */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PA28,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* I2C devices: eeprom and phy/switch
|
||||
*/
|
||||
static struct i2c_board_info __initdata pcontrol_g20_i2c_devices[] = {
|
||||
{ /* D7 address width=2, 8KiB */
|
||||
I2C_BOARD_INFO("24c64", 0x50)
|
||||
}, { /* D8 address width=1, 1 byte has 32 bits! */
|
||||
I2C_BOARD_INFO("lan9303", 0x0a)
|
||||
}, };
|
||||
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led pcontrol_g20_leds[] = {
|
||||
{
|
||||
.name = "LED1", /* red H5 */
|
||||
.gpio = AT91_PIN_PB18,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none", /* supervisor */
|
||||
}, {
|
||||
.name = "LED2", /* yellow H7 */
|
||||
.gpio = AT91_PIN_PB19,
|
||||
.active_low = 1,
|
||||
.default_trigger = "mmc0", /* SD-card activity */
|
||||
}, {
|
||||
.name = "LED3", /* green H2 */
|
||||
.gpio = AT91_PIN_PB20,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat", /* blinky */
|
||||
}, {
|
||||
.name = "LED4", /* red H3 */
|
||||
.gpio = AT91_PIN_PC6,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none", /* connection lost */
|
||||
}, {
|
||||
.name = "LED5", /* yellow H6 */
|
||||
.gpio = AT91_PIN_PC7,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none", /* unsent data */
|
||||
}, {
|
||||
.name = "LED6", /* green H1 */
|
||||
.gpio = AT91_PIN_PC9,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none", /* snafu */
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* SPI devices
|
||||
*/
|
||||
static struct spi_board_info pcontrol_g20_spi_devices[] = {
|
||||
{
|
||||
.modalias = "spidev", /* HMI port X4 */
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 50 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
}, {
|
||||
.modalias = "spidev", /* piggyback A2 */
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 50 * 1000 * 1000,
|
||||
.bus_num = 1,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static void __init pcontrol_g20_board_init(void)
|
||||
{
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
|
||||
| ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
|
||||
stamp9g20_board_init();
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
at91_add_device_eth(&macb_data);
|
||||
at91_add_device_i2c(pcontrol_g20_i2c_devices,
|
||||
ARRAY_SIZE(pcontrol_g20_i2c_devices));
|
||||
add_device_pcontrol();
|
||||
at91_add_device_spi(pcontrol_g20_spi_devices,
|
||||
ARRAY_SIZE(pcontrol_g20_spi_devices));
|
||||
at91_add_device_udc(&pcontrol_g20_udc_data);
|
||||
at91_gpio_leds(pcontrol_g20_leds,
|
||||
ARRAY_SIZE(pcontrol_g20_leds));
|
||||
/* piggyback A2 */
|
||||
at91_set_gpio_output(AT91_PIN_PB31, 1);
|
||||
}
|
||||
|
||||
|
||||
MACHINE_START(PCONTROL_G20, "PControl G20")
|
||||
/* Maintainer: pgsellmann@portner-elektronik.at */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = pcontrol_g20_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = pcontrol_g20_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,129 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-picotux200.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2007 Kleinhenz Elektronik GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/at91rm9200_mc.h>
|
||||
#include <mach/at91_ramc.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init picotux200_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata picotux200_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata picotux200_usbh_data = {
|
||||
.ports = 1,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct mci_platform_data __initdata picotux200_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PB27,
|
||||
.wp_pin = AT91_PIN_PA17,
|
||||
},
|
||||
};
|
||||
|
||||
#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0
|
||||
#define PICOTUX200_FLASH_SIZE SZ_4M
|
||||
|
||||
static struct physmap_flash_data picotux200_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource picotux200_flash_resource = {
|
||||
.start = PICOTUX200_FLASH_BASE,
|
||||
.end = PICOTUX200_FLASH_BASE + PICOTUX200_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device picotux200_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &picotux200_flash_data,
|
||||
},
|
||||
.resource = &picotux200_flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
static void __init picotux200_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&picotux200_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&picotux200_usbh_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* MMC */
|
||||
at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
|
||||
at91_add_device_mci(0, &picotux200_mci0_data);
|
||||
/* NOR Flash */
|
||||
platform_device_register(&picotux200_flash);
|
||||
}
|
||||
|
||||
MACHINE_START(PICOTUX2XX, "picotux 200")
|
||||
/* Maintainer: Kleinhenz Elektronik GmbH */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = picotux200_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = picotux200_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,196 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-rm9200ek.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
*
|
||||
* Epson S1D framebuffer glue code is:
|
||||
* Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91rm9200_mc.h>
|
||||
#include <mach/at91_ramc.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init ek_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct macb_platform_data __initdata ek_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PC4,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct at91_usbh_data __initdata ek_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata ek_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PD4,
|
||||
.pullup_pin = AT91_PIN_PD5,
|
||||
};
|
||||
|
||||
#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
|
||||
static struct mci_platform_data __initdata ek_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PB27,
|
||||
.wp_pin = AT91_PIN_PA17,
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct spi_board_info ek_spi_devices[] = {
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
},
|
||||
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
|
||||
{ /* DataFlash card */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata ek_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("ics1523", 0x26),
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("dac3550", 0x4d),
|
||||
}
|
||||
};
|
||||
|
||||
#define EK_FLASH_BASE AT91_CHIPSELECT_0
|
||||
#define EK_FLASH_SIZE SZ_8M
|
||||
|
||||
static struct physmap_flash_data ek_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource ek_flash_resource = {
|
||||
.start = EK_FLASH_BASE,
|
||||
.end = EK_FLASH_BASE + EK_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device ek_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &ek_flash_data,
|
||||
},
|
||||
.resource = &ek_flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
static struct gpio_led ek_leds[] = {
|
||||
{ /* "user led 1", DS2 */
|
||||
.name = "green",
|
||||
.gpio = AT91_PIN_PB0,
|
||||
.active_low = 1,
|
||||
.default_trigger = "mmc0",
|
||||
},
|
||||
{ /* "user led 2", DS4 */
|
||||
.name = "yellow",
|
||||
.gpio = AT91_PIN_PB1,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* "user led 3", DS6 */
|
||||
.name = "red",
|
||||
.gpio = AT91_PIN_PB2,
|
||||
.active_low = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&ek_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&ek_udc_data);
|
||||
at91_set_multi_drive(ek_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
|
||||
/* I2C */
|
||||
at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
|
||||
/* SPI */
|
||||
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
|
||||
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
|
||||
/* DataFlash card */
|
||||
at91_set_gpio_output(AT91_PIN_PB22, 0);
|
||||
#else
|
||||
/* MMC */
|
||||
at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
|
||||
at91_add_device_mci(0, &ek_mci0_data);
|
||||
#endif
|
||||
/* NOR Flash */
|
||||
platform_device_register(&ek_flash);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
|
||||
/* VGA */
|
||||
// ek_add_device_video();
|
||||
}
|
||||
|
||||
MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
|
||||
/* Maintainer: SAN People/Atmel */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,230 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-sam9-l9260.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2006 Atmel
|
||||
* Copyright (C) 2007 Olimex Ltd
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/at91sam9_smc.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init ek_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata ek_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata ek_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC5,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* SPI devices.
|
||||
*/
|
||||
static struct spi_board_info ek_spi_devices[] = {
|
||||
#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
|
||||
{ /* DataFlash card */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#endif
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata ek_macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PA7,
|
||||
.is_rmii = 0,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct mtd_partition __initdata ek_nand_partition[] = {
|
||||
{
|
||||
.name = "Bootloader Area",
|
||||
.offset = 0,
|
||||
.size = 10 * SZ_1M,
|
||||
},
|
||||
{
|
||||
.name = "User Area",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata ek_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.det_pin = -EINVAL,
|
||||
.rdy_pin = AT91_PIN_PC13,
|
||||
.enable_pin = AT91_PIN_PC14,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.parts = ek_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(ek_nand_partition),
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata ek_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 3,
|
||||
.nrd_pulse = 3,
|
||||
.ncs_write_pulse = 3,
|
||||
.nwe_pulse = 3,
|
||||
|
||||
.read_cycle = 5,
|
||||
.write_cycle = 5,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_nand(void)
|
||||
{
|
||||
/* configure chip-select 3 (NAND) */
|
||||
sam9_smc_configure(0, 3, &ek_nand_smc_config);
|
||||
|
||||
at91_add_device_nand(&ek_nand_data);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
*/
|
||||
static struct mci_platform_data __initdata ek_mci0_data = {
|
||||
.slot[1] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PC8,
|
||||
.wp_pin = AT91_PIN_PC4,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led ek_leds[] = {
|
||||
{ /* D1 */
|
||||
.name = "led1",
|
||||
.gpio = AT91_PIN_PA9,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* D2 */
|
||||
.name = "led2",
|
||||
.gpio = AT91_PIN_PA6,
|
||||
.active_low = 1,
|
||||
.default_trigger = "timer",
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&ek_udc_data);
|
||||
/* SPI */
|
||||
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
|
||||
/* NAND */
|
||||
ek_add_device_nand();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&ek_macb_data);
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &ek_mci0_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
|
||||
/* Maintainer: Olimex */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,354 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-sam9260ek.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2006 Atmel
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/at73c213.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/platform_data/at24.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/system_rev.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init ek_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata ek_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata ek_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC5,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Audio
|
||||
*/
|
||||
static struct at73c213_board_info at73c213_data = {
|
||||
.ssc_id = 0,
|
||||
.shortname = "AT91SAM9260-EK external DAC",
|
||||
};
|
||||
|
||||
#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
|
||||
static void __init at73c213_set_clk(struct at73c213_board_info *info)
|
||||
{
|
||||
struct clk *pck0;
|
||||
struct clk *plla;
|
||||
|
||||
pck0 = clk_get(NULL, "pck0");
|
||||
plla = clk_get(NULL, "plla");
|
||||
|
||||
/* AT73C213 MCK Clock */
|
||||
at91_set_B_periph(AT91_PIN_PC1, 0); /* PCK0 */
|
||||
|
||||
clk_set_parent(pck0, plla);
|
||||
clk_put(plla);
|
||||
|
||||
info->dac_clk = pck0;
|
||||
}
|
||||
#else
|
||||
static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SPI devices.
|
||||
*/
|
||||
static struct spi_board_info ek_spi_devices[] = {
|
||||
#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
|
||||
{ /* DataFlash card */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#endif
|
||||
#endif
|
||||
#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
|
||||
{ /* AT73C213 DAC */
|
||||
.modalias = "at73c213",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
.bus_num = 1,
|
||||
.mode = SPI_MODE_1,
|
||||
.platform_data = &at73c213_data,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata ek_macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PA7,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct mtd_partition __initdata ek_nand_partition[] = {
|
||||
{
|
||||
.name = "Partition 1",
|
||||
.offset = 0,
|
||||
.size = SZ_256K,
|
||||
},
|
||||
{
|
||||
.name = "Partition 2",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata ek_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.det_pin = -EINVAL,
|
||||
.rdy_pin = AT91_PIN_PC13,
|
||||
.enable_pin = AT91_PIN_PC14,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.on_flash_bbt = 1,
|
||||
.parts = ek_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(ek_nand_partition),
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata ek_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 3,
|
||||
.nrd_pulse = 3,
|
||||
.ncs_write_pulse = 3,
|
||||
.nwe_pulse = 3,
|
||||
|
||||
.read_cycle = 5,
|
||||
.write_cycle = 5,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_nand(void)
|
||||
{
|
||||
ek_nand_data.bus_width_16 = board_have_nand_16bit();
|
||||
/* setup bus-width (8 or 16) */
|
||||
if (ek_nand_data.bus_width_16)
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
|
||||
else
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
|
||||
|
||||
/* configure chip-select 3 (NAND) */
|
||||
sam9_smc_configure(0, 3, &ek_nand_smc_config);
|
||||
|
||||
at91_add_device_nand(&ek_nand_data);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
*/
|
||||
static struct mci_platform_data __initdata ek_mci0_data = {
|
||||
.slot[1] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -EINVAL,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led ek_leds[] = {
|
||||
{ /* "bottom" led, green, userled1 to be defined */
|
||||
.name = "ds5",
|
||||
.gpio = AT91_PIN_PA6,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
},
|
||||
{ /* "power" led, yellow */
|
||||
.name = "ds1",
|
||||
.gpio = AT91_PIN_PA9,
|
||||
.default_trigger = "heartbeat",
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* I2C devices
|
||||
*/
|
||||
static struct at24_platform_data at24c512 = {
|
||||
.byte_len = SZ_512K / 8,
|
||||
.page_size = 128,
|
||||
.flags = AT24_FLAG_ADDR16,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata ek_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("24c512", 0x50),
|
||||
.platform_data = &at24c512,
|
||||
},
|
||||
/* more devices can be added using expansion connectors */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* GPIO Buttons
|
||||
*/
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button ek_buttons[] = {
|
||||
{
|
||||
.gpio = AT91_PIN_PA30,
|
||||
.code = BTN_3,
|
||||
.desc = "Button 3",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PA31,
|
||||
.code = BTN_4,
|
||||
.desc = "Button 4",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data ek_button_data = {
|
||||
.buttons = ek_buttons,
|
||||
.nbuttons = ARRAY_SIZE(ek_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device ek_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &ek_button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_add_device_buttons(void)
|
||||
{
|
||||
at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
|
||||
at91_set_deglitch(AT91_PIN_PA30, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
|
||||
at91_set_deglitch(AT91_PIN_PA31, 1);
|
||||
|
||||
platform_device_register(&ek_button_device);
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_device_buttons(void) {}
|
||||
#endif
|
||||
|
||||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&ek_udc_data);
|
||||
/* SPI */
|
||||
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
|
||||
/* NAND */
|
||||
ek_add_device_nand();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&ek_macb_data);
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &ek_mci0_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
|
||||
/* SSC (to AT73C213) */
|
||||
at73c213_set_clk(&at73c213_data);
|
||||
at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
|
||||
/* Push Buttons */
|
||||
ek_add_device_buttons();
|
||||
}
|
||||
|
||||
MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
|
||||
/* Maintainer: Atmel */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,623 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-sam9261ek.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2006 Atmel
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
#include <linux/spi/at73c213.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/dm9000.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/system_rev.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init ek_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* DM9000 ethernet device
|
||||
*/
|
||||
#if defined(CONFIG_DM9000)
|
||||
static struct resource dm9000_resource[] = {
|
||||
[0] = {
|
||||
.start = AT91_CHIPSELECT_2,
|
||||
.end = AT91_CHIPSELECT_2 + 3,
|
||||
.flags = IORESOURCE_MEM
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91_CHIPSELECT_2 + 0x44,
|
||||
.end = AT91_CHIPSELECT_2 + 0xFF,
|
||||
.flags = IORESOURCE_MEM
|
||||
},
|
||||
[2] = {
|
||||
.flags = IORESOURCE_IRQ
|
||||
| IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
|
||||
}
|
||||
};
|
||||
|
||||
static struct dm9000_plat_data dm9000_platdata = {
|
||||
.flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM,
|
||||
};
|
||||
|
||||
static struct platform_device dm9000_device = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(dm9000_resource),
|
||||
.resource = dm9000_resource,
|
||||
.dev = {
|
||||
.platform_data = &dm9000_platdata,
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* SMC timings for the DM9000.
|
||||
* Note: These timings were calculated for MASTER_CLOCK = 100000000 according to the DM9000 timings.
|
||||
*/
|
||||
static struct sam9_smc_config __initdata dm9000_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 2,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 2,
|
||||
|
||||
.ncs_read_pulse = 8,
|
||||
.nrd_pulse = 4,
|
||||
.ncs_write_pulse = 8,
|
||||
.nwe_pulse = 4,
|
||||
|
||||
.read_cycle = 16,
|
||||
.write_cycle = 16,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
|
||||
.tdf_cycles = 1,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_dm9000(void)
|
||||
{
|
||||
struct resource *r = &dm9000_resource[2];
|
||||
|
||||
/* Configure chip-select 2 (DM9000) */
|
||||
sam9_smc_configure(0, 2, &dm9000_smc_config);
|
||||
|
||||
/* Configure Reset signal as output */
|
||||
at91_set_gpio_output(AT91_PIN_PC10, 0);
|
||||
|
||||
/* Configure Interrupt pin as input, no pull-up */
|
||||
at91_set_gpio_input(AT91_PIN_PC11, 0);
|
||||
|
||||
r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
|
||||
platform_device_register(&dm9000_device);
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_device_dm9000(void) {}
|
||||
#endif /* CONFIG_DM9000 */
|
||||
|
||||
|
||||
/*
|
||||
* USB Host Port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata ek_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* USB Device Port
|
||||
*/
|
||||
static struct at91_udc_data __initdata ek_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PB29,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct mtd_partition __initdata ek_nand_partition[] = {
|
||||
{
|
||||
.name = "Partition 1",
|
||||
.offset = 0,
|
||||
.size = SZ_256K,
|
||||
},
|
||||
{
|
||||
.name = "Partition 2",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata ek_nand_data = {
|
||||
.ale = 22,
|
||||
.cle = 21,
|
||||
.det_pin = -EINVAL,
|
||||
.rdy_pin = AT91_PIN_PC15,
|
||||
.enable_pin = AT91_PIN_PC14,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.on_flash_bbt = 1,
|
||||
.parts = ek_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(ek_nand_partition),
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata ek_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 3,
|
||||
.nrd_pulse = 3,
|
||||
.ncs_write_pulse = 3,
|
||||
.nwe_pulse = 3,
|
||||
|
||||
.read_cycle = 5,
|
||||
.write_cycle = 5,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_nand(void)
|
||||
{
|
||||
ek_nand_data.bus_width_16 = board_have_nand_16bit();
|
||||
/* setup bus-width (8 or 16) */
|
||||
if (ek_nand_data.bus_width_16)
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
|
||||
else
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
|
||||
|
||||
/* configure chip-select 3 (NAND) */
|
||||
sam9_smc_configure(0, 3, &ek_nand_smc_config);
|
||||
|
||||
at91_add_device_nand(&ek_nand_data);
|
||||
}
|
||||
|
||||
/*
|
||||
* SPI related devices
|
||||
*/
|
||||
#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
|
||||
|
||||
/*
|
||||
* ADS7846 Touchscreen
|
||||
*/
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
|
||||
static int ads7843_pendown_state(void)
|
||||
{
|
||||
return !at91_get_gpio_value(AT91_PIN_PC2); /* Touchscreen PENIRQ */
|
||||
}
|
||||
|
||||
static struct ads7846_platform_data ads_info = {
|
||||
.model = 7843,
|
||||
.x_min = 150,
|
||||
.x_max = 3830,
|
||||
.y_min = 190,
|
||||
.y_max = 3830,
|
||||
.vref_delay_usecs = 100,
|
||||
.x_plate_ohms = 450,
|
||||
.y_plate_ohms = 250,
|
||||
.pressure_max = 15000,
|
||||
.debounce_max = 1,
|
||||
.debounce_rep = 0,
|
||||
.debounce_tol = (~0),
|
||||
.get_pendown_state = ads7843_pendown_state,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_ts(void)
|
||||
{
|
||||
at91_set_B_periph(AT91_PIN_PC2, 1); /* External IRQ0, with pullup */
|
||||
at91_set_gpio_input(AT91_PIN_PA11, 1); /* Touchscreen BUSY signal */
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_device_ts(void) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Audio
|
||||
*/
|
||||
static struct at73c213_board_info at73c213_data = {
|
||||
.ssc_id = 1,
|
||||
.shortname = "AT91SAM9261/9G10-EK external DAC",
|
||||
};
|
||||
|
||||
#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
|
||||
static void __init at73c213_set_clk(struct at73c213_board_info *info)
|
||||
{
|
||||
struct clk *pck2;
|
||||
struct clk *plla;
|
||||
|
||||
pck2 = clk_get(NULL, "pck2");
|
||||
plla = clk_get(NULL, "plla");
|
||||
|
||||
/* AT73C213 MCK Clock */
|
||||
at91_set_B_periph(AT91_PIN_PB31, 0); /* PCK2 */
|
||||
|
||||
clk_set_parent(pck2, plla);
|
||||
clk_put(plla);
|
||||
|
||||
info->dac_clk = pck2;
|
||||
}
|
||||
#else
|
||||
static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SPI devices
|
||||
*/
|
||||
static struct spi_board_info ek_spi_devices[] = {
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
{
|
||||
.modalias = "ads7846",
|
||||
.chip_select = 2,
|
||||
.max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
|
||||
.bus_num = 0,
|
||||
.platform_data = &ads_info,
|
||||
.irq = NR_IRQS_LEGACY + AT91SAM9261_ID_IRQ0,
|
||||
.controller_data = (void *) AT91_PIN_PA28, /* CS pin */
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
|
||||
{ /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#elif defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
|
||||
{ /* AT73C213 DAC */
|
||||
.modalias = "at73c213",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
.mode = SPI_MODE_1,
|
||||
.platform_data = &at73c213_data,
|
||||
.controller_data = (void*) AT91_PIN_PA29, /* default for CS3 is PA6, but it must be PA29 */
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
#else /* CONFIG_SPI_ATMEL_* */
|
||||
/* spi0 and mmc/sd share the same PIO pins: cannot be used at the same time */
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
* det_pin, wp_pin and vcc_pin are not connected
|
||||
*/
|
||||
static struct mci_platform_data __initdata mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -EINVAL,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
#endif /* CONFIG_SPI_ATMEL_* */
|
||||
|
||||
|
||||
/*
|
||||
* LCD Controller
|
||||
*/
|
||||
#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
|
||||
|
||||
#if defined(CONFIG_FB_ATMEL_STN)
|
||||
|
||||
/* STN */
|
||||
static struct fb_videomode at91_stn_modes[] = {
|
||||
{
|
||||
.name = "SP06Q002 @ 75",
|
||||
.refresh = 75,
|
||||
.xres = 320, .yres = 240,
|
||||
.pixclock = KHZ2PICOS(1440),
|
||||
|
||||
.left_margin = 1, .right_margin = 1,
|
||||
.upper_margin = 0, .lower_margin = 0,
|
||||
.hsync_len = 1, .vsync_len = 1,
|
||||
|
||||
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs at91fb_default_stn_monspecs = {
|
||||
.manufacturer = "HIT",
|
||||
.monitor = "SP06Q002",
|
||||
|
||||
.modedb = at91_stn_modes,
|
||||
.modedb_len = ARRAY_SIZE(at91_stn_modes),
|
||||
.hfmin = 15000,
|
||||
.hfmax = 64000,
|
||||
.vfmin = 50,
|
||||
.vfmax = 150,
|
||||
};
|
||||
|
||||
#define AT91SAM9261_DEFAULT_STN_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
|
||||
| ATMEL_LCDC_DISTYPE_STNMONO \
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE \
|
||||
| ATMEL_LCDC_IFWIDTH_4 \
|
||||
| ATMEL_LCDC_SCANMOD_SINGLE)
|
||||
|
||||
static void at91_lcdc_stn_power_control(struct atmel_lcdfb_pdata *pdata, int on)
|
||||
{
|
||||
/* backlight */
|
||||
if (on) { /* power up */
|
||||
at91_set_gpio_value(AT91_PIN_PC14, 0);
|
||||
at91_set_gpio_value(AT91_PIN_PC15, 0);
|
||||
} else { /* power down */
|
||||
at91_set_gpio_value(AT91_PIN_PC14, 1);
|
||||
at91_set_gpio_value(AT91_PIN_PC15, 1);
|
||||
}
|
||||
}
|
||||
|
||||
static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
|
||||
.default_bpp = 1,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN,
|
||||
.default_lcdcon2 = AT91SAM9261_DEFAULT_STN_LCDCON2,
|
||||
.default_monspecs = &at91fb_default_stn_monspecs,
|
||||
.atmel_lcdfb_power_control = at91_lcdc_stn_power_control,
|
||||
.guard_time = 1,
|
||||
};
|
||||
|
||||
#else
|
||||
|
||||
/* TFT */
|
||||
static struct fb_videomode at91_tft_vga_modes[] = {
|
||||
{
|
||||
.name = "TX09D50VM1CCA @ 60",
|
||||
.refresh = 60,
|
||||
.xres = 240, .yres = 320,
|
||||
.pixclock = KHZ2PICOS(4965),
|
||||
|
||||
.left_margin = 1, .right_margin = 33,
|
||||
.upper_margin = 1, .lower_margin = 0,
|
||||
.hsync_len = 5, .vsync_len = 1,
|
||||
|
||||
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs at91fb_default_tft_monspecs = {
|
||||
.manufacturer = "HIT",
|
||||
.monitor = "TX09D50VM1CCA",
|
||||
|
||||
.modedb = at91_tft_vga_modes,
|
||||
.modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
|
||||
.hfmin = 15000,
|
||||
.hfmax = 64000,
|
||||
.vfmin = 50,
|
||||
.vfmax = 150,
|
||||
};
|
||||
|
||||
#define AT91SAM9261_DEFAULT_TFT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
|
||||
| ATMEL_LCDC_DISTYPE_TFT \
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
|
||||
|
||||
static void at91_lcdc_tft_power_control(struct atmel_lcdfb_pdata *pdata, int on)
|
||||
{
|
||||
if (on)
|
||||
at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
|
||||
else
|
||||
at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
|
||||
}
|
||||
|
||||
static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
|
||||
.lcdcon_is_backlight = true,
|
||||
.default_bpp = 16,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN,
|
||||
.default_lcdcon2 = AT91SAM9261_DEFAULT_TFT_LCDCON2,
|
||||
.default_monspecs = &at91fb_default_tft_monspecs,
|
||||
.atmel_lcdfb_power_control = at91_lcdc_tft_power_control,
|
||||
.guard_time = 1,
|
||||
};
|
||||
#endif
|
||||
|
||||
#else
|
||||
static struct atmel_lcdfb_pdata __initdata ek_lcdc_data;
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* GPIO Buttons
|
||||
*/
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button ek_buttons[] = {
|
||||
{
|
||||
.gpio = AT91_PIN_PA27,
|
||||
.code = BTN_0,
|
||||
.desc = "Button 0",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PA26,
|
||||
.code = BTN_1,
|
||||
.desc = "Button 1",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PA25,
|
||||
.code = BTN_2,
|
||||
.desc = "Button 2",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PA24,
|
||||
.code = BTN_3,
|
||||
.desc = "Button 3",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data ek_button_data = {
|
||||
.buttons = ek_buttons,
|
||||
.nbuttons = ARRAY_SIZE(ek_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device ek_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &ek_button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_add_device_buttons(void)
|
||||
{
|
||||
at91_set_gpio_input(AT91_PIN_PA27, 1); /* btn0 */
|
||||
at91_set_deglitch(AT91_PIN_PA27, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PA26, 1); /* btn1 */
|
||||
at91_set_deglitch(AT91_PIN_PA26, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PA25, 1); /* btn2 */
|
||||
at91_set_deglitch(AT91_PIN_PA25, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PA24, 1); /* btn3 */
|
||||
at91_set_deglitch(AT91_PIN_PA24, 1);
|
||||
|
||||
platform_device_register(&ek_button_device);
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_device_buttons(void) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led ek_leds[] = {
|
||||
{ /* "bottom" led, green, userled1 to be defined */
|
||||
.name = "ds7",
|
||||
.gpio = AT91_PIN_PA14,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
},
|
||||
{ /* "top" led, green, userled2 to be defined */
|
||||
.name = "ds8",
|
||||
.gpio = AT91_PIN_PA13,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
},
|
||||
{ /* "power" led, yellow */
|
||||
.name = "ds1",
|
||||
.gpio = AT91_PIN_PA23,
|
||||
.default_trigger = "heartbeat",
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
|
||||
if (cpu_is_at91sam9g10())
|
||||
ek_lcdc_data.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB;
|
||||
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&ek_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* NAND */
|
||||
ek_add_device_nand();
|
||||
/* DM9000 ethernet */
|
||||
ek_add_device_dm9000();
|
||||
|
||||
/* spi0 and mmc/sd share the same PIO pins */
|
||||
#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
|
||||
/* SPI */
|
||||
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
|
||||
/* Touchscreen */
|
||||
ek_add_device_ts();
|
||||
/* SSC (to AT73C213) */
|
||||
at73c213_set_clk(&at73c213_data);
|
||||
at91_add_device_ssc(AT91SAM9261_ID_SSC1, ATMEL_SSC_TX);
|
||||
#else
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &mci0_data);
|
||||
#endif
|
||||
/* LCD Controller */
|
||||
at91_add_device_lcdc(&ek_lcdc_data);
|
||||
/* Push Buttons */
|
||||
ek_add_device_buttons();
|
||||
/* LEDs */
|
||||
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
|
||||
/* Maintainer: Atmel */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
|
||||
/* Maintainer: Atmel */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,493 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-sam9263ek.c
|
||||
*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2007 Atmel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
#include <linux/platform_data/at24.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/leds_pwm.h>
|
||||
|
||||
#include <video/atmel_lcdc.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/system_rev.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init ek_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 16.367 MHz crystal */
|
||||
at91_initialize(16367660);
|
||||
}
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata ek_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
|
||||
.vbus_pin_active_low = {1, 1},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata ek_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PA25,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* ADS7846 Touchscreen
|
||||
*/
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
static int ads7843_pendown_state(void)
|
||||
{
|
||||
return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */
|
||||
}
|
||||
|
||||
static struct ads7846_platform_data ads_info = {
|
||||
.model = 7843,
|
||||
.x_min = 150,
|
||||
.x_max = 3830,
|
||||
.y_min = 190,
|
||||
.y_max = 3830,
|
||||
.vref_delay_usecs = 100,
|
||||
.x_plate_ohms = 450,
|
||||
.y_plate_ohms = 250,
|
||||
.pressure_max = 15000,
|
||||
.debounce_max = 1,
|
||||
.debounce_rep = 0,
|
||||
.debounce_tol = (~0),
|
||||
.get_pendown_state = ads7843_pendown_state,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_ts(void)
|
||||
{
|
||||
at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */
|
||||
at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_device_ts(void) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SPI devices.
|
||||
*/
|
||||
static struct spi_board_info ek_spi_devices[] = {
|
||||
#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
|
||||
{ /* DataFlash card */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#endif
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
{
|
||||
.modalias = "ads7846",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
|
||||
.bus_num = 0,
|
||||
.platform_data = &ads_info,
|
||||
.irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
*/
|
||||
static struct mci_platform_data __initdata mci1_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PE18,
|
||||
.wp_pin = AT91_PIN_PE19,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata ek_macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PE31,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct mtd_partition __initdata ek_nand_partition[] = {
|
||||
{
|
||||
.name = "Partition 1",
|
||||
.offset = 0,
|
||||
.size = SZ_64M,
|
||||
},
|
||||
{
|
||||
.name = "Partition 2",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata ek_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.det_pin = -EINVAL,
|
||||
.rdy_pin = AT91_PIN_PA22,
|
||||
.enable_pin = AT91_PIN_PD15,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.on_flash_bbt = 1,
|
||||
.parts = ek_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(ek_nand_partition),
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata ek_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 1,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 1,
|
||||
|
||||
.ncs_read_pulse = 3,
|
||||
.nrd_pulse = 3,
|
||||
.ncs_write_pulse = 3,
|
||||
.nwe_pulse = 3,
|
||||
|
||||
.read_cycle = 5,
|
||||
.write_cycle = 5,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
|
||||
.tdf_cycles = 2,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_nand(void)
|
||||
{
|
||||
ek_nand_data.bus_width_16 = board_have_nand_16bit();
|
||||
/* setup bus-width (8 or 16) */
|
||||
if (ek_nand_data.bus_width_16)
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
|
||||
else
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
|
||||
|
||||
/* configure chip-select 3 (NAND) */
|
||||
sam9_smc_configure(0, 3, &ek_nand_smc_config);
|
||||
|
||||
at91_add_device_nand(&ek_nand_data);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* I2C devices
|
||||
*/
|
||||
static struct at24_platform_data at24c512 = {
|
||||
.byte_len = SZ_512K / 8,
|
||||
.page_size = 128,
|
||||
.flags = AT24_FLAG_ADDR16,
|
||||
};
|
||||
|
||||
|
||||
static struct i2c_board_info __initdata ek_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("24c512", 0x50),
|
||||
.platform_data = &at24c512,
|
||||
},
|
||||
/* more devices can be added using expansion connectors */
|
||||
};
|
||||
|
||||
/*
|
||||
* LCD Controller
|
||||
*/
|
||||
#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
|
||||
static struct fb_videomode at91_tft_vga_modes[] = {
|
||||
{
|
||||
.name = "TX09D50VM1CCA @ 60",
|
||||
.refresh = 60,
|
||||
.xres = 240, .yres = 320,
|
||||
.pixclock = KHZ2PICOS(4965),
|
||||
|
||||
.left_margin = 1, .right_margin = 33,
|
||||
.upper_margin = 1, .lower_margin = 0,
|
||||
.hsync_len = 5, .vsync_len = 1,
|
||||
|
||||
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
|
||||
.vmode = FB_VMODE_NONINTERLACED,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_monspecs at91fb_default_monspecs = {
|
||||
.manufacturer = "HIT",
|
||||
.monitor = "TX09D70VM1CCA",
|
||||
|
||||
.modedb = at91_tft_vga_modes,
|
||||
.modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
|
||||
.hfmin = 15000,
|
||||
.hfmax = 64000,
|
||||
.vfmin = 50,
|
||||
.vfmax = 150,
|
||||
};
|
||||
|
||||
#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
|
||||
| ATMEL_LCDC_DISTYPE_TFT \
|
||||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
|
||||
|
||||
static void at91_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on)
|
||||
{
|
||||
at91_set_gpio_value(AT91_PIN_PA30, on);
|
||||
}
|
||||
|
||||
/* Driver datas */
|
||||
static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
|
||||
.lcdcon_is_backlight = true,
|
||||
.default_bpp = 16,
|
||||
.default_dmacon = ATMEL_LCDC_DMAEN,
|
||||
.default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
|
||||
.default_monspecs = &at91fb_default_monspecs,
|
||||
.atmel_lcdfb_power_control = at91_lcdc_power_control,
|
||||
.guard_time = 1,
|
||||
};
|
||||
|
||||
#else
|
||||
static struct atmel_lcdfb_pdata __initdata ek_lcdc_data;
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* GPIO Buttons
|
||||
*/
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button ek_buttons[] = {
|
||||
{ /* BP1, "leftclic" */
|
||||
.code = BTN_LEFT,
|
||||
.gpio = AT91_PIN_PC5,
|
||||
.active_low = 1,
|
||||
.desc = "left_click",
|
||||
.wakeup = 1,
|
||||
},
|
||||
{ /* BP2, "rightclic" */
|
||||
.code = BTN_RIGHT,
|
||||
.gpio = AT91_PIN_PC4,
|
||||
.active_low = 1,
|
||||
.desc = "right_click",
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data ek_button_data = {
|
||||
.buttons = ek_buttons,
|
||||
.nbuttons = ARRAY_SIZE(ek_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device ek_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &ek_button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_add_device_buttons(void)
|
||||
{
|
||||
at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */
|
||||
at91_set_deglitch(AT91_PIN_PC5, 1);
|
||||
at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */
|
||||
at91_set_deglitch(AT91_PIN_PC4, 1);
|
||||
|
||||
platform_device_register(&ek_button_device);
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_device_buttons(void) {}
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* AC97
|
||||
* reset_pin is not connected: NRST
|
||||
*/
|
||||
static struct ac97c_platform_data ek_ac97_data = {
|
||||
.reset_pin = -EINVAL,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* LEDs ... these could all be PWM-driven, for variable brightness
|
||||
*/
|
||||
static struct gpio_led ek_leds[] = {
|
||||
{ /* "right" led, green, userled2 (could be driven by pwm2) */
|
||||
.name = "ds2",
|
||||
.gpio = AT91_PIN_PC29,
|
||||
.active_low = 1,
|
||||
.default_trigger = "nand-disk",
|
||||
},
|
||||
{ /* "power" led, yellow (could be driven by pwm0) */
|
||||
.name = "ds3",
|
||||
.gpio = AT91_PIN_PB7,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
#if !IS_ENABLED(CONFIG_LEDS_PWM)
|
||||
{
|
||||
.name = "ds1",
|
||||
.gpio = AT91_PIN_PB8,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
}
|
||||
#endif
|
||||
};
|
||||
|
||||
/*
|
||||
* PWM Leds
|
||||
*/
|
||||
static struct pwm_lookup pwm_lookup[] = {
|
||||
PWM_LOOKUP("at91sam9rl-pwm", 1, "leds_pwm", "ds1",
|
||||
5000, PWM_POLARITY_INVERSED),
|
||||
};
|
||||
|
||||
#if IS_ENABLED(CONFIG_LEDS_PWM)
|
||||
static struct led_pwm pwm_leds[] = {
|
||||
{
|
||||
.name = "ds1",
|
||||
.max_brightness = 255,
|
||||
},
|
||||
};
|
||||
|
||||
static struct led_pwm_platform_data pwm_data = {
|
||||
.num_leds = ARRAY_SIZE(pwm_leds),
|
||||
.leds = pwm_leds,
|
||||
};
|
||||
|
||||
static struct platform_device leds_pwm = {
|
||||
.name = "leds_pwm",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &pwm_data,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* CAN
|
||||
*/
|
||||
static void sam9263ek_transceiver_switch(int on)
|
||||
{
|
||||
if (on) {
|
||||
at91_set_gpio_output(AT91_PIN_PA18, 1); /* CANRXEN */
|
||||
at91_set_gpio_output(AT91_PIN_PA19, 0); /* CANRS */
|
||||
} else {
|
||||
at91_set_gpio_output(AT91_PIN_PA18, 0); /* CANRXEN */
|
||||
at91_set_gpio_output(AT91_PIN_PA19, 1); /* CANRS */
|
||||
}
|
||||
}
|
||||
|
||||
static struct at91_can_data ek_can_data = {
|
||||
.transceiver_switch = sam9263ek_transceiver_switch,
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
#if IS_ENABLED(CONFIG_LEDS_PWM)
|
||||
&leds_pwm,
|
||||
#endif
|
||||
};
|
||||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&ek_udc_data);
|
||||
/* SPI */
|
||||
at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
|
||||
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
|
||||
/* Touchscreen */
|
||||
ek_add_device_ts();
|
||||
/* MMC */
|
||||
at91_add_device_mci(1, &mci1_data);
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&ek_macb_data);
|
||||
/* NAND */
|
||||
ek_add_device_nand();
|
||||
/* I2C */
|
||||
at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
|
||||
/* LCD Controller */
|
||||
at91_add_device_lcdc(&ek_lcdc_data);
|
||||
/* Push Buttons */
|
||||
ek_add_device_buttons();
|
||||
/* AC97 */
|
||||
at91_add_device_ac97(&ek_ac97_data);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
|
||||
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
|
||||
#if IS_ENABLED(CONFIG_LEDS_PWM)
|
||||
at91_add_device_pwm(1 << AT91_PWM1);
|
||||
#endif
|
||||
/* CAN */
|
||||
at91_add_device_can(&ek_can_data);
|
||||
/* Other platform devices */
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
}
|
||||
|
||||
MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
|
||||
/* Maintainer: Atmel */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,429 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2005 SAN People
|
||||
* Copyright (C) 2008 Atmel
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/at73c213.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
|
||||
#include <linux/platform_data/at91_adc.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/system_rev.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
/*
|
||||
* board revision encoding
|
||||
* bit 0:
|
||||
* 0 => 1 sd/mmc slot
|
||||
* 1 => 2 sd/mmc slots connectors (board from revision C)
|
||||
*/
|
||||
#define HAVE_2MMC (1 << 0)
|
||||
static int inline ek_have_2mmc(void)
|
||||
{
|
||||
return machine_is_at91sam9g20ek_2mmc() || (system_rev & HAVE_2MMC);
|
||||
}
|
||||
|
||||
|
||||
static void __init ek_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata ek_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata ek_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC5,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* SPI devices.
|
||||
*/
|
||||
static struct spi_board_info ek_spi_devices[] = {
|
||||
#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
|
||||
{ /* DataFlash chip */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
|
||||
{ /* DataFlash card */
|
||||
.modalias = "mtd_dataflash",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 15 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
},
|
||||
#endif
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata ek_macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PA7,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_macb(void)
|
||||
{
|
||||
if (ek_have_2mmc())
|
||||
ek_macb_data.phy_irq_pin = AT91_PIN_PB0;
|
||||
|
||||
at91_add_device_eth(&ek_macb_data);
|
||||
}
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct mtd_partition __initdata ek_nand_partition[] = {
|
||||
{
|
||||
.name = "Bootstrap",
|
||||
.offset = 0,
|
||||
.size = 4 * SZ_1M,
|
||||
},
|
||||
{
|
||||
.name = "Partition 1",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = 60 * SZ_1M,
|
||||
},
|
||||
{
|
||||
.name = "Partition 2",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
/* det_pin is not connected */
|
||||
static struct atmel_nand_data __initdata ek_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.rdy_pin = AT91_PIN_PC13,
|
||||
.enable_pin = AT91_PIN_PC14,
|
||||
.det_pin = -EINVAL,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.on_flash_bbt = 1,
|
||||
.parts = ek_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(ek_nand_partition),
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata ek_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 2,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 2,
|
||||
|
||||
.ncs_read_pulse = 4,
|
||||
.nrd_pulse = 4,
|
||||
.ncs_write_pulse = 4,
|
||||
.nwe_pulse = 4,
|
||||
|
||||
.read_cycle = 7,
|
||||
.write_cycle = 7,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
|
||||
.tdf_cycles = 3,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_nand(void)
|
||||
{
|
||||
ek_nand_data.bus_width_16 = board_have_nand_16bit();
|
||||
/* setup bus-width (8 or 16) */
|
||||
if (ek_nand_data.bus_width_16)
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
|
||||
else
|
||||
ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
|
||||
|
||||
/* configure chip-select 3 (NAND) */
|
||||
sam9_smc_configure(0, 3, &ek_nand_smc_config);
|
||||
|
||||
at91_add_device_nand(&ek_nand_data);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
* wp_pin and vcc_pin are not connected
|
||||
*/
|
||||
static struct mci_platform_data __initdata ek_mmc_data = {
|
||||
.slot[1] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PC9,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
|
||||
};
|
||||
|
||||
static void __init ek_add_device_mmc(void)
|
||||
{
|
||||
if (ek_have_2mmc()) {
|
||||
ek_mmc_data.slot[0].bus_width = 4;
|
||||
ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2;
|
||||
ek_mmc_data.slot[0].wp_pin = -1;
|
||||
}
|
||||
at91_add_device_mci(0, &ek_mmc_data);
|
||||
}
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led ek_leds[] = {
|
||||
{ /* "bottom" led, green, userled1 to be defined */
|
||||
.name = "ds5",
|
||||
.gpio = AT91_PIN_PA6,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
},
|
||||
{ /* "power" led, yellow */
|
||||
.name = "ds1",
|
||||
.gpio = AT91_PIN_PA9,
|
||||
.default_trigger = "heartbeat",
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_add_device_gpio_leds(void)
|
||||
{
|
||||
if (ek_have_2mmc()) {
|
||||
ek_leds[0].gpio = AT91_PIN_PB8;
|
||||
ek_leds[1].gpio = AT91_PIN_PB9;
|
||||
}
|
||||
|
||||
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
|
||||
}
|
||||
|
||||
/*
|
||||
* GPIO Buttons
|
||||
*/
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button ek_buttons[] = {
|
||||
{
|
||||
.gpio = AT91_PIN_PA30,
|
||||
.code = BTN_3,
|
||||
.desc = "Button 3",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PA31,
|
||||
.code = BTN_4,
|
||||
.desc = "Button 4",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data ek_button_data = {
|
||||
.buttons = ek_buttons,
|
||||
.nbuttons = ARRAY_SIZE(ek_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device ek_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &ek_button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init ek_add_device_buttons(void)
|
||||
{
|
||||
at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
|
||||
at91_set_deglitch(AT91_PIN_PA30, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
|
||||
at91_set_deglitch(AT91_PIN_PA31, 1);
|
||||
|
||||
platform_device_register(&ek_button_device);
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_device_buttons(void) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ADCs
|
||||
*/
|
||||
|
||||
static struct at91_adc_data ek_adc_data = {
|
||||
.channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3),
|
||||
.use_external_triggers = true,
|
||||
.vref = 3300,
|
||||
};
|
||||
|
||||
#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
|
||||
static struct regulator_consumer_supply ek_audio_consumer_supplies[] = {
|
||||
REGULATOR_SUPPLY("AVDD", "0-001b"),
|
||||
REGULATOR_SUPPLY("HPVDD", "0-001b"),
|
||||
REGULATOR_SUPPLY("DBVDD", "0-001b"),
|
||||
REGULATOR_SUPPLY("DCVDD", "0-001b"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data ek_avdd_reg_init_data = {
|
||||
.constraints = {
|
||||
.name = "3V3",
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.consumer_supplies = ek_audio_consumer_supplies,
|
||||
.num_consumer_supplies = ARRAY_SIZE(ek_audio_consumer_supplies),
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config ek_vdd_pdata = {
|
||||
.supply_name = "board-3V3",
|
||||
.microvolts = 3300000,
|
||||
.gpio = -EINVAL,
|
||||
.enabled_at_boot = 0,
|
||||
.init_data = &ek_avdd_reg_init_data,
|
||||
};
|
||||
static struct platform_device ek_voltage_regulator = {
|
||||
.name = "reg-fixed-voltage",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &ek_vdd_pdata,
|
||||
},
|
||||
};
|
||||
static void __init ek_add_regulators(void)
|
||||
{
|
||||
platform_device_register(&ek_voltage_regulator);
|
||||
}
|
||||
#else
|
||||
static void __init ek_add_regulators(void) {}
|
||||
#endif
|
||||
|
||||
|
||||
static struct i2c_board_info __initdata ek_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("24c512", 0x50)
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("wm8731", 0x1b)
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sam9g20ek_audio_device = {
|
||||
.name = "at91sam9g20ek-audio",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static void __init ek_add_device_audio(void)
|
||||
{
|
||||
platform_device_register(&sam9g20ek_audio_device);
|
||||
}
|
||||
|
||||
|
||||
static void __init ek_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&ek_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&ek_udc_data);
|
||||
/* SPI */
|
||||
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
|
||||
/* NAND */
|
||||
ek_add_device_nand();
|
||||
/* Ethernet */
|
||||
ek_add_device_macb();
|
||||
/* Regulators */
|
||||
ek_add_regulators();
|
||||
/* MMC */
|
||||
ek_add_device_mmc();
|
||||
/* I2C */
|
||||
at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
|
||||
/* LEDs */
|
||||
ek_add_device_gpio_leds();
|
||||
/* Push Buttons */
|
||||
ek_add_device_buttons();
|
||||
/* ADCs */
|
||||
at91_add_device_adc(&ek_adc_data);
|
||||
/* PCK0 provides MCLK to the WM8731 */
|
||||
at91_set_B_periph(AT91_PIN_PC1, 0);
|
||||
/* SSC (for WM8731) */
|
||||
at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
|
||||
ek_add_device_audio();
|
||||
}
|
||||
|
||||
MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
|
||||
/* Maintainer: Atmel */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
|
||||
/* Maintainer: Atmel */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = ek_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = ek_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,191 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-snapper9260.c
|
||||
*
|
||||
* Copyright (C) 2010 Bluewater System Ltd
|
||||
*
|
||||
* Author: Andre Renaud <andre@bluewatersys.com>
|
||||
* Author: Ryan Mallon
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/platform_data/pca953x.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91sam9_smc.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
#define SNAPPER9260_IO_EXP_GPIO(x) (NR_BUILTIN_GPIO + (x))
|
||||
|
||||
static void __init snapper9260_init_early(void)
|
||||
{
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
static struct at91_usbh_data __initdata snapper9260_usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata snapper9260_udc_data = {
|
||||
.vbus_pin = SNAPPER9260_IO_EXP_GPIO(5),
|
||||
.vbus_active_low = 1,
|
||||
.vbus_polled = 1,
|
||||
.pullup_pin = -EINVAL,
|
||||
};
|
||||
|
||||
static struct macb_platform_data snapper9260_macb_data = {
|
||||
.phy_irq_pin = -EINVAL,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
static struct mtd_partition __initdata snapper9260_nand_partitions[] = {
|
||||
{
|
||||
.name = "Preboot",
|
||||
.offset = 0,
|
||||
.size = SZ_128K,
|
||||
},
|
||||
{
|
||||
.name = "Bootloader",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_256K,
|
||||
},
|
||||
{
|
||||
.name = "Environment",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_128K,
|
||||
},
|
||||
{
|
||||
.name = "Kernel",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_4M,
|
||||
},
|
||||
{
|
||||
.name = "Filesystem",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata snapper9260_nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.rdy_pin = AT91_PIN_PC13,
|
||||
.parts = snapper9260_nand_partitions,
|
||||
.num_parts = ARRAY_SIZE(snapper9260_nand_partitions),
|
||||
.bus_width_16 = 0,
|
||||
.enable_pin = -EINVAL,
|
||||
.det_pin = -EINVAL,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 0,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 0,
|
||||
|
||||
.ncs_read_pulse = 5,
|
||||
.nrd_pulse = 2,
|
||||
.ncs_write_pulse = 5,
|
||||
.nwe_pulse = 2,
|
||||
|
||||
.read_cycle = 7,
|
||||
.write_cycle = 7,
|
||||
|
||||
.mode = (AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
|
||||
AT91_SMC_EXNWMODE_DISABLE),
|
||||
.tdf_cycles = 1,
|
||||
};
|
||||
|
||||
static struct pca953x_platform_data snapper9260_io_expander_data = {
|
||||
.gpio_base = SNAPPER9260_IO_EXP_GPIO(0),
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
|
||||
{
|
||||
/* IO expander */
|
||||
I2C_BOARD_INFO("max7312", 0x28),
|
||||
.platform_data = &snapper9260_io_expander_data,
|
||||
},
|
||||
{
|
||||
/* Audio codec */
|
||||
I2C_BOARD_INFO("tlv320aic23", 0x1a),
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata snapper9260_i2c_isl1208 = {
|
||||
/* RTC */
|
||||
I2C_BOARD_INFO("isl1208", 0x6f),
|
||||
};
|
||||
|
||||
static void __init snapper9260_add_device_nand(void)
|
||||
{
|
||||
at91_set_A_periph(AT91_PIN_PC14, 0);
|
||||
sam9_smc_configure(0, 3, &snapper9260_nand_smc_config);
|
||||
at91_add_device_nand(&snapper9260_nand_data);
|
||||
}
|
||||
|
||||
static void __init snapper9260_board_init(void)
|
||||
{
|
||||
at91_register_devices();
|
||||
|
||||
at91_add_device_i2c(snapper9260_i2c_devices,
|
||||
ARRAY_SIZE(snapper9260_i2c_devices));
|
||||
|
||||
snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31);
|
||||
i2c_register_board_info(0, &snapper9260_i2c_isl1208, 1);
|
||||
|
||||
/* Debug on ttyS0 */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2,
|
||||
ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
|
||||
at91_add_device_serial();
|
||||
at91_add_device_usbh(&snapper9260_usbh_data);
|
||||
at91_add_device_udc(&snapper9260_udc_data);
|
||||
at91_add_device_eth(&snapper9260_macb_data);
|
||||
at91_add_device_ssc(AT91SAM9260_ID_SSC, (ATMEL_SSC_TF | ATMEL_SSC_TK |
|
||||
ATMEL_SSC_TD | ATMEL_SSC_RD));
|
||||
snapper9260_add_device_nand();
|
||||
}
|
||||
|
||||
MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = snapper9260_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = snapper9260_board_init,
|
||||
MACHINE_END
|
||||
|
||||
|
||||
|
|
@ -1,294 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
|
||||
* taskit GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/w1-gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <mach/at91sam9_smc.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
void __init stamp9g20_init_early(void)
|
||||
{
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* NAND flash
|
||||
*/
|
||||
static struct atmel_nand_data __initdata nand_data = {
|
||||
.ale = 21,
|
||||
.cle = 22,
|
||||
.rdy_pin = AT91_PIN_PC13,
|
||||
.enable_pin = AT91_PIN_PC14,
|
||||
.bus_width_16 = 0,
|
||||
.det_pin = -EINVAL,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
};
|
||||
|
||||
static struct sam9_smc_config __initdata nand_smc_config = {
|
||||
.ncs_read_setup = 0,
|
||||
.nrd_setup = 2,
|
||||
.ncs_write_setup = 0,
|
||||
.nwe_setup = 2,
|
||||
|
||||
.ncs_read_pulse = 4,
|
||||
.nrd_pulse = 4,
|
||||
.ncs_write_pulse = 4,
|
||||
.nwe_pulse = 4,
|
||||
|
||||
.read_cycle = 7,
|
||||
.write_cycle = 7,
|
||||
|
||||
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
|
||||
.tdf_cycles = 3,
|
||||
};
|
||||
|
||||
static void __init add_device_nand(void)
|
||||
{
|
||||
/* configure chip-select 3 (NAND) */
|
||||
sam9_smc_configure(0, 3, &nand_smc_config);
|
||||
|
||||
at91_add_device_nand(&nand_data);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* MCI (SD/MMC)
|
||||
* det_pin, wp_pin and vcc_pin are not connected
|
||||
*/
|
||||
static struct mci_platform_data __initdata mmc_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = -1,
|
||||
.wp_pin = -1,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* USB Host port
|
||||
*/
|
||||
static struct at91_usbh_data __initdata usbh_data = {
|
||||
.ports = 2,
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* USB Device port
|
||||
*/
|
||||
static struct at91_udc_data __initdata portuxg20_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PC7,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
|
||||
.vbus_pin = AT91_PIN_PA22,
|
||||
.pullup_pin = -EINVAL, /* pull-up driven by UDC */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* MACB Ethernet device
|
||||
*/
|
||||
static struct macb_platform_data __initdata macb_data = {
|
||||
.phy_irq_pin = AT91_PIN_PA28,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led portuxg20_leds[] = {
|
||||
{
|
||||
.name = "LED2",
|
||||
.gpio = AT91_PIN_PC5,
|
||||
.default_trigger = "none",
|
||||
}, {
|
||||
.name = "LED3",
|
||||
.gpio = AT91_PIN_PC4,
|
||||
.default_trigger = "none",
|
||||
}, {
|
||||
.name = "LED4",
|
||||
.gpio = AT91_PIN_PC10,
|
||||
.default_trigger = "heartbeat",
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_led stamp9g20evb_leds[] = {
|
||||
{
|
||||
.name = "D8",
|
||||
.gpio = AT91_PIN_PB18,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
}, {
|
||||
.name = "D9",
|
||||
.gpio = AT91_PIN_PB19,
|
||||
.active_low = 1,
|
||||
.default_trigger = "none",
|
||||
}, {
|
||||
.name = "D10",
|
||||
.gpio = AT91_PIN_PB20,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* SPI devices
|
||||
*/
|
||||
static struct spi_board_info portuxg20_spi_devices[] = {
|
||||
{
|
||||
.modalias = "spidev",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 1 * 1000 * 1000,
|
||||
.bus_num = 0,
|
||||
}, {
|
||||
.modalias = "spidev",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 1 * 1000 * 1000,
|
||||
.bus_num = 1,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Dallas 1-Wire
|
||||
*/
|
||||
static struct w1_gpio_platform_data w1_gpio_pdata = {
|
||||
.pin = AT91_PIN_PA29,
|
||||
.is_open_drain = 1,
|
||||
.ext_pullup_enable_pin = -EINVAL,
|
||||
};
|
||||
|
||||
static struct platform_device w1_device = {
|
||||
.name = "w1-gpio",
|
||||
.id = -1,
|
||||
.dev.platform_data = &w1_gpio_pdata,
|
||||
};
|
||||
|
||||
void add_w1(void)
|
||||
{
|
||||
at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
|
||||
at91_set_multi_drive(w1_gpio_pdata.pin, 1);
|
||||
platform_device_register(&w1_device);
|
||||
}
|
||||
|
||||
|
||||
void __init stamp9g20_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DGBU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
at91_add_device_serial();
|
||||
/* NAND */
|
||||
add_device_nand();
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &mmc_data);
|
||||
/* W1 */
|
||||
add_w1();
|
||||
}
|
||||
|
||||
static void __init portuxg20_board_init(void)
|
||||
{
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
|
||||
/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
|
||||
at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
|
||||
|
||||
/* USART4 on ttyS5. (Rx, Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
|
||||
|
||||
/* USART5 on ttyS6. (Rx, Tx only) */
|
||||
at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
|
||||
stamp9g20_board_init();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&portuxg20_udc_data);
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&macb_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* SPI */
|
||||
at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices));
|
||||
/* LEDs */
|
||||
at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds));
|
||||
}
|
||||
|
||||
static void __init stamp9g20evb_board_init(void)
|
||||
{
|
||||
/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR
|
||||
| ATMEL_UART_DCD | ATMEL_UART_RI);
|
||||
stamp9g20_board_init();
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&stamp9g20evb_udc_data);
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&macb_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(NULL, 0);
|
||||
/* LEDs */
|
||||
at91_gpio_leds(stamp9g20evb_leds, ARRAY_SIZE(stamp9g20evb_leds));
|
||||
}
|
||||
|
||||
MACHINE_START(PORTUXG20, "taskit PortuxG20")
|
||||
/* Maintainer: taskit GmbH */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = stamp9g20_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = portuxg20_board_init,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(STAMP9G20, "taskit Stamp9G20")
|
||||
/* Maintainer: taskit GmbH */
|
||||
.init_time = at91_init_time,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = stamp9g20_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = stamp9g20evb_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,597 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/board-yl-9200.c
|
||||
*
|
||||
* Adapted from various board files in arch/arm/mach-at91
|
||||
*
|
||||
* Modifications for YL-9200 platform:
|
||||
* Copyright (C) 2007 S. Birtles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91rm9200_mc.h>
|
||||
#include <mach/at91_ramc.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "board.h"
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
static void __init yl9200_init_early(void)
|
||||
{
|
||||
/* Set cpu type: PQFP */
|
||||
at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
|
||||
|
||||
/* Initialize processor: 18.432 MHz crystal */
|
||||
at91_initialize(18432000);
|
||||
}
|
||||
|
||||
/*
|
||||
* LEDs
|
||||
*/
|
||||
static struct gpio_led yl9200_leds[] = {
|
||||
{ /* D2 */
|
||||
.name = "led2",
|
||||
.gpio = AT91_PIN_PB17,
|
||||
.active_low = 1,
|
||||
.default_trigger = "timer",
|
||||
},
|
||||
{ /* D3 */
|
||||
.name = "led3",
|
||||
.gpio = AT91_PIN_PB16,
|
||||
.active_low = 1,
|
||||
.default_trigger = "heartbeat",
|
||||
},
|
||||
{ /* D4 */
|
||||
.name = "led4",
|
||||
.gpio = AT91_PIN_PB15,
|
||||
.active_low = 1,
|
||||
},
|
||||
{ /* D5 */
|
||||
.name = "led5",
|
||||
.gpio = AT91_PIN_PB8,
|
||||
.active_low = 1,
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* Ethernet
|
||||
*/
|
||||
static struct macb_platform_data __initdata yl9200_eth_data = {
|
||||
.phy_irq_pin = AT91_PIN_PB28,
|
||||
.is_rmii = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Host
|
||||
*/
|
||||
static struct at91_usbh_data __initdata yl9200_usbh_data = {
|
||||
.ports = 1, /* PQFP version of AT91RM9200 */
|
||||
.vbus_pin = {-EINVAL, -EINVAL},
|
||||
.overcurrent_pin= {-EINVAL, -EINVAL},
|
||||
};
|
||||
|
||||
/*
|
||||
* USB Device
|
||||
*/
|
||||
static struct at91_udc_data __initdata yl9200_udc_data = {
|
||||
.pullup_pin = AT91_PIN_PC4,
|
||||
.vbus_pin = AT91_PIN_PC5,
|
||||
.pullup_active_low = 1, /* Active Low due to PNP transistor (pg 7) */
|
||||
|
||||
};
|
||||
|
||||
/*
|
||||
* MMC
|
||||
*/
|
||||
static struct mci_platform_data __initdata yl9200_mci0_data = {
|
||||
.slot[0] = {
|
||||
.bus_width = 4,
|
||||
.detect_pin = AT91_PIN_PB9,
|
||||
.wp_pin = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* NAND Flash
|
||||
*/
|
||||
static struct mtd_partition __initdata yl9200_nand_partition[] = {
|
||||
{
|
||||
.name = "AT91 NAND partition 1, boot",
|
||||
.offset = 0,
|
||||
.size = SZ_256K
|
||||
},
|
||||
{
|
||||
.name = "AT91 NAND partition 2, kernel",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = (2 * SZ_1M) - SZ_256K
|
||||
},
|
||||
{
|
||||
.name = "AT91 NAND partition 3, filesystem",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = 14 * SZ_1M
|
||||
},
|
||||
{
|
||||
.name = "AT91 NAND partition 4, storage",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = SZ_16M
|
||||
},
|
||||
{
|
||||
.name = "AT91 NAND partition 5, ext-fs",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = SZ_32M
|
||||
}
|
||||
};
|
||||
|
||||
static struct atmel_nand_data __initdata yl9200_nand_data = {
|
||||
.ale = 6,
|
||||
.cle = 7,
|
||||
.det_pin = -EINVAL,
|
||||
.rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */
|
||||
.enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.parts = yl9200_nand_partition,
|
||||
.num_parts = ARRAY_SIZE(yl9200_nand_partition),
|
||||
};
|
||||
|
||||
/*
|
||||
* NOR Flash
|
||||
*/
|
||||
#define YL9200_FLASH_BASE AT91_CHIPSELECT_0
|
||||
#define YL9200_FLASH_SIZE SZ_16M
|
||||
|
||||
static struct mtd_partition yl9200_flash_partitions[] = {
|
||||
{
|
||||
.name = "Bootloader",
|
||||
.offset = 0,
|
||||
.size = SZ_256K,
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "Kernel",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = (2 * SZ_1M) - SZ_256K
|
||||
},
|
||||
{
|
||||
.name = "Filesystem",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL
|
||||
}
|
||||
};
|
||||
|
||||
static struct physmap_flash_data yl9200_flash_data = {
|
||||
.width = 2,
|
||||
.parts = yl9200_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(yl9200_flash_partitions),
|
||||
};
|
||||
|
||||
static struct resource yl9200_flash_resources[] = {
|
||||
{
|
||||
.start = YL9200_FLASH_BASE,
|
||||
.end = YL9200_FLASH_BASE + YL9200_FLASH_SIZE - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device yl9200_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &yl9200_flash_data,
|
||||
},
|
||||
.resource = yl9200_flash_resources,
|
||||
.num_resources = ARRAY_SIZE(yl9200_flash_resources),
|
||||
};
|
||||
|
||||
/*
|
||||
* I2C (TWI)
|
||||
*/
|
||||
static struct i2c_board_info __initdata yl9200_i2c_devices[] = {
|
||||
{ /* EEPROM */
|
||||
I2C_BOARD_INFO("24c128", 0x50),
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* GPIO Buttons
|
||||
*/
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button yl9200_buttons[] = {
|
||||
{
|
||||
.gpio = AT91_PIN_PA24,
|
||||
.code = BTN_2,
|
||||
.desc = "SW2",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PB1,
|
||||
.code = BTN_3,
|
||||
.desc = "SW3",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PB2,
|
||||
.code = BTN_4,
|
||||
.desc = "SW4",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
{
|
||||
.gpio = AT91_PIN_PB6,
|
||||
.code = BTN_5,
|
||||
.desc = "SW5",
|
||||
.active_low = 1,
|
||||
.wakeup = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data yl9200_button_data = {
|
||||
.buttons = yl9200_buttons,
|
||||
.nbuttons = ARRAY_SIZE(yl9200_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device yl9200_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &yl9200_button_data,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init yl9200_add_device_buttons(void)
|
||||
{
|
||||
at91_set_gpio_input(AT91_PIN_PA24, 1); /* SW2 */
|
||||
at91_set_deglitch(AT91_PIN_PA24, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PB1, 1); /* SW3 */
|
||||
at91_set_deglitch(AT91_PIN_PB1, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PB2, 1); /* SW4 */
|
||||
at91_set_deglitch(AT91_PIN_PB2, 1);
|
||||
at91_set_gpio_input(AT91_PIN_PB6, 1); /* SW5 */
|
||||
at91_set_deglitch(AT91_PIN_PB6, 1);
|
||||
|
||||
/* Enable buttons (Sheet 5) */
|
||||
at91_set_gpio_output(AT91_PIN_PB7, 1);
|
||||
|
||||
platform_device_register(&yl9200_button_device);
|
||||
}
|
||||
#else
|
||||
static void __init yl9200_add_device_buttons(void) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Touchscreen
|
||||
*/
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
static int ads7843_pendown_state(void)
|
||||
{
|
||||
return !at91_get_gpio_value(AT91_PIN_PB11); /* Touchscreen PENIRQ */
|
||||
}
|
||||
|
||||
static struct ads7846_platform_data ads_info = {
|
||||
.model = 7843,
|
||||
.x_min = 150,
|
||||
.x_max = 3830,
|
||||
.y_min = 190,
|
||||
.y_max = 3830,
|
||||
.vref_delay_usecs = 100,
|
||||
|
||||
/* For a 8" touch-screen */
|
||||
// .x_plate_ohms = 603,
|
||||
// .y_plate_ohms = 332,
|
||||
|
||||
/* For a 10.4" touch-screen */
|
||||
// .x_plate_ohms = 611,
|
||||
// .y_plate_ohms = 325,
|
||||
|
||||
.x_plate_ohms = 576,
|
||||
.y_plate_ohms = 366,
|
||||
|
||||
.pressure_max = 15000, /* generally nonsense on the 7843 */
|
||||
.debounce_max = 1,
|
||||
.debounce_rep = 0,
|
||||
.debounce_tol = (~0),
|
||||
.get_pendown_state = ads7843_pendown_state,
|
||||
};
|
||||
|
||||
static void __init yl9200_add_device_ts(void)
|
||||
{
|
||||
at91_set_gpio_input(AT91_PIN_PB11, 1); /* Touchscreen interrupt pin */
|
||||
at91_set_gpio_input(AT91_PIN_PB10, 1); /* Touchscreen BUSY signal - not used! */
|
||||
}
|
||||
#else
|
||||
static void __init yl9200_add_device_ts(void) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SPI devices
|
||||
*/
|
||||
static struct spi_board_info yl9200_spi_devices[] = {
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
{ /* Touchscreen */
|
||||
.modalias = "ads7846",
|
||||
.chip_select = 0,
|
||||
.max_speed_hz = 5000 * 26,
|
||||
.platform_data = &ads_info,
|
||||
.irq = AT91_PIN_PB11,
|
||||
},
|
||||
#endif
|
||||
{ /* CAN */
|
||||
.modalias = "mcp2510",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 25000 * 26,
|
||||
.irq = AT91_PIN_PC0,
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* LCD / VGA
|
||||
*
|
||||
* EPSON S1D13806 FB (discontinued chip)
|
||||
* EPSON S1D13506 FB
|
||||
*/
|
||||
#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
|
||||
#include <video/s1d13xxxfb.h>
|
||||
|
||||
|
||||
static void yl9200_init_video(void)
|
||||
{
|
||||
/* NWAIT Signal */
|
||||
at91_set_A_periph(AT91_PIN_PC6, 0);
|
||||
|
||||
/* Initialization of the Static Memory Controller for Chip Select 2 */
|
||||
at91_ramc_write(0, AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
|
||||
| AT91_SMC_WSEN | AT91_SMC_NWS_(0x4) /* wait states */
|
||||
| AT91_SMC_TDF_(0x100) /* float time */
|
||||
);
|
||||
}
|
||||
|
||||
static struct s1d13xxxfb_regval yl9200_s1dfb_initregs[] =
|
||||
{
|
||||
{S1DREG_MISC, 0x00}, /* Miscellaneous Register*/
|
||||
{S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/
|
||||
{S1DREG_GPIO_CNF0, 0x00}, /* General IO Pins Configuration Register*/
|
||||
{S1DREG_GPIO_CTL0, 0x00}, /* General IO Pins Control Register*/
|
||||
{S1DREG_CLK_CNF, 0x11}, /* Memory Clock Configuration Register*/
|
||||
{S1DREG_LCD_CLK_CNF, 0x10}, /* LCD Pixel Clock Configuration Register*/
|
||||
{S1DREG_CRT_CLK_CNF, 0x12}, /* CRT/TV Pixel Clock Configuration Register*/
|
||||
{S1DREG_MPLUG_CLK_CNF, 0x01}, /* MediaPlug Clock Configuration Register*/
|
||||
{S1DREG_CPU2MEM_WST_SEL, 0x02}, /* CPU To Memory Wait State Select Register*/
|
||||
{S1DREG_MEM_CNF, 0x00}, /* Memory Configuration Register*/
|
||||
{S1DREG_SDRAM_REF_RATE, 0x04}, /* DRAM Refresh Rate Register, MCLK source*/
|
||||
{S1DREG_SDRAM_TC0, 0x12}, /* DRAM Timings Control Register 0*/
|
||||
{S1DREG_SDRAM_TC1, 0x02}, /* DRAM Timings Control Register 1*/
|
||||
{S1DREG_PANEL_TYPE, 0x25}, /* Panel Type Register*/
|
||||
{S1DREG_MOD_RATE, 0x00}, /* MOD Rate Register*/
|
||||
{S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* LCD Horizontal Display Width Register*/
|
||||
{S1DREG_LCD_NDISP_HPER, 0x13}, /* LCD Horizontal Non-Display Period Register*/
|
||||
{S1DREG_TFT_FPLINE_START, 0x01}, /* TFT FPLINE Start Position Register*/
|
||||
{S1DREG_TFT_FPLINE_PWIDTH, 0x0c}, /* TFT FPLINE Pulse Width Register*/
|
||||
{S1DREG_LCD_DISP_VHEIGHT0, 0xDF}, /* LCD Vertical Display Height Register 0*/
|
||||
{S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* LCD Vertical Display Height Register 1*/
|
||||
{S1DREG_LCD_NDISP_VPER, 0x2c}, /* LCD Vertical Non-Display Period Register*/
|
||||
{S1DREG_TFT_FPFRAME_START, 0x0a}, /* TFT FPFRAME Start Position Register*/
|
||||
{S1DREG_TFT_FPFRAME_PWIDTH, 0x02}, /* TFT FPFRAME Pulse Width Register*/
|
||||
{S1DREG_LCD_DISP_MODE, 0x05}, /* LCD Display Mode Register*/
|
||||
{S1DREG_LCD_MISC, 0x01}, /* LCD Miscellaneous Register*/
|
||||
{S1DREG_LCD_DISP_START0, 0x00}, /* LCD Display Start Address Register 0*/
|
||||
{S1DREG_LCD_DISP_START1, 0x00}, /* LCD Display Start Address Register 1*/
|
||||
{S1DREG_LCD_DISP_START2, 0x00}, /* LCD Display Start Address Register 2*/
|
||||
{S1DREG_LCD_MEM_OFF0, 0x80}, /* LCD Memory Address Offset Register 0*/
|
||||
{S1DREG_LCD_MEM_OFF1, 0x02}, /* LCD Memory Address Offset Register 1*/
|
||||
{S1DREG_LCD_PIX_PAN, 0x03}, /* LCD Pixel Panning Register*/
|
||||
{S1DREG_LCD_DISP_FIFO_HTC, 0x00}, /* LCD Display FIFO High Threshold Control Register*/
|
||||
{S1DREG_LCD_DISP_FIFO_LTC, 0x00}, /* LCD Display FIFO Low Threshold Control Register*/
|
||||
{S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* CRT/TV Horizontal Display Width Register*/
|
||||
{S1DREG_CRT_NDISP_HPER, 0x13}, /* CRT/TV Horizontal Non-Display Period Register*/
|
||||
{S1DREG_CRT_HRTC_START, 0x01}, /* CRT/TV HRTC Start Position Register*/
|
||||
{S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* CRT/TV HRTC Pulse Width Register*/
|
||||
{S1DREG_CRT_DISP_VHEIGHT0, 0xDF}, /* CRT/TV Vertical Display Height Register 0*/
|
||||
{S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* CRT/TV Vertical Display Height Register 1*/
|
||||
{S1DREG_CRT_NDISP_VPER, 0x2B}, /* CRT/TV Vertical Non-Display Period Register*/
|
||||
{S1DREG_CRT_VRTC_START, 0x09}, /* CRT/TV VRTC Start Position Register*/
|
||||
{S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* CRT/TV VRTC Pulse Width Register*/
|
||||
{S1DREG_TV_OUT_CTL, 0x18}, /* TV Output Control Register */
|
||||
{S1DREG_CRT_DISP_MODE, 0x05}, /* CRT/TV Display Mode Register, 16BPP*/
|
||||
{S1DREG_CRT_DISP_START0, 0x00}, /* CRT/TV Display Start Address Register 0*/
|
||||
{S1DREG_CRT_DISP_START1, 0x00}, /* CRT/TV Display Start Address Register 1*/
|
||||
{S1DREG_CRT_DISP_START2, 0x00}, /* CRT/TV Display Start Address Register 2*/
|
||||
{S1DREG_CRT_MEM_OFF0, 0x80}, /* CRT/TV Memory Address Offset Register 0*/
|
||||
{S1DREG_CRT_MEM_OFF1, 0x02}, /* CRT/TV Memory Address Offset Register 1*/
|
||||
{S1DREG_CRT_PIX_PAN, 0x00}, /* CRT/TV Pixel Panning Register*/
|
||||
{S1DREG_CRT_DISP_FIFO_HTC, 0x00}, /* CRT/TV Display FIFO High Threshold Control Register*/
|
||||
{S1DREG_CRT_DISP_FIFO_LTC, 0x00}, /* CRT/TV Display FIFO Low Threshold Control Register*/
|
||||
{S1DREG_LCD_CUR_CTL, 0x00}, /* LCD Ink/Cursor Control Register*/
|
||||
{S1DREG_LCD_CUR_START, 0x01}, /* LCD Ink/Cursor Start Address Register*/
|
||||
{S1DREG_LCD_CUR_XPOS0, 0x00}, /* LCD Cursor X Position Register 0*/
|
||||
{S1DREG_LCD_CUR_XPOS1, 0x00}, /* LCD Cursor X Position Register 1*/
|
||||
{S1DREG_LCD_CUR_YPOS0, 0x00}, /* LCD Cursor Y Position Register 0*/
|
||||
{S1DREG_LCD_CUR_YPOS1, 0x00}, /* LCD Cursor Y Position Register 1*/
|
||||
{S1DREG_LCD_CUR_BCTL0, 0x00}, /* LCD Ink/Cursor Blue Color 0 Register*/
|
||||
{S1DREG_LCD_CUR_GCTL0, 0x00}, /* LCD Ink/Cursor Green Color 0 Register*/
|
||||
{S1DREG_LCD_CUR_RCTL0, 0x00}, /* LCD Ink/Cursor Red Color 0 Register*/
|
||||
{S1DREG_LCD_CUR_BCTL1, 0x1F}, /* LCD Ink/Cursor Blue Color 1 Register*/
|
||||
{S1DREG_LCD_CUR_GCTL1, 0x3F}, /* LCD Ink/Cursor Green Color 1 Register*/
|
||||
{S1DREG_LCD_CUR_RCTL1, 0x1F}, /* LCD Ink/Cursor Red Color 1 Register*/
|
||||
{S1DREG_LCD_CUR_FIFO_HTC, 0x00}, /* LCD Ink/Cursor FIFO Threshold Register*/
|
||||
{S1DREG_CRT_CUR_CTL, 0x00}, /* CRT/TV Ink/Cursor Control Register*/
|
||||
{S1DREG_CRT_CUR_START, 0x01}, /* CRT/TV Ink/Cursor Start Address Register*/
|
||||
{S1DREG_CRT_CUR_XPOS0, 0x00}, /* CRT/TV Cursor X Position Register 0*/
|
||||
{S1DREG_CRT_CUR_XPOS1, 0x00}, /* CRT/TV Cursor X Position Register 1*/
|
||||
{S1DREG_CRT_CUR_YPOS0, 0x00}, /* CRT/TV Cursor Y Position Register 0*/
|
||||
{S1DREG_CRT_CUR_YPOS1, 0x00}, /* CRT/TV Cursor Y Position Register 1*/
|
||||
{S1DREG_CRT_CUR_BCTL0, 0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register*/
|
||||
{S1DREG_CRT_CUR_GCTL0, 0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register*/
|
||||
{S1DREG_CRT_CUR_RCTL0, 0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register*/
|
||||
{S1DREG_CRT_CUR_BCTL1, 0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register*/
|
||||
{S1DREG_CRT_CUR_GCTL1, 0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register*/
|
||||
{S1DREG_CRT_CUR_RCTL1, 0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register*/
|
||||
{S1DREG_CRT_CUR_FIFO_HTC, 0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register*/
|
||||
{S1DREG_BBLT_CTL0, 0x00}, /* BitBlt Control Register 0*/
|
||||
{S1DREG_BBLT_CTL1, 0x01}, /* BitBlt Control Register 1*/
|
||||
{S1DREG_BBLT_CC_EXP, 0x00}, /* BitBlt ROP Code/Color Expansion Register*/
|
||||
{S1DREG_BBLT_OP, 0x00}, /* BitBlt Operation Register*/
|
||||
{S1DREG_BBLT_SRC_START0, 0x00}, /* BitBlt Source Start Address Register 0*/
|
||||
{S1DREG_BBLT_SRC_START1, 0x00}, /* BitBlt Source Start Address Register 1*/
|
||||
{S1DREG_BBLT_SRC_START2, 0x00}, /* BitBlt Source Start Address Register 2*/
|
||||
{S1DREG_BBLT_DST_START0, 0x00}, /* BitBlt Destination Start Address Register 0*/
|
||||
{S1DREG_BBLT_DST_START1, 0x00}, /* BitBlt Destination Start Address Register 1*/
|
||||
{S1DREG_BBLT_DST_START2, 0x00}, /* BitBlt Destination Start Address Register 2*/
|
||||
{S1DREG_BBLT_MEM_OFF0, 0x00}, /* BitBlt Memory Address Offset Register 0*/
|
||||
{S1DREG_BBLT_MEM_OFF1, 0x00}, /* BitBlt Memory Address Offset Register 1*/
|
||||
{S1DREG_BBLT_WIDTH0, 0x00}, /* BitBlt Width Register 0*/
|
||||
{S1DREG_BBLT_WIDTH1, 0x00}, /* BitBlt Width Register 1*/
|
||||
{S1DREG_BBLT_HEIGHT0, 0x00}, /* BitBlt Height Register 0*/
|
||||
{S1DREG_BBLT_HEIGHT1, 0x00}, /* BitBlt Height Register 1*/
|
||||
{S1DREG_BBLT_BGC0, 0x00}, /* BitBlt Background Color Register 0*/
|
||||
{S1DREG_BBLT_BGC1, 0x00}, /* BitBlt Background Color Register 1*/
|
||||
{S1DREG_BBLT_FGC0, 0x00}, /* BitBlt Foreground Color Register 0*/
|
||||
{S1DREG_BBLT_FGC1, 0x00}, /* BitBlt Foreground Color Register 1*/
|
||||
{S1DREG_LKUP_MODE, 0x00}, /* Look-Up Table Mode Register*/
|
||||
{S1DREG_LKUP_ADDR, 0x00}, /* Look-Up Table Address Register*/
|
||||
{S1DREG_PS_CNF, 0x00}, /* Power Save Configuration Register*/
|
||||
{S1DREG_PS_STATUS, 0x00}, /* Power Save Status Register*/
|
||||
{S1DREG_CPU2MEM_WDOGT, 0x00}, /* CPU-to-Memory Access Watchdog Timer Register*/
|
||||
{S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/
|
||||
};
|
||||
|
||||
static struct s1d13xxxfb_pdata yl9200_s1dfb_pdata = {
|
||||
.initregs = yl9200_s1dfb_initregs,
|
||||
.initregssize = ARRAY_SIZE(yl9200_s1dfb_initregs),
|
||||
.platform_init_video = yl9200_init_video,
|
||||
};
|
||||
|
||||
#define YL9200_FB_REG_BASE AT91_CHIPSELECT_7
|
||||
#define YL9200_FB_VMEM_BASE YL9200_FB_REG_BASE + SZ_2M
|
||||
#define YL9200_FB_VMEM_SIZE SZ_2M
|
||||
|
||||
static struct resource yl9200_s1dfb_resource[] = {
|
||||
[0] = { /* video mem */
|
||||
.name = "s1d13xxxfb memory",
|
||||
.start = YL9200_FB_VMEM_BASE,
|
||||
.end = YL9200_FB_VMEM_BASE + YL9200_FB_VMEM_SIZE -1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = { /* video registers */
|
||||
.name = "s1d13xxxfb registers",
|
||||
.start = YL9200_FB_REG_BASE,
|
||||
.end = YL9200_FB_REG_BASE + SZ_512 -1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device yl9200_s1dfb_device = {
|
||||
.name = "s1d13806fb",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &s1dfb_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &yl9200_s1dfb_pdata,
|
||||
},
|
||||
.resource = yl9200_s1dfb_resource,
|
||||
.num_resources = ARRAY_SIZE(yl9200_s1dfb_resource),
|
||||
};
|
||||
|
||||
void __init yl9200_add_device_video(void)
|
||||
{
|
||||
platform_device_register(&yl9200_s1dfb_device);
|
||||
}
|
||||
#else
|
||||
void __init yl9200_add_device_video(void) {}
|
||||
#endif
|
||||
|
||||
|
||||
static void __init yl9200_board_init(void)
|
||||
{
|
||||
/* Serial */
|
||||
/* DBGU on ttyS0. (Rx & Tx only) */
|
||||
at91_register_uart(0, 0, 0);
|
||||
|
||||
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
|
||||
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
|
||||
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
|
||||
| ATMEL_UART_RI);
|
||||
|
||||
/* USART0 on ttyS2. (Rx & Tx only to JP3) */
|
||||
at91_register_uart(AT91RM9200_ID_US0, 2, 0);
|
||||
|
||||
/* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
|
||||
at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
|
||||
at91_add_device_serial();
|
||||
/* Ethernet */
|
||||
at91_add_device_eth(&yl9200_eth_data);
|
||||
/* USB Host */
|
||||
at91_add_device_usbh(&yl9200_usbh_data);
|
||||
/* USB Device */
|
||||
at91_add_device_udc(&yl9200_udc_data);
|
||||
/* I2C */
|
||||
at91_add_device_i2c(yl9200_i2c_devices, ARRAY_SIZE(yl9200_i2c_devices));
|
||||
/* MMC */
|
||||
at91_add_device_mci(0, &yl9200_mci0_data);
|
||||
/* NAND */
|
||||
at91_add_device_nand(&yl9200_nand_data);
|
||||
/* NOR Flash */
|
||||
platform_device_register(&yl9200_flash);
|
||||
#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
|
||||
/* SPI */
|
||||
at91_add_device_spi(yl9200_spi_devices, ARRAY_SIZE(yl9200_spi_devices));
|
||||
/* Touchscreen */
|
||||
yl9200_add_device_ts();
|
||||
#endif
|
||||
/* LEDs. */
|
||||
at91_gpio_leds(yl9200_leds, ARRAY_SIZE(yl9200_leds));
|
||||
/* Push Buttons */
|
||||
yl9200_add_device_buttons();
|
||||
/* VGA */
|
||||
yl9200_add_device_video();
|
||||
}
|
||||
|
||||
MACHINE_START(YL9200, "uCdragon YL-9200")
|
||||
/* Maintainer: S.Birtles */
|
||||
.init_time = at91rm9200_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = yl9200_init_early,
|
||||
.init_irq = at91_init_irq_default,
|
||||
.init_machine = yl9200_board_init,
|
||||
MACHINE_END
|
||||
|
|
@ -1,127 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-at91/include/mach/board.h
|
||||
*
|
||||
* Copyright (C) 2005 HP Labs
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* These are data structures found in platform_device.dev.platform_data,
|
||||
* and describing board-specific data needed by drivers. For example,
|
||||
* which pin is used for a given GPIO role.
|
||||
*
|
||||
* In 2.6, drivers should strongly avoid board-specific knowledge so
|
||||
* that supporting new boards normally won't require driver patches.
|
||||
* Most board-specific knowledge should be in arch/.../board-*.c files.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_BOARD_H
|
||||
#define __ASM_ARCH_BOARD_H
|
||||
|
||||
#include <linux/platform_data/atmel.h>
|
||||
|
||||
/* USB Device */
|
||||
extern void __init at91_add_device_udc(struct at91_udc_data *data);
|
||||
|
||||
/* USB High Speed Device */
|
||||
extern void __init at91_add_device_usba(struct usba_platform_data *data);
|
||||
|
||||
/* Compact Flash */
|
||||
extern void __init at91_add_device_cf(struct at91_cf_data *data);
|
||||
|
||||
/* MMC / SD */
|
||||
/* atmel-mci platform config */
|
||||
extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data);
|
||||
|
||||
extern void __init at91_add_device_eth(struct macb_platform_data *data);
|
||||
|
||||
/* USB Host */
|
||||
extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
|
||||
extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
|
||||
extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
|
||||
|
||||
extern void __init at91_add_device_nand(struct atmel_nand_data *data);
|
||||
|
||||
/* I2C*/
|
||||
#if defined(CONFIG_ARCH_AT91SAM9G45)
|
||||
extern void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices);
|
||||
#else
|
||||
extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices);
|
||||
#endif
|
||||
|
||||
/* SPI */
|
||||
extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices);
|
||||
|
||||
/* Serial */
|
||||
#define ATMEL_UART_CTS 0x01
|
||||
#define ATMEL_UART_RTS 0x02
|
||||
#define ATMEL_UART_DSR 0x04
|
||||
#define ATMEL_UART_DTR 0x08
|
||||
#define ATMEL_UART_DCD 0x10
|
||||
#define ATMEL_UART_RI 0x20
|
||||
|
||||
extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);
|
||||
|
||||
extern struct platform_device *atmel_default_console_device;
|
||||
|
||||
extern void __init at91_add_device_serial(void);
|
||||
|
||||
/*
|
||||
* PWM
|
||||
*/
|
||||
#define AT91_PWM0 0
|
||||
#define AT91_PWM1 1
|
||||
#define AT91_PWM2 2
|
||||
#define AT91_PWM3 3
|
||||
|
||||
extern void __init at91_add_device_pwm(u32 mask);
|
||||
|
||||
/*
|
||||
* SSC -- accessed through ssc_request(id). Drivers don't bind to SSC
|
||||
* platform devices. Their SSC ID is part of their configuration data,
|
||||
* along with information about which SSC signals they should use.
|
||||
*/
|
||||
#define ATMEL_SSC_TK 0x01
|
||||
#define ATMEL_SSC_TF 0x02
|
||||
#define ATMEL_SSC_TD 0x04
|
||||
#define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)
|
||||
|
||||
#define ATMEL_SSC_RK 0x10
|
||||
#define ATMEL_SSC_RF 0x20
|
||||
#define ATMEL_SSC_RD 0x40
|
||||
#define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)
|
||||
|
||||
extern void __init at91_add_device_ssc(unsigned id, unsigned pins);
|
||||
|
||||
/* LCD Controller */
|
||||
struct atmel_lcdfb_pdata;
|
||||
extern void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data);
|
||||
|
||||
/* AC97 */
|
||||
extern void __init at91_add_device_ac97(struct ac97c_platform_data *data);
|
||||
|
||||
/* ISI */
|
||||
struct isi_platform_data;
|
||||
extern void __init at91_add_device_isi(struct isi_platform_data *data,
|
||||
bool use_pck_as_mck);
|
||||
|
||||
/* CAN */
|
||||
extern void __init at91_add_device_can(struct at91_can_data *data);
|
||||
|
||||
/* LEDs */
|
||||
extern void __init at91_gpio_leds(struct gpio_led *leds, int nr);
|
||||
|
||||
#endif
|
||||
|
|
@ -1,977 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/clock.c
|
||||
*
|
||||
* Copyright (C) 2005 David Brownell
|
||||
* Copyright (C) 2005 Ivan Kokshaysky
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/clk/at91_pmc.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/cpu.h>
|
||||
|
||||
#include <asm/proc-fns.h>
|
||||
|
||||
#include "clock.h"
|
||||
#include "generic.h"
|
||||
|
||||
void __iomem *at91_pmc_base;
|
||||
EXPORT_SYMBOL_GPL(at91_pmc_base);
|
||||
|
||||
/*
|
||||
* There's a lot more which can be done with clocks, including cpufreq
|
||||
* integration, slow clock mode support (for system suspend), letting
|
||||
* PLLB be used at other rates (on boards that don't need USB), etc.
|
||||
*/
|
||||
|
||||
#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)
|
||||
#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE)
|
||||
#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL)
|
||||
#define clk_is_sys(x) ((x)->type & CLK_TYPE_SYSTEM)
|
||||
|
||||
|
||||
/*
|
||||
* Chips have some kind of clocks : group them by functionality
|
||||
*/
|
||||
#define cpu_has_utmi() ( cpu_is_at91sam9rl() \
|
||||
|| cpu_is_at91sam9g45() \
|
||||
|| cpu_is_at91sam9x5() \
|
||||
|| cpu_is_sama5d3())
|
||||
|
||||
#define cpu_has_1056M_plla() (cpu_is_sama5d3())
|
||||
|
||||
#define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \
|
||||
|| cpu_is_at91sam9g45() \
|
||||
|| cpu_is_at91sam9x5() \
|
||||
|| cpu_is_at91sam9n12())
|
||||
|
||||
#define cpu_has_300M_plla() (cpu_is_at91sam9g10())
|
||||
|
||||
#define cpu_has_240M_plla() (cpu_is_at91sam9261() \
|
||||
|| cpu_is_at91sam9263() \
|
||||
|| cpu_is_at91sam9rl())
|
||||
|
||||
#define cpu_has_210M_plla() (cpu_is_at91sam9260())
|
||||
|
||||
#define cpu_has_pllb() (!(cpu_is_at91sam9rl() \
|
||||
|| cpu_is_at91sam9g45() \
|
||||
|| cpu_is_at91sam9x5() \
|
||||
|| cpu_is_sama5d3()))
|
||||
|
||||
#define cpu_has_upll() (cpu_is_at91sam9g45() \
|
||||
|| cpu_is_at91sam9x5() \
|
||||
|| cpu_is_sama5d3())
|
||||
|
||||
/* USB host HS & FS */
|
||||
#define cpu_has_uhp() (!cpu_is_at91sam9rl())
|
||||
|
||||
/* USB device FS only */
|
||||
#define cpu_has_udpfs() (!(cpu_is_at91sam9rl() \
|
||||
|| cpu_is_at91sam9g45() \
|
||||
|| cpu_is_at91sam9x5() \
|
||||
|| cpu_is_sama5d3()))
|
||||
|
||||
#define cpu_has_plladiv2() (cpu_is_at91sam9g45() \
|
||||
|| cpu_is_at91sam9x5() \
|
||||
|| cpu_is_at91sam9n12() \
|
||||
|| cpu_is_sama5d3())
|
||||
|
||||
#define cpu_has_mdiv3() (cpu_is_at91sam9g45() \
|
||||
|| cpu_is_at91sam9x5() \
|
||||
|| cpu_is_at91sam9n12() \
|
||||
|| cpu_is_sama5d3())
|
||||
|
||||
#define cpu_has_alt_prescaler() (cpu_is_at91sam9x5() \
|
||||
|| cpu_is_at91sam9n12() \
|
||||
|| cpu_is_sama5d3())
|
||||
|
||||
static LIST_HEAD(clocks);
|
||||
static DEFINE_SPINLOCK(clk_lock);
|
||||
|
||||
static u32 at91_pllb_usb_init;
|
||||
|
||||
/*
|
||||
* Four primary clock sources: two crystal oscillators (32K, main), and
|
||||
* two PLLs. PLLA usually runs the master clock; and PLLB must run at
|
||||
* 48 MHz (unless no USB function clocks are needed). The main clock and
|
||||
* both PLLs are turned off to run in "slow clock mode" (system suspend).
|
||||
*/
|
||||
struct clk clk32k = {
|
||||
.name = "clk32k",
|
||||
.rate_hz = AT91_SLOW_CLOCK,
|
||||
.users = 1, /* always on */
|
||||
.id = 0,
|
||||
.type = CLK_TYPE_PRIMARY,
|
||||
};
|
||||
static struct clk main_clk = {
|
||||
.name = "main",
|
||||
.pmc_mask = AT91_PMC_MOSCS, /* in PMC_SR */
|
||||
.id = 1,
|
||||
.type = CLK_TYPE_PRIMARY,
|
||||
};
|
||||
static struct clk plla = {
|
||||
.name = "plla",
|
||||
.parent = &main_clk,
|
||||
.pmc_mask = AT91_PMC_LOCKA, /* in PMC_SR */
|
||||
.id = 2,
|
||||
.type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
|
||||
};
|
||||
|
||||
static void pllb_mode(struct clk *clk, int is_on)
|
||||
{
|
||||
u32 value;
|
||||
|
||||
if (is_on) {
|
||||
is_on = AT91_PMC_LOCKB;
|
||||
value = at91_pllb_usb_init;
|
||||
} else
|
||||
value = 0;
|
||||
|
||||
// REVISIT: Add work-around for AT91RM9200 Errata #26 ?
|
||||
at91_pmc_write(AT91_CKGR_PLLBR, value);
|
||||
|
||||
do {
|
||||
cpu_relax();
|
||||
} while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
|
||||
}
|
||||
|
||||
static struct clk pllb = {
|
||||
.name = "pllb",
|
||||
.parent = &main_clk,
|
||||
.pmc_mask = AT91_PMC_LOCKB, /* in PMC_SR */
|
||||
.mode = pllb_mode,
|
||||
.id = 3,
|
||||
.type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
|
||||
};
|
||||
|
||||
static void pmc_sys_mode(struct clk *clk, int is_on)
|
||||
{
|
||||
if (is_on)
|
||||
at91_pmc_write(AT91_PMC_SCER, clk->pmc_mask);
|
||||
else
|
||||
at91_pmc_write(AT91_PMC_SCDR, clk->pmc_mask);
|
||||
}
|
||||
|
||||
static void pmc_uckr_mode(struct clk *clk, int is_on)
|
||||
{
|
||||
unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
|
||||
|
||||
if (is_on) {
|
||||
is_on = AT91_PMC_LOCKU;
|
||||
at91_pmc_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
|
||||
} else
|
||||
at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
|
||||
|
||||
do {
|
||||
cpu_relax();
|
||||
} while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
|
||||
}
|
||||
|
||||
/* USB function clocks (PLLB must be 48 MHz) */
|
||||
static struct clk udpck = {
|
||||
.name = "udpck",
|
||||
.parent = &pllb,
|
||||
.mode = pmc_sys_mode,
|
||||
};
|
||||
struct clk utmi_clk = {
|
||||
.name = "utmi_clk",
|
||||
.parent = &main_clk,
|
||||
.pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */
|
||||
.mode = pmc_uckr_mode,
|
||||
.type = CLK_TYPE_PLL,
|
||||
};
|
||||
static struct clk uhpck = {
|
||||
.name = "uhpck",
|
||||
/*.parent = ... we choose parent at runtime */
|
||||
.mode = pmc_sys_mode,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* The master clock is divided from the CPU clock (by 1-4). It's used for
|
||||
* memory, interfaces to on-chip peripherals, the AIC, and sometimes more
|
||||
* (e.g baud rate generation). It's sourced from one of the primary clocks.
|
||||
*/
|
||||
struct clk mck = {
|
||||
.name = "mck",
|
||||
.pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */
|
||||
};
|
||||
|
||||
static void pmc_periph_mode(struct clk *clk, int is_on)
|
||||
{
|
||||
u32 regval = 0;
|
||||
|
||||
/*
|
||||
* With sama5d3 devices, we are managing clock division so we have to
|
||||
* use the Peripheral Control Register introduced from at91sam9x5
|
||||
* devices.
|
||||
*/
|
||||
if (cpu_is_sama5d3()) {
|
||||
regval |= AT91_PMC_PCR_CMD; /* write command */
|
||||
regval |= clk->pid & AT91_PMC_PCR_PID; /* peripheral selection */
|
||||
regval |= AT91_PMC_PCR_DIV(clk->div);
|
||||
if (is_on)
|
||||
regval |= AT91_PMC_PCR_EN; /* enable clock */
|
||||
at91_pmc_write(AT91_PMC_PCR, regval);
|
||||
} else {
|
||||
if (is_on)
|
||||
at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask);
|
||||
else
|
||||
at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask);
|
||||
}
|
||||
}
|
||||
|
||||
static struct clk __init *at91_css_to_clk(unsigned long css)
|
||||
{
|
||||
switch (css) {
|
||||
case AT91_PMC_CSS_SLOW:
|
||||
return &clk32k;
|
||||
case AT91_PMC_CSS_MAIN:
|
||||
return &main_clk;
|
||||
case AT91_PMC_CSS_PLLA:
|
||||
return &plla;
|
||||
case AT91_PMC_CSS_PLLB:
|
||||
if (cpu_has_upll())
|
||||
/* CSS_PLLB == CSS_UPLL */
|
||||
return &utmi_clk;
|
||||
else if (cpu_has_pllb())
|
||||
return &pllb;
|
||||
break;
|
||||
/* alternate PMC: can use master clock */
|
||||
case AT91_PMC_CSS_MASTER:
|
||||
return &mck;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int pmc_prescaler_divider(u32 reg)
|
||||
{
|
||||
if (cpu_has_alt_prescaler()) {
|
||||
return 1 << ((reg & AT91_PMC_ALT_PRES) >> PMC_ALT_PRES_OFFSET);
|
||||
} else {
|
||||
return 1 << ((reg & AT91_PMC_PRES) >> PMC_PRES_OFFSET);
|
||||
}
|
||||
}
|
||||
|
||||
static void __clk_enable(struct clk *clk)
|
||||
{
|
||||
if (clk->parent)
|
||||
__clk_enable(clk->parent);
|
||||
if (clk->users++ == 0 && clk->mode)
|
||||
clk->mode(clk, 1);
|
||||
}
|
||||
|
||||
int clk_enable(struct clk *clk)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
__clk_enable(clk);
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_enable);
|
||||
|
||||
static void __clk_disable(struct clk *clk)
|
||||
{
|
||||
BUG_ON(clk->users == 0);
|
||||
if (--clk->users == 0 && clk->mode)
|
||||
clk->mode(clk, 0);
|
||||
if (clk->parent)
|
||||
__clk_disable(clk->parent);
|
||||
}
|
||||
|
||||
void clk_disable(struct clk *clk)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
__clk_disable(clk);
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
||||
unsigned long clk_get_rate(struct clk *clk)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned long rate;
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
for (;;) {
|
||||
rate = clk->rate_hz;
|
||||
if (rate || !clk->parent)
|
||||
break;
|
||||
clk = clk->parent;
|
||||
}
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return rate;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get_rate);
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* For now, only the programmable clocks support reparenting (MCK could
|
||||
* do this too, with care) or rate changing (the PLLs could do this too,
|
||||
* ditto MCK but that's more for cpufreq). Drivers may reparent to get
|
||||
* a better rate match; we don't.
|
||||
*/
|
||||
|
||||
long clk_round_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned prescale;
|
||||
unsigned long actual;
|
||||
unsigned long prev = ULONG_MAX;
|
||||
|
||||
if (!clk_is_programmable(clk))
|
||||
return -EINVAL;
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
actual = clk->parent->rate_hz;
|
||||
for (prescale = 0; prescale < 7; prescale++) {
|
||||
if (actual > rate)
|
||||
prev = actual;
|
||||
|
||||
if (actual && actual <= rate) {
|
||||
if ((prev - rate) < (rate - actual)) {
|
||||
actual = prev;
|
||||
prescale--;
|
||||
}
|
||||
break;
|
||||
}
|
||||
actual >>= 1;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return (prescale < 7) ? actual : -ENOENT;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_round_rate);
|
||||
|
||||
int clk_set_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned prescale;
|
||||
unsigned long prescale_offset, css_mask;
|
||||
unsigned long actual;
|
||||
|
||||
if (!clk_is_programmable(clk))
|
||||
return -EINVAL;
|
||||
if (clk->users)
|
||||
return -EBUSY;
|
||||
|
||||
if (cpu_has_alt_prescaler()) {
|
||||
prescale_offset = PMC_ALT_PRES_OFFSET;
|
||||
css_mask = AT91_PMC_ALT_PCKR_CSS;
|
||||
} else {
|
||||
prescale_offset = PMC_PRES_OFFSET;
|
||||
css_mask = AT91_PMC_CSS;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
actual = clk->parent->rate_hz;
|
||||
for (prescale = 0; prescale < 7; prescale++) {
|
||||
if (actual && actual <= rate) {
|
||||
u32 pckr;
|
||||
|
||||
pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
|
||||
pckr &= css_mask; /* keep clock selection */
|
||||
pckr |= prescale << prescale_offset;
|
||||
at91_pmc_write(AT91_PMC_PCKR(clk->id), pckr);
|
||||
clk->rate_hz = actual;
|
||||
break;
|
||||
}
|
||||
actual >>= 1;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return (prescale < 7) ? actual : -ENOENT;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_set_rate);
|
||||
|
||||
struct clk *clk_get_parent(struct clk *clk)
|
||||
{
|
||||
return clk->parent;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get_parent);
|
||||
|
||||
int clk_set_parent(struct clk *clk, struct clk *parent)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
if (clk->users)
|
||||
return -EBUSY;
|
||||
if (!clk_is_primary(parent) || !clk_is_programmable(clk))
|
||||
return -EINVAL;
|
||||
|
||||
if (cpu_is_at91sam9rl() && parent->id == AT91_PMC_CSS_PLLB)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&clk_lock, flags);
|
||||
|
||||
clk->rate_hz = parent->rate_hz;
|
||||
clk->parent = parent;
|
||||
at91_pmc_write(AT91_PMC_PCKR(clk->id), parent->id);
|
||||
|
||||
spin_unlock_irqrestore(&clk_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_set_parent);
|
||||
|
||||
/* establish PCK0..PCKN parentage and rate */
|
||||
static void __init init_programmable_clock(struct clk *clk)
|
||||
{
|
||||
struct clk *parent;
|
||||
u32 pckr;
|
||||
unsigned int css_mask;
|
||||
|
||||
if (cpu_has_alt_prescaler())
|
||||
css_mask = AT91_PMC_ALT_PCKR_CSS;
|
||||
else
|
||||
css_mask = AT91_PMC_CSS;
|
||||
|
||||
pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
|
||||
parent = at91_css_to_clk(pckr & css_mask);
|
||||
clk->parent = parent;
|
||||
clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr);
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
static int at91_clk_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
u32 scsr, pcsr, pcsr1 = 0, uckr = 0, sr;
|
||||
struct clk *clk;
|
||||
|
||||
scsr = at91_pmc_read(AT91_PMC_SCSR);
|
||||
pcsr = at91_pmc_read(AT91_PMC_PCSR);
|
||||
if (cpu_is_sama5d3())
|
||||
pcsr1 = at91_pmc_read(AT91_PMC_PCSR1);
|
||||
sr = at91_pmc_read(AT91_PMC_SR);
|
||||
seq_printf(s, "SCSR = %8x\n", scsr);
|
||||
seq_printf(s, "PCSR = %8x\n", pcsr);
|
||||
if (cpu_is_sama5d3())
|
||||
seq_printf(s, "PCSR1 = %8x\n", pcsr1);
|
||||
seq_printf(s, "MOR = %8x\n", at91_pmc_read(AT91_CKGR_MOR));
|
||||
seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR));
|
||||
seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR));
|
||||
if (cpu_has_pllb())
|
||||
seq_printf(s, "PLLB = %8x\n", at91_pmc_read(AT91_CKGR_PLLBR));
|
||||
if (cpu_has_utmi()) {
|
||||
uckr = at91_pmc_read(AT91_CKGR_UCKR);
|
||||
seq_printf(s, "UCKR = %8x\n", uckr);
|
||||
}
|
||||
seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR));
|
||||
if (cpu_has_upll() || cpu_is_at91sam9n12())
|
||||
seq_printf(s, "USB = %8x\n", at91_pmc_read(AT91_PMC_USB));
|
||||
seq_printf(s, "SR = %8x\n", sr);
|
||||
|
||||
seq_printf(s, "\n");
|
||||
|
||||
list_for_each_entry(clk, &clocks, node) {
|
||||
char *state;
|
||||
|
||||
if (clk->mode == pmc_sys_mode) {
|
||||
state = (scsr & clk->pmc_mask) ? "on" : "off";
|
||||
} else if (clk->mode == pmc_periph_mode) {
|
||||
if (cpu_is_sama5d3()) {
|
||||
u32 pmc_mask = 1 << (clk->pid % 32);
|
||||
|
||||
if (clk->pid > 31)
|
||||
state = (pcsr1 & pmc_mask) ? "on" : "off";
|
||||
else
|
||||
state = (pcsr & pmc_mask) ? "on" : "off";
|
||||
} else {
|
||||
state = (pcsr & clk->pmc_mask) ? "on" : "off";
|
||||
}
|
||||
} else if (clk->mode == pmc_uckr_mode) {
|
||||
state = (uckr & clk->pmc_mask) ? "on" : "off";
|
||||
} else if (clk->pmc_mask) {
|
||||
state = (sr & clk->pmc_mask) ? "on" : "off";
|
||||
} else if (clk == &clk32k || clk == &main_clk) {
|
||||
state = "on";
|
||||
} else {
|
||||
state = "";
|
||||
}
|
||||
|
||||
seq_printf(s, "%-10s users=%2d %-3s %9lu Hz %s\n",
|
||||
clk->name, clk->users, state, clk_get_rate(clk),
|
||||
clk->parent ? clk->parent->name : "");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int at91_clk_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, at91_clk_show, NULL);
|
||||
}
|
||||
|
||||
static const struct file_operations at91_clk_operations = {
|
||||
.open = at91_clk_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static int __init at91_clk_debugfs_init(void)
|
||||
{
|
||||
/* /sys/kernel/debug/at91_clk */
|
||||
(void) debugfs_create_file("at91_clk", S_IFREG | S_IRUGO, NULL, NULL, &at91_clk_operations);
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(at91_clk_debugfs_init);
|
||||
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
/* Register a new clock */
|
||||
static void __init at91_clk_add(struct clk *clk)
|
||||
{
|
||||
list_add_tail(&clk->node, &clocks);
|
||||
|
||||
clk->cl.con_id = clk->name;
|
||||
clk->cl.clk = clk;
|
||||
clkdev_add(&clk->cl);
|
||||
}
|
||||
|
||||
int __init clk_register(struct clk *clk)
|
||||
{
|
||||
if (clk_is_peripheral(clk)) {
|
||||
if (!clk->parent)
|
||||
clk->parent = &mck;
|
||||
if (cpu_is_sama5d3())
|
||||
clk->rate_hz = DIV_ROUND_UP(clk->parent->rate_hz,
|
||||
1 << clk->div);
|
||||
clk->mode = pmc_periph_mode;
|
||||
}
|
||||
else if (clk_is_sys(clk)) {
|
||||
clk->parent = &mck;
|
||||
clk->mode = pmc_sys_mode;
|
||||
}
|
||||
else if (clk_is_programmable(clk)) {
|
||||
clk->mode = pmc_sys_mode;
|
||||
init_programmable_clock(clk);
|
||||
}
|
||||
|
||||
at91_clk_add(clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
||||
static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
|
||||
{
|
||||
unsigned mul, div;
|
||||
|
||||
div = reg & 0xff;
|
||||
if (cpu_is_sama5d3())
|
||||
mul = AT91_PMC3_MUL_GET(reg);
|
||||
else
|
||||
mul = AT91_PMC_MUL_GET(reg);
|
||||
|
||||
if (div && mul) {
|
||||
freq /= div;
|
||||
freq *= mul + 1;
|
||||
} else
|
||||
freq = 0;
|
||||
|
||||
return freq;
|
||||
}
|
||||
|
||||
static u32 __init at91_usb_rate(struct clk *pll, u32 freq, u32 reg)
|
||||
{
|
||||
if (pll == &pllb && (reg & AT91_PMC_USB96M))
|
||||
return freq / 2;
|
||||
else if (pll == &utmi_clk || cpu_is_at91sam9n12())
|
||||
return freq / (1 + ((reg & AT91_PMC_OHCIUSBDIV) >> 8));
|
||||
else
|
||||
return freq;
|
||||
}
|
||||
|
||||
static unsigned __init at91_pll_calc(unsigned main_freq, unsigned out_freq)
|
||||
{
|
||||
unsigned i, div = 0, mul = 0, diff = 1 << 30;
|
||||
unsigned ret = (out_freq > 155000000) ? 0xbe00 : 0x3e00;
|
||||
|
||||
/* PLL output max 240 MHz (or 180 MHz per errata) */
|
||||
if (out_freq > 240000000)
|
||||
goto fail;
|
||||
|
||||
for (i = 1; i < 256; i++) {
|
||||
int diff1;
|
||||
unsigned input, mul1;
|
||||
|
||||
/*
|
||||
* PLL input between 1MHz and 32MHz per spec, but lower
|
||||
* frequences seem necessary in some cases so allow 100K.
|
||||
* Warning: some newer products need 2MHz min.
|
||||
*/
|
||||
input = main_freq / i;
|
||||
if (cpu_is_at91sam9g20() && input < 2000000)
|
||||
continue;
|
||||
if (input < 100000)
|
||||
continue;
|
||||
if (input > 32000000)
|
||||
continue;
|
||||
|
||||
mul1 = out_freq / input;
|
||||
if (cpu_is_at91sam9g20() && mul > 63)
|
||||
continue;
|
||||
if (mul1 > 2048)
|
||||
continue;
|
||||
if (mul1 < 2)
|
||||
goto fail;
|
||||
|
||||
diff1 = out_freq - input * mul1;
|
||||
if (diff1 < 0)
|
||||
diff1 = -diff1;
|
||||
if (diff > diff1) {
|
||||
diff = diff1;
|
||||
div = i;
|
||||
mul = mul1;
|
||||
if (diff == 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i == 256 && diff > (out_freq >> 5))
|
||||
goto fail;
|
||||
return ret | ((mul - 1) << 16) | div;
|
||||
fail:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct clk *const standard_pmc_clocks[] __initconst = {
|
||||
/* four primary clocks */
|
||||
&clk32k,
|
||||
&main_clk,
|
||||
&plla,
|
||||
|
||||
/* MCK */
|
||||
&mck
|
||||
};
|
||||
|
||||
/* PLLB generated USB full speed clock init */
|
||||
static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
|
||||
{
|
||||
unsigned int reg;
|
||||
|
||||
/*
|
||||
* USB clock init: choose 48 MHz PLLB value,
|
||||
* disable 48MHz clock during usb peripheral suspend.
|
||||
*
|
||||
* REVISIT: assumes MCK doesn't derive from PLLB!
|
||||
*/
|
||||
uhpck.parent = &pllb;
|
||||
|
||||
reg = at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2);
|
||||
pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
|
||||
if (cpu_is_at91rm9200()) {
|
||||
reg = at91_pllb_usb_init |= AT91_PMC_USB96M;
|
||||
uhpck.pmc_mask = AT91RM9200_PMC_UHP;
|
||||
udpck.pmc_mask = AT91RM9200_PMC_UDP;
|
||||
at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
|
||||
} else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
|
||||
cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
|
||||
cpu_is_at91sam9g10()) {
|
||||
reg = at91_pllb_usb_init |= AT91_PMC_USB96M;
|
||||
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
|
||||
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
|
||||
} else if (cpu_is_at91sam9n12()) {
|
||||
/* Divider for USB clock is in USB clock register for 9n12 */
|
||||
reg = AT91_PMC_USBS_PLLB;
|
||||
|
||||
/* For PLLB output 96M, set usb divider 2 (USBDIV + 1) */
|
||||
reg |= AT91_PMC_OHCIUSBDIV_2;
|
||||
at91_pmc_write(AT91_PMC_USB, reg);
|
||||
|
||||
/* Still setup masks */
|
||||
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
|
||||
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
|
||||
}
|
||||
at91_pmc_write(AT91_CKGR_PLLBR, 0);
|
||||
|
||||
udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg);
|
||||
uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg);
|
||||
}
|
||||
|
||||
/* UPLL generated USB full speed clock init */
|
||||
static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
|
||||
{
|
||||
/*
|
||||
* USB clock init: choose 480 MHz from UPLL,
|
||||
*/
|
||||
unsigned int usbr = AT91_PMC_USBS_UPLL;
|
||||
|
||||
/* Setup divider by 10 to reach 48 MHz */
|
||||
usbr |= ((10 - 1) << 8) & AT91_PMC_OHCIUSBDIV;
|
||||
|
||||
at91_pmc_write(AT91_PMC_USB, usbr);
|
||||
|
||||
/* Now set uhpck values */
|
||||
uhpck.parent = &utmi_clk;
|
||||
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
|
||||
uhpck.rate_hz = at91_usb_rate(&utmi_clk, utmi_clk.rate_hz, usbr);
|
||||
}
|
||||
|
||||
static int __init at91_pmc_init(unsigned long main_clock)
|
||||
{
|
||||
unsigned tmp, freq, mckr;
|
||||
int i;
|
||||
int pll_overclock = false;
|
||||
|
||||
/*
|
||||
* When the bootloader initialized the main oscillator correctly,
|
||||
* there's no problem using the cycle counter. But if it didn't,
|
||||
* or when using oscillator bypass mode, we must be told the speed
|
||||
* of the main clock.
|
||||
*/
|
||||
if (!main_clock) {
|
||||
do {
|
||||
tmp = at91_pmc_read(AT91_CKGR_MCFR);
|
||||
} while (!(tmp & AT91_PMC_MAINRDY));
|
||||
main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16);
|
||||
}
|
||||
main_clk.rate_hz = main_clock;
|
||||
|
||||
/* report if PLLA is more than mildly overclocked */
|
||||
plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR));
|
||||
if (cpu_has_1056M_plla()) {
|
||||
if (plla.rate_hz > 1056000000)
|
||||
pll_overclock = true;
|
||||
} else if (cpu_has_800M_plla()) {
|
||||
if (plla.rate_hz > 800000000)
|
||||
pll_overclock = true;
|
||||
} else if (cpu_has_300M_plla()) {
|
||||
if (plla.rate_hz > 300000000)
|
||||
pll_overclock = true;
|
||||
} else if (cpu_has_240M_plla()) {
|
||||
if (plla.rate_hz > 240000000)
|
||||
pll_overclock = true;
|
||||
} else if (cpu_has_210M_plla()) {
|
||||
if (plla.rate_hz > 210000000)
|
||||
pll_overclock = true;
|
||||
} else {
|
||||
if (plla.rate_hz > 209000000)
|
||||
pll_overclock = true;
|
||||
}
|
||||
if (pll_overclock)
|
||||
pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
|
||||
|
||||
if (cpu_has_plladiv2()) {
|
||||
mckr = at91_pmc_read(AT91_PMC_MCKR);
|
||||
plla.rate_hz /= (1 << ((mckr & AT91_PMC_PLLADIV2) >> 12)); /* plla divisor by 2 */
|
||||
}
|
||||
|
||||
if (!cpu_has_pllb() && cpu_has_upll()) {
|
||||
/* setup UTMI clock as the fourth primary clock
|
||||
* (instead of pllb) */
|
||||
utmi_clk.type |= CLK_TYPE_PRIMARY;
|
||||
utmi_clk.id = 3;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* USB HS clock init
|
||||
*/
|
||||
if (cpu_has_utmi()) {
|
||||
/*
|
||||
* multiplier is hard-wired to 40
|
||||
* (obtain the USB High Speed 480 MHz when input is 12 MHz)
|
||||
*/
|
||||
utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz;
|
||||
|
||||
/* UTMI bias and PLL are managed at the same time */
|
||||
if (cpu_has_upll())
|
||||
utmi_clk.pmc_mask |= AT91_PMC_BIASEN;
|
||||
}
|
||||
|
||||
/*
|
||||
* USB FS clock init
|
||||
*/
|
||||
if (cpu_has_pllb())
|
||||
at91_pllb_usbfs_clock_init(main_clock);
|
||||
if (cpu_has_upll())
|
||||
/* assumes that we choose UPLL for USB and not PLLA */
|
||||
at91_upll_usbfs_clock_init(main_clock);
|
||||
|
||||
/*
|
||||
* MCK and CPU derive from one of those primary clocks.
|
||||
* For now, assume this parentage won't change.
|
||||
*/
|
||||
mckr = at91_pmc_read(AT91_PMC_MCKR);
|
||||
mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
|
||||
freq = mck.parent->rate_hz;
|
||||
freq /= pmc_prescaler_divider(mckr); /* prescale */
|
||||
if (cpu_is_at91rm9200()) {
|
||||
mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
|
||||
} else if (cpu_is_at91sam9g20()) {
|
||||
mck.rate_hz = (mckr & AT91_PMC_MDIV) ?
|
||||
freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq; /* mdiv ; (x >> 7) = ((x >> 8) * 2) */
|
||||
if (mckr & AT91_PMC_PDIV)
|
||||
freq /= 2; /* processor clock division */
|
||||
} else if (cpu_has_mdiv3()) {
|
||||
mck.rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ?
|
||||
freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
|
||||
} else {
|
||||
mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
|
||||
}
|
||||
|
||||
if (cpu_has_alt_prescaler()) {
|
||||
/* Programmable clocks can use MCK */
|
||||
mck.type |= CLK_TYPE_PRIMARY;
|
||||
mck.id = 4;
|
||||
}
|
||||
|
||||
/* Register the PMC's standard clocks */
|
||||
for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
|
||||
at91_clk_add(standard_pmc_clocks[i]);
|
||||
|
||||
if (cpu_has_pllb())
|
||||
at91_clk_add(&pllb);
|
||||
|
||||
if (cpu_has_uhp())
|
||||
at91_clk_add(&uhpck);
|
||||
|
||||
if (cpu_has_udpfs())
|
||||
at91_clk_add(&udpck);
|
||||
|
||||
if (cpu_has_utmi())
|
||||
at91_clk_add(&utmi_clk);
|
||||
|
||||
/* MCK and CPU clock are "always on" */
|
||||
clk_enable(&mck);
|
||||
|
||||
printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
|
||||
freq / 1000000, (unsigned) mck.rate_hz / 1000000,
|
||||
(unsigned) main_clock / 1000000,
|
||||
((unsigned) main_clock % 1000000) / 1000);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
static struct of_device_id pmc_ids[] = {
|
||||
{ .compatible = "atmel,at91rm9200-pmc" },
|
||||
{ .compatible = "atmel,at91sam9260-pmc" },
|
||||
{ .compatible = "atmel,at91sam9g45-pmc" },
|
||||
{ .compatible = "atmel,at91sam9n12-pmc" },
|
||||
{ .compatible = "atmel,at91sam9x5-pmc" },
|
||||
{ .compatible = "atmel,sama5d3-pmc" },
|
||||
{ /*sentinel*/ }
|
||||
};
|
||||
|
||||
static struct of_device_id osc_ids[] = {
|
||||
{ .compatible = "atmel,osc" },
|
||||
{ /*sentinel*/ }
|
||||
};
|
||||
|
||||
int __init at91_dt_clock_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
u32 main_clock = 0;
|
||||
|
||||
np = of_find_matching_node(NULL, pmc_ids);
|
||||
if (!np)
|
||||
panic("unable to find compatible pmc node in dtb\n");
|
||||
|
||||
at91_pmc_base = of_iomap(np, 0);
|
||||
if (!at91_pmc_base)
|
||||
panic("unable to map pmc cpu registers\n");
|
||||
|
||||
of_node_put(np);
|
||||
|
||||
/* retrieve the freqency of fixed clocks from device tree */
|
||||
np = of_find_matching_node(NULL, osc_ids);
|
||||
if (np) {
|
||||
u32 rate;
|
||||
if (!of_property_read_u32(np, "clock-frequency", &rate))
|
||||
main_clock = rate;
|
||||
}
|
||||
|
||||
of_node_put(np);
|
||||
|
||||
return at91_pmc_init(main_clock);
|
||||
}
|
||||
#endif
|
||||
|
||||
int __init at91_clock_init(unsigned long main_clock)
|
||||
{
|
||||
at91_pmc_base = ioremap(AT91_PMC, 256);
|
||||
if (!at91_pmc_base)
|
||||
panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
|
||||
|
||||
return at91_pmc_init(main_clock);
|
||||
}
|
||||
|
||||
/*
|
||||
* Several unused clocks may be active. Turn them off.
|
||||
*/
|
||||
static int __init at91_clock_reset(void)
|
||||
{
|
||||
unsigned long pcdr = 0;
|
||||
unsigned long pcdr1 = 0;
|
||||
unsigned long scdr = 0;
|
||||
struct clk *clk;
|
||||
|
||||
list_for_each_entry(clk, &clocks, node) {
|
||||
if (clk->users > 0)
|
||||
continue;
|
||||
|
||||
if (clk->mode == pmc_periph_mode) {
|
||||
if (cpu_is_sama5d3()) {
|
||||
u32 pmc_mask = 1 << (clk->pid % 32);
|
||||
|
||||
if (clk->pid > 31)
|
||||
pcdr1 |= pmc_mask;
|
||||
else
|
||||
pcdr |= pmc_mask;
|
||||
} else
|
||||
pcdr |= clk->pmc_mask;
|
||||
}
|
||||
|
||||
if (clk->mode == pmc_sys_mode)
|
||||
scdr |= clk->pmc_mask;
|
||||
|
||||
pr_debug("Clocks: disable unused %s\n", clk->name);
|
||||
}
|
||||
|
||||
at91_pmc_write(AT91_PMC_SCDR, scdr);
|
||||
at91_pmc_write(AT91_PMC_PCDR, pcdr);
|
||||
if (cpu_is_sama5d3())
|
||||
at91_pmc_write(AT91_PMC_PCDR1, pcdr1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
late_initcall(at91_clock_reset);
|
||||
|
||||
void at91sam9_idle(void)
|
||||
{
|
||||
at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/clock.h
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/clkdev.h>
|
||||
|
||||
#define CLK_TYPE_PRIMARY 0x1
|
||||
#define CLK_TYPE_PLL 0x2
|
||||
#define CLK_TYPE_PROGRAMMABLE 0x4
|
||||
#define CLK_TYPE_PERIPHERAL 0x8
|
||||
#define CLK_TYPE_SYSTEM 0x10
|
||||
|
||||
|
||||
struct clk {
|
||||
struct list_head node;
|
||||
const char *name; /* unique clock name */
|
||||
struct clk_lookup cl;
|
||||
unsigned long rate_hz;
|
||||
unsigned div; /* parent clock divider */
|
||||
struct clk *parent;
|
||||
unsigned pid; /* peripheral ID */
|
||||
u32 pmc_mask;
|
||||
void (*mode)(struct clk *, int);
|
||||
unsigned id:3; /* PCK0..4, or 32k/main/a/b */
|
||||
unsigned type; /* clock type */
|
||||
u16 users;
|
||||
};
|
||||
|
||||
|
||||
extern int __init clk_register(struct clk *clk);
|
||||
extern struct clk mck;
|
||||
extern struct clk utmi_clk;
|
||||
extern struct clk clk32k;
|
||||
|
||||
#define CLKDEV_CON_ID(_id, _clk) \
|
||||
{ \
|
||||
.con_id = _id, \
|
||||
.clk = _clk, \
|
||||
}
|
||||
|
||||
#define CLKDEV_CON_DEV_ID(_con_id, _dev_id, _clk) \
|
||||
{ \
|
||||
.con_id = _con_id, \
|
||||
.dev_id = _dev_id, \
|
||||
.clk = _clk, \
|
||||
}
|
||||
|
|
@ -11,7 +11,6 @@
|
|||
#ifndef _AT91_GENERIC_H
|
||||
#define _AT91_GENERIC_H
|
||||
|
||||
#include <linux/clkdev.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/reboot.h>
|
||||
|
||||
|
|
@ -23,68 +22,19 @@ extern void __init at91_init_sram(int bank, unsigned long base,
|
|||
|
||||
/* Processors */
|
||||
extern void __init at91rm9200_set_type(int type);
|
||||
extern void __init at91_initialize(unsigned long main_clock);
|
||||
extern void __init at91rm9200_dt_initialize(void);
|
||||
extern void __init at91_dt_initialize(void);
|
||||
|
||||
/* Interrupts */
|
||||
extern void __init at91_init_irq_default(void);
|
||||
extern void __init at91_init_interrupts(unsigned int priority[]);
|
||||
extern void __init at91_aic_init(unsigned int priority[],
|
||||
unsigned int ext_irq_mask);
|
||||
extern int __init at91_aic_of_init(struct device_node *node,
|
||||
struct device_node *parent);
|
||||
extern int __init at91_aic5_of_init(struct device_node *node,
|
||||
struct device_node *parent);
|
||||
extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
|
||||
extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
|
||||
|
||||
/* Devices */
|
||||
extern void __init at91_register_devices(void);
|
||||
|
||||
/* Timer */
|
||||
extern void __init at91_init_time(void);
|
||||
extern void at91rm9200_ioremap_st(u32 addr);
|
||||
extern void at91rm9200_timer_init(void);
|
||||
extern void at91sam926x_ioremap_pit(u32 addr);
|
||||
extern void at91sam926x_pit_init(int irq);
|
||||
|
||||
/* Clocks */
|
||||
#ifdef CONFIG_OLD_CLK_AT91
|
||||
extern int __init at91_clock_init(unsigned long main_clock);
|
||||
extern int __init at91_dt_clock_init(void);
|
||||
#else
|
||||
static int inline at91_clock_init(unsigned long main_clock) { return 0; }
|
||||
static int inline at91_dt_clock_init(void) { return 0; }
|
||||
#endif
|
||||
struct device;
|
||||
|
||||
/* Power Management */
|
||||
extern void at91_irq_suspend(void);
|
||||
extern void at91_irq_resume(void);
|
||||
|
||||
/* idle */
|
||||
extern void at91sam9_idle(void);
|
||||
|
||||
/* Matrix */
|
||||
extern void at91_ioremap_matrix(u32 base_addr);
|
||||
|
||||
/* Ram Controler */
|
||||
extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
|
||||
|
||||
/* GPIO */
|
||||
#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
|
||||
#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
|
||||
|
||||
struct at91_gpio_bank {
|
||||
unsigned short id; /* peripheral ID */
|
||||
unsigned long regbase; /* offset from system peripheral base */
|
||||
};
|
||||
extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
|
||||
extern void __init at91_gpio_irq_setup(void);
|
||||
extern int __init at91_gpio_of_irq_setup(struct device_node *node,
|
||||
struct device_node *parent);
|
||||
|
||||
extern u32 at91_get_extern_irq(void);
|
||||
|
||||
#endif /* _AT91_GENERIC_H */
|
||||
|
|
|
|||
|
|
@ -1,982 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/gpio.c
|
||||
*
|
||||
* Copyright (C) 2005 HP Labs
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/irqchip/chained_irq.h>
|
||||
#include <linux/of_address.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91_pio.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "gpio.h"
|
||||
|
||||
#define MAX_NB_GPIO_PER_BANK 32
|
||||
|
||||
struct at91_gpio_chip {
|
||||
struct gpio_chip chip;
|
||||
struct at91_gpio_chip *next; /* Bank sharing same clock */
|
||||
int pioc_hwirq; /* PIO bank interrupt identifier on AIC */
|
||||
int pioc_virq; /* PIO bank Linux virtual interrupt */
|
||||
int pioc_idx; /* PIO bank index */
|
||||
void __iomem *regbase; /* PIO bank virtual address */
|
||||
struct clk *clock; /* associated clock */
|
||||
struct irq_domain *domain; /* associated irq domain */
|
||||
};
|
||||
|
||||
#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
|
||||
|
||||
static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset);
|
||||
static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip);
|
||||
static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val);
|
||||
static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset);
|
||||
static int at91_gpiolib_get_direction(struct gpio_chip *chip, unsigned offset);
|
||||
static int at91_gpiolib_direction_output(struct gpio_chip *chip,
|
||||
unsigned offset, int val);
|
||||
static int at91_gpiolib_direction_input(struct gpio_chip *chip,
|
||||
unsigned offset);
|
||||
static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
|
||||
|
||||
#define AT91_GPIO_CHIP(name) \
|
||||
{ \
|
||||
.chip = { \
|
||||
.label = name, \
|
||||
.request = at91_gpiolib_request, \
|
||||
.get_direction = at91_gpiolib_get_direction, \
|
||||
.direction_input = at91_gpiolib_direction_input, \
|
||||
.direction_output = at91_gpiolib_direction_output, \
|
||||
.get = at91_gpiolib_get, \
|
||||
.set = at91_gpiolib_set, \
|
||||
.dbg_show = at91_gpiolib_dbg_show, \
|
||||
.to_irq = at91_gpiolib_to_irq, \
|
||||
.ngpio = MAX_NB_GPIO_PER_BANK, \
|
||||
}, \
|
||||
}
|
||||
|
||||
static struct at91_gpio_chip gpio_chip[] = {
|
||||
AT91_GPIO_CHIP("pioA"),
|
||||
AT91_GPIO_CHIP("pioB"),
|
||||
AT91_GPIO_CHIP("pioC"),
|
||||
AT91_GPIO_CHIP("pioD"),
|
||||
AT91_GPIO_CHIP("pioE"),
|
||||
};
|
||||
|
||||
static int gpio_banks;
|
||||
static unsigned long at91_gpio_caps;
|
||||
|
||||
/* All PIO controllers support PIO3 features */
|
||||
#define AT91_GPIO_CAP_PIO3 (1 << 0)
|
||||
|
||||
#define has_pio3() (at91_gpio_caps & AT91_GPIO_CAP_PIO3)
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
static inline void __iomem *pin_to_controller(unsigned pin)
|
||||
{
|
||||
pin /= MAX_NB_GPIO_PER_BANK;
|
||||
if (likely(pin < gpio_banks))
|
||||
return gpio_chip[pin].regbase;
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline unsigned pin_to_mask(unsigned pin)
|
||||
{
|
||||
return 1 << (pin % MAX_NB_GPIO_PER_BANK);
|
||||
}
|
||||
|
||||
|
||||
static char peripheral_function(void __iomem *pio, unsigned mask)
|
||||
{
|
||||
char ret = 'X';
|
||||
u8 select;
|
||||
|
||||
if (pio) {
|
||||
if (has_pio3()) {
|
||||
select = !!(__raw_readl(pio + PIO_ABCDSR1) & mask);
|
||||
select |= (!!(__raw_readl(pio + PIO_ABCDSR2) & mask) << 1);
|
||||
ret = 'A' + select;
|
||||
} else {
|
||||
ret = __raw_readl(pio + PIO_ABSR) & mask ?
|
||||
'B' : 'A';
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
/* Not all hardware capabilities are exposed through these calls; they
|
||||
* only encapsulate the most common features and modes. (So if you
|
||||
* want to change signals in groups, do it directly.)
|
||||
*
|
||||
* Bootloaders will usually handle some of the pin multiplexing setup.
|
||||
* The intent is certainly that by the time Linux is fully booted, all
|
||||
* pins should have been fully initialized. These setup calls should
|
||||
* only be used by board setup routines, or possibly in driver probe().
|
||||
*
|
||||
* For bootloaders doing all that setup, these calls could be inlined
|
||||
* as NOPs so Linux won't duplicate any setup code
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the "GPIO" peripheral role.
|
||||
*/
|
||||
int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
__raw_writel(mask, pio + PIO_PER);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_GPIO_periph);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the "A" internal peripheral role.
|
||||
*/
|
||||
int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
if (has_pio3()) {
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask,
|
||||
pio + PIO_ABCDSR1);
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
|
||||
pio + PIO_ABCDSR2);
|
||||
} else {
|
||||
__raw_writel(mask, pio + PIO_ASR);
|
||||
}
|
||||
__raw_writel(mask, pio + PIO_PDR);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_A_periph);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the "B" internal peripheral role.
|
||||
*/
|
||||
int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
if (has_pio3()) {
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask,
|
||||
pio + PIO_ABCDSR1);
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
|
||||
pio + PIO_ABCDSR2);
|
||||
} else {
|
||||
__raw_writel(mask, pio + PIO_BSR);
|
||||
}
|
||||
__raw_writel(mask, pio + PIO_PDR);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_B_periph);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the "C" internal peripheral role.
|
||||
*/
|
||||
int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio || !has_pio3())
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
|
||||
__raw_writel(mask, pio + PIO_PDR);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_C_periph);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the "D" internal peripheral role.
|
||||
*/
|
||||
int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio || !has_pio3())
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
|
||||
__raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
|
||||
__raw_writel(mask, pio + PIO_PDR);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_D_periph);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the gpio controller (instead of "A", "B", "C"
|
||||
* or "D" peripheral), and configure it for an input.
|
||||
*/
|
||||
int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
|
||||
__raw_writel(mask, pio + PIO_ODR);
|
||||
__raw_writel(mask, pio + PIO_PER);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_gpio_input);
|
||||
|
||||
|
||||
/*
|
||||
* mux the pin to the gpio controller (instead of "A", "B", "C"
|
||||
* or "D" peripheral), and configure it for an output.
|
||||
*/
|
||||
int __init_or_module at91_set_gpio_output(unsigned pin, int value)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
__raw_writel(mask, pio + PIO_PUDR);
|
||||
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
|
||||
__raw_writel(mask, pio + PIO_OER);
|
||||
__raw_writel(mask, pio + PIO_PER);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_gpio_output);
|
||||
|
||||
|
||||
/*
|
||||
* enable/disable the glitch filter; mostly used with IRQ handling.
|
||||
*/
|
||||
int __init_or_module at91_set_deglitch(unsigned pin, int is_on)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
if (has_pio3() && is_on)
|
||||
__raw_writel(mask, pio + PIO_IFSCDR);
|
||||
__raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_deglitch);
|
||||
|
||||
/*
|
||||
* enable/disable the debounce filter;
|
||||
*/
|
||||
int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio || !has_pio3())
|
||||
return -EINVAL;
|
||||
|
||||
if (is_on) {
|
||||
__raw_writel(mask, pio + PIO_IFSCER);
|
||||
__raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
|
||||
__raw_writel(mask, pio + PIO_IFER);
|
||||
} else {
|
||||
__raw_writel(mask, pio + PIO_IFDR);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_debounce);
|
||||
|
||||
/*
|
||||
* enable/disable the multi-driver; This is only valid for output and
|
||||
* allows the output pin to run as an open collector output.
|
||||
*/
|
||||
int __init_or_module at91_set_multi_drive(unsigned pin, int is_on)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_multi_drive);
|
||||
|
||||
/*
|
||||
* enable/disable the pull-down.
|
||||
* If pull-up already enabled while calling the function, we disable it.
|
||||
*/
|
||||
int __init_or_module at91_set_pulldown(unsigned pin, int is_on)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio || !has_pio3())
|
||||
return -EINVAL;
|
||||
|
||||
/* Disable pull-up anyway */
|
||||
__raw_writel(mask, pio + PIO_PUDR);
|
||||
__raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_pulldown);
|
||||
|
||||
/*
|
||||
* disable Schmitt trigger
|
||||
*/
|
||||
int __init_or_module at91_disable_schmitt_trig(unsigned pin)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio || !has_pio3())
|
||||
return -EINVAL;
|
||||
|
||||
__raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_disable_schmitt_trig);
|
||||
|
||||
/*
|
||||
* assuming the pin is muxed as a gpio output, set its value.
|
||||
*/
|
||||
int at91_set_gpio_value(unsigned pin, int value)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_set_gpio_value);
|
||||
|
||||
|
||||
/*
|
||||
* read the pin's value (works even if it's not muxed as a gpio).
|
||||
*/
|
||||
int at91_get_gpio_value(unsigned pin)
|
||||
{
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
u32 pdsr;
|
||||
|
||||
if (!pio)
|
||||
return -EINVAL;
|
||||
pdsr = __raw_readl(pio + PIO_PDSR);
|
||||
return (pdsr & mask) != 0;
|
||||
}
|
||||
EXPORT_SYMBOL(at91_get_gpio_value);
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
static u32 wakeups[MAX_GPIO_BANKS];
|
||||
static u32 backups[MAX_GPIO_BANKS];
|
||||
|
||||
static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
|
||||
unsigned mask = 1 << d->hwirq;
|
||||
unsigned bank = at91_gpio->pioc_idx;
|
||||
|
||||
if (unlikely(bank >= MAX_GPIO_BANKS))
|
||||
return -EINVAL;
|
||||
|
||||
if (state)
|
||||
wakeups[bank] |= mask;
|
||||
else
|
||||
wakeups[bank] &= ~mask;
|
||||
|
||||
irq_set_irq_wake(at91_gpio->pioc_virq, state);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void at91_gpio_suspend(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < gpio_banks; i++) {
|
||||
void __iomem *pio = gpio_chip[i].regbase;
|
||||
|
||||
backups[i] = __raw_readl(pio + PIO_IMR);
|
||||
__raw_writel(backups[i], pio + PIO_IDR);
|
||||
__raw_writel(wakeups[i], pio + PIO_IER);
|
||||
|
||||
if (!wakeups[i]) {
|
||||
clk_unprepare(gpio_chip[i].clock);
|
||||
clk_disable(gpio_chip[i].clock);
|
||||
} else {
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void at91_gpio_resume(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < gpio_banks; i++) {
|
||||
void __iomem *pio = gpio_chip[i].regbase;
|
||||
|
||||
if (!wakeups[i]) {
|
||||
if (clk_prepare(gpio_chip[i].clock) == 0)
|
||||
clk_enable(gpio_chip[i].clock);
|
||||
}
|
||||
|
||||
__raw_writel(wakeups[i], pio + PIO_IDR);
|
||||
__raw_writel(backups[i], pio + PIO_IER);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
#define gpio_irq_set_wake NULL
|
||||
#endif
|
||||
|
||||
|
||||
/* Several AIC controller irqs are dispatched through this GPIO handler.
|
||||
* To use any AT91_PIN_* as an externally triggered IRQ, first call
|
||||
* at91_set_gpio_input() then maybe enable its glitch filter.
|
||||
* Then just request_irq() with the pin ID; it works like any ARM IRQ
|
||||
* handler.
|
||||
* First implementation always triggers on rising and falling edges
|
||||
* whereas the newer PIO3 can be additionally configured to trigger on
|
||||
* level, edge with any polarity.
|
||||
*
|
||||
* Alternatively, certain pins may be used directly as IRQ0..IRQ6 after
|
||||
* configuring them with at91_set_a_periph() or at91_set_b_periph().
|
||||
* IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering.
|
||||
*/
|
||||
|
||||
static void gpio_irq_mask(struct irq_data *d)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << d->hwirq;
|
||||
|
||||
if (pio)
|
||||
__raw_writel(mask, pio + PIO_IDR);
|
||||
}
|
||||
|
||||
static void gpio_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << d->hwirq;
|
||||
|
||||
if (pio)
|
||||
__raw_writel(mask, pio + PIO_IER);
|
||||
}
|
||||
|
||||
static int gpio_irq_type(struct irq_data *d, unsigned type)
|
||||
{
|
||||
switch (type) {
|
||||
case IRQ_TYPE_NONE:
|
||||
case IRQ_TYPE_EDGE_BOTH:
|
||||
return 0;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
/* Alternate irq type for PIO3 support */
|
||||
static int alt_gpio_irq_type(struct irq_data *d, unsigned type)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << d->hwirq;
|
||||
|
||||
switch (type) {
|
||||
case IRQ_TYPE_EDGE_RISING:
|
||||
__raw_writel(mask, pio + PIO_ESR);
|
||||
__raw_writel(mask, pio + PIO_REHLSR);
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_FALLING:
|
||||
__raw_writel(mask, pio + PIO_ESR);
|
||||
__raw_writel(mask, pio + PIO_FELLSR);
|
||||
break;
|
||||
case IRQ_TYPE_LEVEL_LOW:
|
||||
__raw_writel(mask, pio + PIO_LSR);
|
||||
__raw_writel(mask, pio + PIO_FELLSR);
|
||||
break;
|
||||
case IRQ_TYPE_LEVEL_HIGH:
|
||||
__raw_writel(mask, pio + PIO_LSR);
|
||||
__raw_writel(mask, pio + PIO_REHLSR);
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_BOTH:
|
||||
/*
|
||||
* disable additional interrupt modes:
|
||||
* fall back to default behavior
|
||||
*/
|
||||
__raw_writel(mask, pio + PIO_AIMDR);
|
||||
return 0;
|
||||
case IRQ_TYPE_NONE:
|
||||
default:
|
||||
pr_warn("AT91: No type for irq %d\n", gpio_to_irq(d->irq));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* enable additional interrupt modes */
|
||||
__raw_writel(mask, pio + PIO_AIMER);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct irq_chip gpio_irqchip = {
|
||||
.name = "GPIO",
|
||||
.irq_disable = gpio_irq_mask,
|
||||
.irq_mask = gpio_irq_mask,
|
||||
.irq_unmask = gpio_irq_unmask,
|
||||
/* .irq_set_type is set dynamically */
|
||||
.irq_set_wake = gpio_irq_set_wake,
|
||||
};
|
||||
|
||||
static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
struct irq_data *idata = irq_desc_get_irq_data(desc);
|
||||
struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned long isr;
|
||||
int n;
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
for (;;) {
|
||||
/* Reading ISR acks pending (edge triggered) GPIO interrupts.
|
||||
* When there none are pending, we're finished unless we need
|
||||
* to process multiple banks (like ID_PIOCDE on sam9263).
|
||||
*/
|
||||
isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR);
|
||||
if (!isr) {
|
||||
if (!at91_gpio->next)
|
||||
break;
|
||||
at91_gpio = at91_gpio->next;
|
||||
pio = at91_gpio->regbase;
|
||||
continue;
|
||||
}
|
||||
|
||||
n = find_first_bit(&isr, BITS_PER_LONG);
|
||||
while (n < BITS_PER_LONG) {
|
||||
generic_handle_irq(irq_find_mapping(at91_gpio->domain, n));
|
||||
n = find_next_bit(&isr, BITS_PER_LONG, n + 1);
|
||||
}
|
||||
}
|
||||
chained_irq_exit(chip, desc);
|
||||
/* now it may re-trigger */
|
||||
}
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
static void gpio_printf(struct seq_file *s, void __iomem *pio, unsigned mask)
|
||||
{
|
||||
char *trigger = NULL;
|
||||
char *polarity = NULL;
|
||||
|
||||
if (__raw_readl(pio + PIO_IMR) & mask) {
|
||||
if (!has_pio3() || !(__raw_readl(pio + PIO_AIMMR) & mask )) {
|
||||
trigger = "edge";
|
||||
polarity = "both";
|
||||
} else {
|
||||
if (__raw_readl(pio + PIO_ELSR) & mask) {
|
||||
trigger = "level";
|
||||
polarity = __raw_readl(pio + PIO_FRLHSR) & mask ?
|
||||
"high" : "low";
|
||||
} else {
|
||||
trigger = "edge";
|
||||
polarity = __raw_readl(pio + PIO_FRLHSR) & mask ?
|
||||
"rising" : "falling";
|
||||
}
|
||||
}
|
||||
seq_printf(s, "IRQ:%s-%s\t", trigger, polarity);
|
||||
} else {
|
||||
seq_printf(s, "GPIO:%s\t\t",
|
||||
__raw_readl(pio + PIO_PDSR) & mask ? "1" : "0");
|
||||
}
|
||||
}
|
||||
|
||||
static int at91_gpio_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
int bank, j;
|
||||
|
||||
/* print heading */
|
||||
seq_printf(s, "Pin\t");
|
||||
for (bank = 0; bank < gpio_banks; bank++) {
|
||||
seq_printf(s, "PIO%c\t\t", 'A' + bank);
|
||||
};
|
||||
seq_printf(s, "\n\n");
|
||||
|
||||
/* print pin status */
|
||||
for (j = 0; j < 32; j++) {
|
||||
seq_printf(s, "%i:\t", j);
|
||||
|
||||
for (bank = 0; bank < gpio_banks; bank++) {
|
||||
unsigned pin = (32 * bank) + j;
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
|
||||
if (__raw_readl(pio + PIO_PSR) & mask)
|
||||
gpio_printf(s, pio, mask);
|
||||
else
|
||||
seq_printf(s, "%c\t\t",
|
||||
peripheral_function(pio, mask));
|
||||
}
|
||||
|
||||
seq_printf(s, "\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int at91_gpio_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, at91_gpio_show, NULL);
|
||||
}
|
||||
|
||||
static const struct file_operations at91_gpio_operations = {
|
||||
.open = at91_gpio_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static int __init at91_gpio_debugfs_init(void)
|
||||
{
|
||||
/* /sys/kernel/debug/at91_gpio */
|
||||
(void) debugfs_create_file("at91_gpio", S_IFREG | S_IRUGO, NULL, NULL, &at91_gpio_operations);
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(at91_gpio_debugfs_init);
|
||||
|
||||
#endif
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* This lock class tells lockdep that GPIO irqs are in a different
|
||||
* category than their parents, so it won't report false recursion.
|
||||
*/
|
||||
static struct lock_class_key gpio_lock_class;
|
||||
|
||||
/*
|
||||
* irqdomain initialization: pile up irqdomains on top of AIC range
|
||||
*/
|
||||
static void __init at91_gpio_irqdomain(struct at91_gpio_chip *at91_gpio)
|
||||
{
|
||||
int irq_base;
|
||||
|
||||
irq_base = irq_alloc_descs(-1, 0, at91_gpio->chip.ngpio, 0);
|
||||
if (irq_base < 0)
|
||||
panic("at91_gpio.%d: error %d: couldn't allocate IRQ numbers.\n",
|
||||
at91_gpio->pioc_idx, irq_base);
|
||||
at91_gpio->domain = irq_domain_add_legacy(NULL, at91_gpio->chip.ngpio,
|
||||
irq_base, 0,
|
||||
&irq_domain_simple_ops, NULL);
|
||||
if (!at91_gpio->domain)
|
||||
panic("at91_gpio.%d: couldn't allocate irq domain.\n",
|
||||
at91_gpio->pioc_idx);
|
||||
}
|
||||
|
||||
/*
|
||||
* Called from the processor-specific init to enable GPIO interrupt support.
|
||||
*/
|
||||
void __init at91_gpio_irq_setup(void)
|
||||
{
|
||||
unsigned pioc;
|
||||
int gpio_irqnbr = 0;
|
||||
struct at91_gpio_chip *this, *prev;
|
||||
|
||||
/* Setup proper .irq_set_type function */
|
||||
if (has_pio3())
|
||||
gpio_irqchip.irq_set_type = alt_gpio_irq_type;
|
||||
else
|
||||
gpio_irqchip.irq_set_type = gpio_irq_type;
|
||||
|
||||
for (pioc = 0, this = gpio_chip, prev = NULL;
|
||||
pioc++ < gpio_banks;
|
||||
prev = this, this++) {
|
||||
int offset;
|
||||
|
||||
__raw_writel(~0, this->regbase + PIO_IDR);
|
||||
|
||||
/* setup irq domain for this GPIO controller */
|
||||
at91_gpio_irqdomain(this);
|
||||
|
||||
for (offset = 0; offset < this->chip.ngpio; offset++) {
|
||||
unsigned int virq = irq_find_mapping(this->domain, offset);
|
||||
irq_set_lockdep_class(virq, &gpio_lock_class);
|
||||
|
||||
/*
|
||||
* Can use the "simple" and not "edge" handler since it's
|
||||
* shorter, and the AIC handles interrupts sanely.
|
||||
*/
|
||||
irq_set_chip_and_handler(virq, &gpio_irqchip,
|
||||
handle_simple_irq);
|
||||
set_irq_flags(virq, IRQF_VALID);
|
||||
irq_set_chip_data(virq, this);
|
||||
|
||||
gpio_irqnbr++;
|
||||
}
|
||||
|
||||
/* The toplevel handler handles one bank of GPIOs, except
|
||||
* on some SoC it can handles up to three...
|
||||
* We only set up the handler for the first of the list.
|
||||
*/
|
||||
if (prev && prev->next == this)
|
||||
continue;
|
||||
|
||||
this->pioc_virq = irq_create_mapping(NULL, this->pioc_hwirq);
|
||||
irq_set_chip_data(this->pioc_virq, this);
|
||||
irq_set_chained_handler(this->pioc_virq, gpio_irq_handler);
|
||||
}
|
||||
pr_info("AT91: %d gpio irqs in %d banks\n", gpio_irqnbr, gpio_banks);
|
||||
}
|
||||
|
||||
/* gpiolib support */
|
||||
static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << offset;
|
||||
|
||||
__raw_writel(mask, pio + PIO_PER);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int at91_gpiolib_get_direction(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << offset;
|
||||
u32 osr;
|
||||
|
||||
osr = __raw_readl(pio + PIO_OSR);
|
||||
return !(osr & mask);
|
||||
}
|
||||
|
||||
static int at91_gpiolib_direction_input(struct gpio_chip *chip,
|
||||
unsigned offset)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << offset;
|
||||
|
||||
__raw_writel(mask, pio + PIO_ODR);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int at91_gpiolib_direction_output(struct gpio_chip *chip,
|
||||
unsigned offset, int val)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << offset;
|
||||
|
||||
__raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR));
|
||||
__raw_writel(mask, pio + PIO_OER);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << offset;
|
||||
u32 pdsr;
|
||||
|
||||
pdsr = __raw_readl(pio + PIO_PDSR);
|
||||
return (pdsr & mask) != 0;
|
||||
}
|
||||
|
||||
static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
|
||||
void __iomem *pio = at91_gpio->regbase;
|
||||
unsigned mask = 1 << offset;
|
||||
|
||||
__raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR));
|
||||
}
|
||||
|
||||
static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < chip->ngpio; i++) {
|
||||
unsigned pin = chip->base + i;
|
||||
void __iomem *pio = pin_to_controller(pin);
|
||||
unsigned mask = pin_to_mask(pin);
|
||||
const char *gpio_label;
|
||||
|
||||
gpio_label = gpiochip_is_requested(chip, i);
|
||||
if (gpio_label) {
|
||||
seq_printf(s, "[%s] GPIO%s%d: ",
|
||||
gpio_label, chip->label, i);
|
||||
if (__raw_readl(pio + PIO_PSR) & mask)
|
||||
seq_printf(s, "[gpio] %s\n",
|
||||
at91_get_gpio_value(pin) ?
|
||||
"set" : "clear");
|
||||
else
|
||||
seq_printf(s, "[periph %c]\n",
|
||||
peripheral_function(pio, mask));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
|
||||
int virq;
|
||||
|
||||
if (offset < chip->ngpio)
|
||||
virq = irq_create_mapping(at91_gpio->domain, offset);
|
||||
else
|
||||
virq = -ENXIO;
|
||||
|
||||
dev_dbg(chip->dev, "%s: request IRQ for GPIO %d, return %d\n",
|
||||
chip->label, offset + chip->base, virq);
|
||||
return virq;
|
||||
}
|
||||
|
||||
static int __init at91_gpio_setup_clk(int idx)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
|
||||
|
||||
/* retreive PIO controller's clock */
|
||||
at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
|
||||
if (IS_ERR(at91_gpio->clock)) {
|
||||
pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", idx);
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (clk_prepare(at91_gpio->clock))
|
||||
goto clk_prep_err;
|
||||
|
||||
/* enable PIO controller's clock */
|
||||
if (clk_enable(at91_gpio->clock)) {
|
||||
pr_err("at91_gpio.%d, failed to enable clock, ignoring.\n", idx);
|
||||
goto clk_err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
clk_err:
|
||||
clk_unprepare(at91_gpio->clock);
|
||||
clk_prep_err:
|
||||
clk_put(at91_gpio->clock);
|
||||
err:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq)
|
||||
{
|
||||
struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
|
||||
|
||||
at91_gpio->chip.base = idx * MAX_NB_GPIO_PER_BANK;
|
||||
at91_gpio->pioc_hwirq = pioc_hwirq;
|
||||
at91_gpio->pioc_idx = idx;
|
||||
|
||||
at91_gpio->regbase = ioremap(regbase, 512);
|
||||
if (!at91_gpio->regbase) {
|
||||
pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", idx);
|
||||
return;
|
||||
}
|
||||
|
||||
if (at91_gpio_setup_clk(idx))
|
||||
goto ioremap_err;
|
||||
|
||||
gpio_banks = max(gpio_banks, idx + 1);
|
||||
return;
|
||||
|
||||
ioremap_err:
|
||||
iounmap(at91_gpio->regbase);
|
||||
}
|
||||
|
||||
/*
|
||||
* Called from the processor-specific init to enable GPIO pin support.
|
||||
*/
|
||||
void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
|
||||
{
|
||||
unsigned i;
|
||||
struct at91_gpio_chip *at91_gpio, *last = NULL;
|
||||
|
||||
BUG_ON(nr_banks > MAX_GPIO_BANKS);
|
||||
|
||||
if (of_have_populated_dt())
|
||||
return;
|
||||
|
||||
for (i = 0; i < nr_banks; i++)
|
||||
at91_gpio_init_one(i, data[i].regbase, data[i].id);
|
||||
|
||||
for (i = 0; i < gpio_banks; i++) {
|
||||
at91_gpio = &gpio_chip[i];
|
||||
|
||||
/*
|
||||
* GPIO controller are grouped on some SoC:
|
||||
* PIOC, PIOD and PIOE can share the same IRQ line
|
||||
*/
|
||||
if (last && last->pioc_hwirq == at91_gpio->pioc_hwirq)
|
||||
last->next = at91_gpio;
|
||||
last = at91_gpio;
|
||||
|
||||
gpiochip_add(&at91_gpio->chip);
|
||||
}
|
||||
}
|
||||
|
|
@ -1,214 +0,0 @@
|
|||
/*
|
||||
* arch/arm/mach-at91/include/mach/gpio.h
|
||||
*
|
||||
* Copyright (C) 2005 HP Labs
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
|
||||
#define __ASM_ARCH_AT91RM9200_GPIO_H
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#define MAX_GPIO_BANKS 5
|
||||
#define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32)
|
||||
|
||||
/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
|
||||
|
||||
#define AT91_PIN_PA0 (0x00 + 0)
|
||||
#define AT91_PIN_PA1 (0x00 + 1)
|
||||
#define AT91_PIN_PA2 (0x00 + 2)
|
||||
#define AT91_PIN_PA3 (0x00 + 3)
|
||||
#define AT91_PIN_PA4 (0x00 + 4)
|
||||
#define AT91_PIN_PA5 (0x00 + 5)
|
||||
#define AT91_PIN_PA6 (0x00 + 6)
|
||||
#define AT91_PIN_PA7 (0x00 + 7)
|
||||
#define AT91_PIN_PA8 (0x00 + 8)
|
||||
#define AT91_PIN_PA9 (0x00 + 9)
|
||||
#define AT91_PIN_PA10 (0x00 + 10)
|
||||
#define AT91_PIN_PA11 (0x00 + 11)
|
||||
#define AT91_PIN_PA12 (0x00 + 12)
|
||||
#define AT91_PIN_PA13 (0x00 + 13)
|
||||
#define AT91_PIN_PA14 (0x00 + 14)
|
||||
#define AT91_PIN_PA15 (0x00 + 15)
|
||||
#define AT91_PIN_PA16 (0x00 + 16)
|
||||
#define AT91_PIN_PA17 (0x00 + 17)
|
||||
#define AT91_PIN_PA18 (0x00 + 18)
|
||||
#define AT91_PIN_PA19 (0x00 + 19)
|
||||
#define AT91_PIN_PA20 (0x00 + 20)
|
||||
#define AT91_PIN_PA21 (0x00 + 21)
|
||||
#define AT91_PIN_PA22 (0x00 + 22)
|
||||
#define AT91_PIN_PA23 (0x00 + 23)
|
||||
#define AT91_PIN_PA24 (0x00 + 24)
|
||||
#define AT91_PIN_PA25 (0x00 + 25)
|
||||
#define AT91_PIN_PA26 (0x00 + 26)
|
||||
#define AT91_PIN_PA27 (0x00 + 27)
|
||||
#define AT91_PIN_PA28 (0x00 + 28)
|
||||
#define AT91_PIN_PA29 (0x00 + 29)
|
||||
#define AT91_PIN_PA30 (0x00 + 30)
|
||||
#define AT91_PIN_PA31 (0x00 + 31)
|
||||
|
||||
#define AT91_PIN_PB0 (0x20 + 0)
|
||||
#define AT91_PIN_PB1 (0x20 + 1)
|
||||
#define AT91_PIN_PB2 (0x20 + 2)
|
||||
#define AT91_PIN_PB3 (0x20 + 3)
|
||||
#define AT91_PIN_PB4 (0x20 + 4)
|
||||
#define AT91_PIN_PB5 (0x20 + 5)
|
||||
#define AT91_PIN_PB6 (0x20 + 6)
|
||||
#define AT91_PIN_PB7 (0x20 + 7)
|
||||
#define AT91_PIN_PB8 (0x20 + 8)
|
||||
#define AT91_PIN_PB9 (0x20 + 9)
|
||||
#define AT91_PIN_PB10 (0x20 + 10)
|
||||
#define AT91_PIN_PB11 (0x20 + 11)
|
||||
#define AT91_PIN_PB12 (0x20 + 12)
|
||||
#define AT91_PIN_PB13 (0x20 + 13)
|
||||
#define AT91_PIN_PB14 (0x20 + 14)
|
||||
#define AT91_PIN_PB15 (0x20 + 15)
|
||||
#define AT91_PIN_PB16 (0x20 + 16)
|
||||
#define AT91_PIN_PB17 (0x20 + 17)
|
||||
#define AT91_PIN_PB18 (0x20 + 18)
|
||||
#define AT91_PIN_PB19 (0x20 + 19)
|
||||
#define AT91_PIN_PB20 (0x20 + 20)
|
||||
#define AT91_PIN_PB21 (0x20 + 21)
|
||||
#define AT91_PIN_PB22 (0x20 + 22)
|
||||
#define AT91_PIN_PB23 (0x20 + 23)
|
||||
#define AT91_PIN_PB24 (0x20 + 24)
|
||||
#define AT91_PIN_PB25 (0x20 + 25)
|
||||
#define AT91_PIN_PB26 (0x20 + 26)
|
||||
#define AT91_PIN_PB27 (0x20 + 27)
|
||||
#define AT91_PIN_PB28 (0x20 + 28)
|
||||
#define AT91_PIN_PB29 (0x20 + 29)
|
||||
#define AT91_PIN_PB30 (0x20 + 30)
|
||||
#define AT91_PIN_PB31 (0x20 + 31)
|
||||
|
||||
#define AT91_PIN_PC0 (0x40 + 0)
|
||||
#define AT91_PIN_PC1 (0x40 + 1)
|
||||
#define AT91_PIN_PC2 (0x40 + 2)
|
||||
#define AT91_PIN_PC3 (0x40 + 3)
|
||||
#define AT91_PIN_PC4 (0x40 + 4)
|
||||
#define AT91_PIN_PC5 (0x40 + 5)
|
||||
#define AT91_PIN_PC6 (0x40 + 6)
|
||||
#define AT91_PIN_PC7 (0x40 + 7)
|
||||
#define AT91_PIN_PC8 (0x40 + 8)
|
||||
#define AT91_PIN_PC9 (0x40 + 9)
|
||||
#define AT91_PIN_PC10 (0x40 + 10)
|
||||
#define AT91_PIN_PC11 (0x40 + 11)
|
||||
#define AT91_PIN_PC12 (0x40 + 12)
|
||||
#define AT91_PIN_PC13 (0x40 + 13)
|
||||
#define AT91_PIN_PC14 (0x40 + 14)
|
||||
#define AT91_PIN_PC15 (0x40 + 15)
|
||||
#define AT91_PIN_PC16 (0x40 + 16)
|
||||
#define AT91_PIN_PC17 (0x40 + 17)
|
||||
#define AT91_PIN_PC18 (0x40 + 18)
|
||||
#define AT91_PIN_PC19 (0x40 + 19)
|
||||
#define AT91_PIN_PC20 (0x40 + 20)
|
||||
#define AT91_PIN_PC21 (0x40 + 21)
|
||||
#define AT91_PIN_PC22 (0x40 + 22)
|
||||
#define AT91_PIN_PC23 (0x40 + 23)
|
||||
#define AT91_PIN_PC24 (0x40 + 24)
|
||||
#define AT91_PIN_PC25 (0x40 + 25)
|
||||
#define AT91_PIN_PC26 (0x40 + 26)
|
||||
#define AT91_PIN_PC27 (0x40 + 27)
|
||||
#define AT91_PIN_PC28 (0x40 + 28)
|
||||
#define AT91_PIN_PC29 (0x40 + 29)
|
||||
#define AT91_PIN_PC30 (0x40 + 30)
|
||||
#define AT91_PIN_PC31 (0x40 + 31)
|
||||
|
||||
#define AT91_PIN_PD0 (0x60 + 0)
|
||||
#define AT91_PIN_PD1 (0x60 + 1)
|
||||
#define AT91_PIN_PD2 (0x60 + 2)
|
||||
#define AT91_PIN_PD3 (0x60 + 3)
|
||||
#define AT91_PIN_PD4 (0x60 + 4)
|
||||
#define AT91_PIN_PD5 (0x60 + 5)
|
||||
#define AT91_PIN_PD6 (0x60 + 6)
|
||||
#define AT91_PIN_PD7 (0x60 + 7)
|
||||
#define AT91_PIN_PD8 (0x60 + 8)
|
||||
#define AT91_PIN_PD9 (0x60 + 9)
|
||||
#define AT91_PIN_PD10 (0x60 + 10)
|
||||
#define AT91_PIN_PD11 (0x60 + 11)
|
||||
#define AT91_PIN_PD12 (0x60 + 12)
|
||||
#define AT91_PIN_PD13 (0x60 + 13)
|
||||
#define AT91_PIN_PD14 (0x60 + 14)
|
||||
#define AT91_PIN_PD15 (0x60 + 15)
|
||||
#define AT91_PIN_PD16 (0x60 + 16)
|
||||
#define AT91_PIN_PD17 (0x60 + 17)
|
||||
#define AT91_PIN_PD18 (0x60 + 18)
|
||||
#define AT91_PIN_PD19 (0x60 + 19)
|
||||
#define AT91_PIN_PD20 (0x60 + 20)
|
||||
#define AT91_PIN_PD21 (0x60 + 21)
|
||||
#define AT91_PIN_PD22 (0x60 + 22)
|
||||
#define AT91_PIN_PD23 (0x60 + 23)
|
||||
#define AT91_PIN_PD24 (0x60 + 24)
|
||||
#define AT91_PIN_PD25 (0x60 + 25)
|
||||
#define AT91_PIN_PD26 (0x60 + 26)
|
||||
#define AT91_PIN_PD27 (0x60 + 27)
|
||||
#define AT91_PIN_PD28 (0x60 + 28)
|
||||
#define AT91_PIN_PD29 (0x60 + 29)
|
||||
#define AT91_PIN_PD30 (0x60 + 30)
|
||||
#define AT91_PIN_PD31 (0x60 + 31)
|
||||
|
||||
#define AT91_PIN_PE0 (0x80 + 0)
|
||||
#define AT91_PIN_PE1 (0x80 + 1)
|
||||
#define AT91_PIN_PE2 (0x80 + 2)
|
||||
#define AT91_PIN_PE3 (0x80 + 3)
|
||||
#define AT91_PIN_PE4 (0x80 + 4)
|
||||
#define AT91_PIN_PE5 (0x80 + 5)
|
||||
#define AT91_PIN_PE6 (0x80 + 6)
|
||||
#define AT91_PIN_PE7 (0x80 + 7)
|
||||
#define AT91_PIN_PE8 (0x80 + 8)
|
||||
#define AT91_PIN_PE9 (0x80 + 9)
|
||||
#define AT91_PIN_PE10 (0x80 + 10)
|
||||
#define AT91_PIN_PE11 (0x80 + 11)
|
||||
#define AT91_PIN_PE12 (0x80 + 12)
|
||||
#define AT91_PIN_PE13 (0x80 + 13)
|
||||
#define AT91_PIN_PE14 (0x80 + 14)
|
||||
#define AT91_PIN_PE15 (0x80 + 15)
|
||||
#define AT91_PIN_PE16 (0x80 + 16)
|
||||
#define AT91_PIN_PE17 (0x80 + 17)
|
||||
#define AT91_PIN_PE18 (0x80 + 18)
|
||||
#define AT91_PIN_PE19 (0x80 + 19)
|
||||
#define AT91_PIN_PE20 (0x80 + 20)
|
||||
#define AT91_PIN_PE21 (0x80 + 21)
|
||||
#define AT91_PIN_PE22 (0x80 + 22)
|
||||
#define AT91_PIN_PE23 (0x80 + 23)
|
||||
#define AT91_PIN_PE24 (0x80 + 24)
|
||||
#define AT91_PIN_PE25 (0x80 + 25)
|
||||
#define AT91_PIN_PE26 (0x80 + 26)
|
||||
#define AT91_PIN_PE27 (0x80 + 27)
|
||||
#define AT91_PIN_PE28 (0x80 + 28)
|
||||
#define AT91_PIN_PE29 (0x80 + 29)
|
||||
#define AT91_PIN_PE30 (0x80 + 30)
|
||||
#define AT91_PIN_PE31 (0x80 + 31)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/* setup setup routines, called from board init or driver probe() */
|
||||
extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup);
|
||||
extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
|
||||
extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup);
|
||||
extern int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup);
|
||||
extern int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup);
|
||||
extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup);
|
||||
extern int __init_or_module at91_set_gpio_output(unsigned pin, int value);
|
||||
extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on);
|
||||
extern int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div);
|
||||
extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on);
|
||||
extern int __init_or_module at91_set_pulldown(unsigned pin, int is_on);
|
||||
extern int __init_or_module at91_disable_schmitt_trig(unsigned pin);
|
||||
|
||||
/* callable at any time */
|
||||
extern int at91_set_gpio_value(unsigned pin, int value);
|
||||
extern int at91_get_gpio_value(unsigned pin);
|
||||
|
||||
/* callable only from core power-management code */
|
||||
extern void at91_gpio_suspend(void);
|
||||
extern void at91_gpio_resume(void);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif
|
||||
|
|
@ -1,33 +0,0 @@
|
|||
/* Buttons */
|
||||
#define GPIO_TRIG_NET_IN AT91_PIN_PB21
|
||||
#define GPIO_CARD_UNMOUNT_0 AT91_PIN_PB13
|
||||
#define GPIO_CARD_UNMOUNT_1 AT91_PIN_PB12
|
||||
#define GPIO_KEY_POWER AT91_PIN_PA25
|
||||
|
||||
/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */
|
||||
#define GS_IA18_S_PCF_GPIO_BASE0 NR_BUILTIN_GPIO
|
||||
#define PCF_GPIO_HDC_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 0)
|
||||
#define PCF_GPIO_WIFI_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 1)
|
||||
#define PCF_GPIO_WIFI_ENABLE (GS_IA18_S_PCF_GPIO_BASE0 + 2)
|
||||
#define PCF_GPIO_WIFI_RESET (GS_IA18_S_PCF_GPIO_BASE0 + 3)
|
||||
#define PCF_GPIO_ETH_DETECT 4 /* this is a GPI */
|
||||
#define PCF_GPIO_GPS_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 5)
|
||||
#define PCF_GPIO_GPS_STANDBY (GS_IA18_S_PCF_GPIO_BASE0 + 6)
|
||||
#define PCF_GPIO_GPS_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 7)
|
||||
|
||||
/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
|
||||
#define GS_IA18_S_PCF_GPIO_BASE1 (GS_IA18_S_PCF_GPIO_BASE0 + 8)
|
||||
#define PCF_GPIO_ALARM1 (GS_IA18_S_PCF_GPIO_BASE1 + 0)
|
||||
#define PCF_GPIO_ALARM2 (GS_IA18_S_PCF_GPIO_BASE1 + 1)
|
||||
#define PCF_GPIO_ALARM3 (GS_IA18_S_PCF_GPIO_BASE1 + 2)
|
||||
#define PCF_GPIO_ALARM4 (GS_IA18_S_PCF_GPIO_BASE1 + 3)
|
||||
/* bits 4, 5, 6 not used */
|
||||
#define PCF_GPIO_ALARM_V_RELAY_ON (GS_IA18_S_PCF_GPIO_BASE1 + 7)
|
||||
|
||||
/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */
|
||||
#define GS_IA18_S_PCF_GPIO_BASE2 (GS_IA18_S_PCF_GPIO_BASE1 + 8)
|
||||
#define PCF_GPIO_MODEM_POWER (GS_IA18_S_PCF_GPIO_BASE2 + 0)
|
||||
#define PCF_GPIO_MODEM_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 3)
|
||||
/* bits 1, 2, 4, 5 not used */
|
||||
#define PCF_GPIO_TRX_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 6)
|
||||
/* bit 7 not used */
|
||||
|
|
@ -25,8 +25,8 @@ extern void __iomem *at91_ramc_base[];
|
|||
#define AT91_MEMCTRL_SDRAMC 1
|
||||
#define AT91_MEMCTRL_DDRSDR 2
|
||||
|
||||
#include <mach/at91rm9200_sdramc.h>
|
||||
#include <mach/at91sam9_ddrsdr.h>
|
||||
#include <mach/at91sam9_sdramc.h>
|
||||
#include <soc/at91/at91rm9200_sdramc.h>
|
||||
#include <soc/at91/at91sam9_ddrsdr.h>
|
||||
#include <soc/at91/at91sam9_sdramc.h>
|
||||
|
||||
#endif /* __AT91_RAMC_H__ */
|
||||
|
|
|
|||
|
|
@ -127,13 +127,8 @@
|
|||
* called as part of the generic suspend/resume path.
|
||||
*/
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
extern void at91_pinctrl_gpio_suspend(void);
|
||||
extern void at91_pinctrl_gpio_resume(void);
|
||||
#else
|
||||
static inline void at91_pinctrl_gpio_suspend(void) {}
|
||||
static inline void at91_pinctrl_gpio_resume(void) {}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,296 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-at91/irq.c
|
||||
*
|
||||
* Copyright (C) 2004 SAN People
|
||||
* Copyright (C) 2004 ATMEL
|
||||
* Copyright (C) Rick Bronson
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/bitmap.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <asm/exception.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
|
||||
void __iomem *at91_aic_base;
|
||||
static struct irq_domain *at91_aic_domain;
|
||||
static struct device_node *at91_aic_np;
|
||||
static unsigned int n_irqs = NR_AIC_IRQS;
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
static unsigned long *wakeups;
|
||||
static unsigned long *backups;
|
||||
|
||||
#define set_backup(bit) set_bit(bit, backups)
|
||||
#define clear_backup(bit) clear_bit(bit, backups)
|
||||
|
||||
static int at91_aic_pm_init(void)
|
||||
{
|
||||
backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL);
|
||||
if (!backups)
|
||||
return -ENOMEM;
|
||||
|
||||
wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL);
|
||||
if (!wakeups) {
|
||||
kfree(backups);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int at91_aic_set_wake(struct irq_data *d, unsigned value)
|
||||
{
|
||||
if (unlikely(d->hwirq >= n_irqs))
|
||||
return -EINVAL;
|
||||
|
||||
if (value)
|
||||
set_bit(d->hwirq, wakeups);
|
||||
else
|
||||
clear_bit(d->hwirq, wakeups);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void at91_irq_suspend(void)
|
||||
{
|
||||
at91_aic_write(AT91_AIC_IDCR, *backups);
|
||||
at91_aic_write(AT91_AIC_IECR, *wakeups);
|
||||
}
|
||||
|
||||
void at91_irq_resume(void)
|
||||
{
|
||||
at91_aic_write(AT91_AIC_IDCR, *wakeups);
|
||||
at91_aic_write(AT91_AIC_IECR, *backups);
|
||||
}
|
||||
|
||||
#else
|
||||
static inline int at91_aic_pm_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define set_backup(bit)
|
||||
#define clear_backup(bit)
|
||||
#define at91_aic_set_wake NULL
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
asmlinkage void __exception_irq_entry
|
||||
at91_aic_handle_irq(struct pt_regs *regs)
|
||||
{
|
||||
u32 irqnr;
|
||||
u32 irqstat;
|
||||
|
||||
irqnr = at91_aic_read(AT91_AIC_IVR);
|
||||
irqstat = at91_aic_read(AT91_AIC_ISR);
|
||||
|
||||
/*
|
||||
* ISR value is 0 when there is no current interrupt or when there is
|
||||
* a spurious interrupt
|
||||
*/
|
||||
if (!irqstat)
|
||||
at91_aic_write(AT91_AIC_EOICR, 0);
|
||||
else
|
||||
handle_IRQ(irqnr, regs);
|
||||
}
|
||||
|
||||
static void at91_aic_mask_irq(struct irq_data *d)
|
||||
{
|
||||
/* Disable interrupt on AIC */
|
||||
at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq);
|
||||
/* Update ISR cache */
|
||||
clear_backup(d->hwirq);
|
||||
}
|
||||
|
||||
static void at91_aic_unmask_irq(struct irq_data *d)
|
||||
{
|
||||
/* Enable interrupt on AIC */
|
||||
at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq);
|
||||
/* Update ISR cache */
|
||||
set_backup(d->hwirq);
|
||||
}
|
||||
|
||||
static void at91_aic_eoi(struct irq_data *d)
|
||||
{
|
||||
/*
|
||||
* Mark end-of-interrupt on AIC, the controller doesn't care about
|
||||
* the value written. Moreover it's a write-only register.
|
||||
*/
|
||||
at91_aic_write(AT91_AIC_EOICR, 0);
|
||||
}
|
||||
|
||||
static unsigned long *at91_extern_irq;
|
||||
|
||||
u32 at91_get_extern_irq(void)
|
||||
{
|
||||
if (!at91_extern_irq)
|
||||
return 0;
|
||||
return *at91_extern_irq;
|
||||
}
|
||||
|
||||
#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq)
|
||||
|
||||
static int at91_aic_compute_srctype(struct irq_data *d, unsigned type)
|
||||
{
|
||||
int srctype;
|
||||
|
||||
switch (type) {
|
||||
case IRQ_TYPE_LEVEL_HIGH:
|
||||
srctype = AT91_AIC_SRCTYPE_HIGH;
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_RISING:
|
||||
srctype = AT91_AIC_SRCTYPE_RISING;
|
||||
break;
|
||||
case IRQ_TYPE_LEVEL_LOW:
|
||||
if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */
|
||||
srctype = AT91_AIC_SRCTYPE_LOW;
|
||||
else
|
||||
srctype = -EINVAL;
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_FALLING:
|
||||
if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */
|
||||
srctype = AT91_AIC_SRCTYPE_FALLING;
|
||||
else
|
||||
srctype = -EINVAL;
|
||||
break;
|
||||
default:
|
||||
srctype = -EINVAL;
|
||||
}
|
||||
|
||||
return srctype;
|
||||
}
|
||||
|
||||
static int at91_aic_set_type(struct irq_data *d, unsigned type)
|
||||
{
|
||||
unsigned int smr;
|
||||
int srctype;
|
||||
|
||||
srctype = at91_aic_compute_srctype(d, type);
|
||||
if (srctype < 0)
|
||||
return srctype;
|
||||
|
||||
smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE;
|
||||
at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct irq_chip at91_aic_chip = {
|
||||
.name = "AIC",
|
||||
.irq_mask = at91_aic_mask_irq,
|
||||
.irq_unmask = at91_aic_unmask_irq,
|
||||
.irq_set_type = at91_aic_set_type,
|
||||
.irq_set_wake = at91_aic_set_wake,
|
||||
.irq_eoi = at91_aic_eoi,
|
||||
};
|
||||
|
||||
static void __init at91_aic_hw_init(unsigned int spu_vector)
|
||||
{
|
||||
int i;
|
||||
|
||||
/*
|
||||
* Perform 8 End Of Interrupt Command to make sure AIC
|
||||
* will not Lock out nIRQ
|
||||
*/
|
||||
for (i = 0; i < 8; i++)
|
||||
at91_aic_write(AT91_AIC_EOICR, 0);
|
||||
|
||||
/*
|
||||
* Spurious Interrupt ID in Spurious Vector Register.
|
||||
* When there is no current interrupt, the IRQ Vector Register
|
||||
* reads the value stored in AIC_SPU
|
||||
*/
|
||||
at91_aic_write(AT91_AIC_SPU, spu_vector);
|
||||
|
||||
/* No debugging in AIC: Debug (Protect) Control Register */
|
||||
at91_aic_write(AT91_AIC_DCR, 0);
|
||||
|
||||
/* Disable and clear all interrupts initially */
|
||||
at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
|
||||
at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize the AIC interrupt controller.
|
||||
*/
|
||||
void __init at91_aic_init(unsigned int *priority, unsigned int ext_irq_mask)
|
||||
{
|
||||
unsigned int i;
|
||||
int irq_base;
|
||||
|
||||
at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
|
||||
* sizeof(*at91_extern_irq), GFP_KERNEL);
|
||||
|
||||
if (at91_aic_pm_init() || at91_extern_irq == NULL)
|
||||
panic("Unable to allocate bit maps\n");
|
||||
|
||||
*at91_extern_irq = ext_irq_mask;
|
||||
|
||||
at91_aic_base = ioremap(AT91_AIC, 512);
|
||||
if (!at91_aic_base)
|
||||
panic("Unable to ioremap AIC registers\n");
|
||||
|
||||
/* Add irq domain for AIC */
|
||||
irq_base = irq_alloc_descs(-1, 0, n_irqs, 0);
|
||||
if (irq_base < 0) {
|
||||
WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n");
|
||||
irq_base = 0;
|
||||
}
|
||||
at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs,
|
||||
irq_base, 0,
|
||||
&irq_domain_simple_ops, NULL);
|
||||
|
||||
if (!at91_aic_domain)
|
||||
panic("Unable to add AIC irq domain\n");
|
||||
|
||||
irq_set_default_host(at91_aic_domain);
|
||||
|
||||
/*
|
||||
* The IVR is used by macro get_irqnr_and_base to read and verify.
|
||||
* The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
|
||||
*/
|
||||
for (i = 0; i < n_irqs; i++) {
|
||||
/* Put hardware irq number in Source Vector Register: */
|
||||
at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i);
|
||||
/* Active Low interrupt, with the specified priority */
|
||||
at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
|
||||
irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);
|
||||
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
||||
}
|
||||
|
||||
at91_aic_hw_init(n_irqs);
|
||||
}
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
/*
|
||||
* LED driver for Atmel AT91-based boards.
|
||||
*
|
||||
* Copyright (C) SAN People (Pty) Ltd
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#if defined(CONFIG_NEW_LEDS)
|
||||
|
||||
/*
|
||||
* New cross-platform LED support.
|
||||
*/
|
||||
|
||||
static struct gpio_led_platform_data led_data;
|
||||
|
||||
static struct platform_device at91_gpio_leds_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev.platform_data = &led_data,
|
||||
};
|
||||
|
||||
void __init at91_gpio_leds(struct gpio_led *leds, int nr)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!nr)
|
||||
return;
|
||||
|
||||
for (i = 0; i < nr; i++)
|
||||
at91_set_gpio_output(leds[i].gpio, leds[i].active_low);
|
||||
|
||||
led_data.leds = leds;
|
||||
led_data.num_leds = nr;
|
||||
platform_device_register(&at91_gpio_leds_device);
|
||||
}
|
||||
|
||||
#else
|
||||
void __init at91_gpio_leds(struct gpio_led *leds, int nr) {}
|
||||
#endif
|
||||
|
||||
|
|
@ -29,10 +29,8 @@
|
|||
#include <mach/cpu.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "generic.h"
|
||||
#include "pm.h"
|
||||
#include "gpio.h"
|
||||
|
||||
static void (*at91_pm_standby)(void);
|
||||
|
||||
|
|
@ -131,23 +129,7 @@ extern u32 at91_slow_clock_sz;
|
|||
|
||||
static int at91_pm_enter(suspend_state_t state)
|
||||
{
|
||||
if (of_have_populated_dt())
|
||||
at91_pinctrl_gpio_suspend();
|
||||
else
|
||||
at91_gpio_suspend();
|
||||
|
||||
if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) {
|
||||
at91_irq_suspend();
|
||||
|
||||
pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
|
||||
/* remember all the always-wake irqs */
|
||||
(at91_pmc_read(AT91_PMC_PCSR)
|
||||
| (1 << AT91_ID_FIQ)
|
||||
| (1 << AT91_ID_SYS)
|
||||
| (at91_get_extern_irq()))
|
||||
& at91_aic_read(AT91_AIC_IMR),
|
||||
state);
|
||||
}
|
||||
at91_pinctrl_gpio_suspend();
|
||||
|
||||
switch (state) {
|
||||
/*
|
||||
|
|
@ -212,21 +194,10 @@ static int at91_pm_enter(suspend_state_t state)
|
|||
goto error;
|
||||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base)
|
||||
pr_debug("AT91: PM - wakeup %08x\n",
|
||||
at91_aic_read(AT91_AIC_IPR) &
|
||||
at91_aic_read(AT91_AIC_IMR));
|
||||
|
||||
error:
|
||||
target_state = PM_SUSPEND_ON;
|
||||
|
||||
if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base)
|
||||
at91_irq_resume();
|
||||
|
||||
if (of_have_populated_dt())
|
||||
at91_pinctrl_gpio_resume();
|
||||
else
|
||||
at91_gpio_resume();
|
||||
at91_pinctrl_gpio_resume();
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -14,7 +14,6 @@
|
|||
#include <asm/proc-fns.h>
|
||||
|
||||
#include <mach/at91_ramc.h>
|
||||
#include <mach/at91rm9200_sdramc.h>
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern void at91_pm_set_standby(void (*at91_standby)(void));
|
||||
|
|
|
|||
|
|
@ -42,35 +42,9 @@ void __init at91rm9200_set_type(int type)
|
|||
at91_get_soc_subtype(&at91_soc_initdata));
|
||||
}
|
||||
|
||||
void __init at91_init_irq_default(void)
|
||||
{
|
||||
at91_init_interrupts(at91_boot_soc.default_irq_priority);
|
||||
}
|
||||
|
||||
void __init at91_init_interrupts(unsigned int *priority)
|
||||
{
|
||||
/* Initialize the AIC interrupt controller */
|
||||
if (IS_ENABLED(CONFIG_OLD_IRQ_AT91))
|
||||
at91_aic_init(priority, at91_boot_soc.extern_irq);
|
||||
|
||||
/* Enable GPIO interrupts */
|
||||
at91_gpio_irq_setup();
|
||||
}
|
||||
|
||||
void __iomem *at91_ramc_base[2];
|
||||
EXPORT_SYMBOL_GPL(at91_ramc_base);
|
||||
|
||||
void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
|
||||
{
|
||||
if (id < 0 || id > 1) {
|
||||
pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
|
||||
BUG();
|
||||
}
|
||||
at91_ramc_base[id] = ioremap(addr, size);
|
||||
if (!at91_ramc_base[id])
|
||||
panic(pr_fmt("Impossible to ioremap ramc.%d 0x%x\n"), id, addr);
|
||||
}
|
||||
|
||||
static struct map_desc sram_desc[2] __initdata;
|
||||
|
||||
void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
|
||||
|
|
@ -418,7 +392,6 @@ void __init at91_ioremap_matrix(u32 base_addr)
|
|||
panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
|
||||
}
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
static struct of_device_id ramc_ids[] = {
|
||||
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
|
||||
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
|
||||
|
|
@ -460,13 +433,6 @@ void __init at91rm9200_dt_initialize(void)
|
|||
{
|
||||
at91_dt_ramc();
|
||||
|
||||
/* Init clock subsystem */
|
||||
at91_dt_clock_init();
|
||||
|
||||
/* Register the processor-specific clocks */
|
||||
if (at91_boot_soc.register_clocks)
|
||||
at91_boot_soc.register_clocks();
|
||||
|
||||
at91_boot_soc.init();
|
||||
}
|
||||
|
||||
|
|
@ -474,39 +440,6 @@ void __init at91_dt_initialize(void)
|
|||
{
|
||||
at91_dt_ramc();
|
||||
|
||||
/* Init clock subsystem */
|
||||
at91_dt_clock_init();
|
||||
|
||||
/* Register the processor-specific clocks */
|
||||
if (at91_boot_soc.register_clocks)
|
||||
at91_boot_soc.register_clocks();
|
||||
|
||||
if (at91_boot_soc.init)
|
||||
at91_boot_soc.init();
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init at91_initialize(unsigned long main_clock)
|
||||
{
|
||||
at91_boot_soc.ioremap_registers();
|
||||
|
||||
/* Init clock subsystem */
|
||||
at91_clock_init(main_clock);
|
||||
|
||||
/* Register the processor-specific clocks */
|
||||
at91_boot_soc.register_clocks();
|
||||
|
||||
at91_boot_soc.init();
|
||||
|
||||
pinctrl_provide_dummies();
|
||||
}
|
||||
|
||||
void __init at91_register_devices(void)
|
||||
{
|
||||
at91_boot_soc.register_devices();
|
||||
}
|
||||
|
||||
void __init at91_init_time(void)
|
||||
{
|
||||
at91_boot_soc.init_time();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -6,14 +6,8 @@
|
|||
|
||||
struct at91_init_soc {
|
||||
int builtin;
|
||||
u32 extern_irq;
|
||||
unsigned int *default_irq_priority;
|
||||
void (*map_io)(void);
|
||||
void (*ioremap_registers)(void);
|
||||
void (*register_clocks)(void);
|
||||
void (*register_devices)(void);
|
||||
void (*init)(void);
|
||||
void (*init_time)(void);
|
||||
};
|
||||
|
||||
extern struct at91_init_soc at91_boot_soc;
|
||||
|
|
|
|||
|
|
@ -1,7 +0,0 @@
|
|||
#ifndef __MACH_STAMP9G20_H
|
||||
#define __MACH_STAMP9G20_H
|
||||
|
||||
void stamp9g20_init_early(void);
|
||||
void stamp9g20_board_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -262,35 +262,3 @@ static void __init at91sam926x_pit_dt_init(struct device_node *node)
|
|||
}
|
||||
CLOCKSOURCE_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
|
||||
at91sam926x_pit_dt_init);
|
||||
|
||||
static void __iomem *pit_base_addr;
|
||||
|
||||
void __init at91sam926x_pit_init(int irq)
|
||||
{
|
||||
struct pit_data *data;
|
||||
|
||||
data = kzalloc(sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
panic(pr_fmt("Unable to allocate memory\n"));
|
||||
|
||||
data->base = pit_base_addr;
|
||||
|
||||
data->mck = clk_get(NULL, "mck");
|
||||
if (IS_ERR(data->mck))
|
||||
panic(pr_fmt("Unable to get mck clk\n"));
|
||||
|
||||
data->irq = irq;
|
||||
|
||||
at91sam926x_pit_common_init(data);
|
||||
}
|
||||
|
||||
void __init at91sam926x_ioremap_pit(u32 addr)
|
||||
{
|
||||
if (of_have_populated_dt())
|
||||
return;
|
||||
|
||||
pit_base_addr = ioremap(addr, 16);
|
||||
|
||||
if (!pit_base_addr)
|
||||
panic(pr_fmt("Impossible to ioremap PIT\n"));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -75,7 +75,7 @@ config ATMEL_TCB_CLKSRC
|
|||
config ATMEL_TCB_CLKSRC_BLOCK
|
||||
int
|
||||
depends on ATMEL_TCB_CLKSRC
|
||||
prompt "TC Block" if ARCH_AT91RM9200 || ARCH_AT91SAM9260 || CPU_AT32AP700X
|
||||
prompt "TC Block" if CPU_AT32AP700X
|
||||
default 0
|
||||
range 0 1
|
||||
help
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@ if NET_CADENCE
|
|||
|
||||
config ARM_AT91_ETHER
|
||||
tristate "AT91RM9200 Ethernet support"
|
||||
depends on HAS_DMA && (ARCH_AT91RM9200 || COMPILE_TEST)
|
||||
depends on HAS_DMA && (ARCH_AT91 || COMPILE_TEST)
|
||||
select MACB
|
||||
---help---
|
||||
If you wish to compile a kernel for the AT91RM9200 and enable
|
||||
|
|
|
|||
|
|
@ -19,8 +19,8 @@
|
|||
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
#include <mach/at91sam9_ddrsdr.h>
|
||||
#include <mach/at91sam9_sdramc.h>
|
||||
#include <soc/at91/at91sam9_ddrsdr.h>
|
||||
#include <soc/at91/at91sam9_sdramc.h>
|
||||
|
||||
#define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */
|
||||
#define AT91_RSTC_PROCRST BIT(0) /* Processor Reset */
|
||||
|
|
|
|||
|
|
@ -1110,7 +1110,7 @@ config RTC_DRV_AT91RM9200
|
|||
|
||||
config RTC_DRV_AT91SAM9
|
||||
tristate "AT91SAM9 RTT as RTC"
|
||||
depends on ARCH_AT91 && !ARCH_AT91RM9200
|
||||
depends on ARCH_AT91
|
||||
select MFD_SYSCON
|
||||
help
|
||||
Some AT91SAM9 SoCs provide an RTT (Real Time Timer) block which
|
||||
|
|
@ -1126,7 +1126,6 @@ config RTC_DRV_AT91SAM9_RTT
|
|||
int
|
||||
range 0 1
|
||||
default 0
|
||||
prompt "RTT module Number" if ARCH_AT91SAM9263
|
||||
depends on RTC_DRV_AT91SAM9
|
||||
help
|
||||
This option is only relevant for legacy board support and
|
||||
|
|
@ -1138,8 +1137,7 @@ config RTC_DRV_AT91SAM9_RTT
|
|||
|
||||
config RTC_DRV_AT91SAM9_GPBR
|
||||
int
|
||||
range 0 3 if !ARCH_AT91SAM9263
|
||||
range 0 15 if ARCH_AT91SAM9263
|
||||
range 0 3
|
||||
default 0
|
||||
prompt "Backup Register Number"
|
||||
depends on RTC_DRV_AT91SAM9
|
||||
|
|
|
|||
|
|
@ -168,7 +168,6 @@ if BACKLIGHT_CLASS_DEVICE
|
|||
config BACKLIGHT_ATMEL_LCDC
|
||||
bool "Atmel LCDC Contrast-as-Backlight control"
|
||||
depends on FB_ATMEL
|
||||
default y if MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK || MACH_AT91SAM9263EK
|
||||
help
|
||||
This provides a backlight control internal to the Atmel LCDC
|
||||
driver. If the LCD "contrast control" on your board is wired
|
||||
|
|
|
|||
|
|
@ -999,23 +999,6 @@ config FB_ATMEL
|
|||
help
|
||||
This enables support for the AT91/AT32 LCD Controller.
|
||||
|
||||
config FB_INTSRAM
|
||||
bool "Frame Buffer in internal SRAM"
|
||||
depends on FB_ATMEL && ARCH_AT91SAM9261
|
||||
help
|
||||
Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
|
||||
to let frame buffer in external SDRAM.
|
||||
|
||||
config FB_ATMEL_STN
|
||||
bool "Use a STN display with AT91/AT32 LCD Controller"
|
||||
depends on FB_ATMEL && (MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK)
|
||||
default n
|
||||
help
|
||||
Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
|
||||
Controller. Say N if you want to connect a TFT.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
config FB_NVIDIA
|
||||
tristate "nVidia Framebuffer Support"
|
||||
depends on FB && PCI
|
||||
|
|
|
|||
|
|
@ -154,14 +154,14 @@ config ARM_SP805_WATCHDOG
|
|||
|
||||
config AT91RM9200_WATCHDOG
|
||||
tristate "AT91RM9200 watchdog"
|
||||
depends on ARCH_AT91RM9200
|
||||
depends on SOC_AT91RM9200
|
||||
help
|
||||
Watchdog timer embedded into AT91RM9200 chips. This will reboot your
|
||||
system when the timeout is reached.
|
||||
|
||||
config AT91SAM9X_WATCHDOG
|
||||
tristate "AT91SAM9X / AT91CAP9 watchdog"
|
||||
depends on ARCH_AT91 && !ARCH_AT91RM9200
|
||||
depends on ARCH_AT91
|
||||
select WATCHDOG_CORE
|
||||
help
|
||||
Watchdog timer embedded into AT91SAM9X and AT91CAP9 chips. This will
|
||||
|
|
|
|||
Loading…
Reference in New Issue