drm/nouveau/pwr/memx: rename fb off/on to block/unblock
More accurate as to the function of the opcodes. Not only is FB disabled, but the host is prevented from touching the GPU. An upcoming patch for Kepler will also halt PFIFO (as NVIDIA does). Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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630a6a466b
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@ -48,7 +48,7 @@ void nouveau_memx_wait(struct nouveau_memx *,
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u32 addr, u32 mask, u32 data, u32 nsec);
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u32 addr, u32 mask, u32 data, u32 nsec);
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void nouveau_memx_nsec(struct nouveau_memx *, u32 nsec);
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void nouveau_memx_nsec(struct nouveau_memx *, u32 nsec);
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void nouveau_memx_wait_vblank(struct nouveau_memx *);
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void nouveau_memx_wait_vblank(struct nouveau_memx *);
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void nouveau_memx_fb_disable(struct nouveau_memx *);
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void nouveau_memx_block(struct nouveau_memx *);
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void nouveau_memx_fb_enable(struct nouveau_memx *);
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void nouveau_memx_unblock(struct nouveau_memx *);
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#endif
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#endif
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@ -112,15 +112,15 @@ ramfuc_wait_vblank(struct ramfuc *ram)
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}
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}
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static inline void
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static inline void
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ramfuc_fb_disable(struct ramfuc *ram)
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ramfuc_block(struct ramfuc *ram)
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{
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{
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nouveau_memx_fb_disable(ram->memx);
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nouveau_memx_block(ram->memx);
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}
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}
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static inline void
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static inline void
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ramfuc_fb_enable(struct ramfuc *ram)
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ramfuc_unblock(struct ramfuc *ram)
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{
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{
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nouveau_memx_fb_enable(ram->memx);
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nouveau_memx_unblock(ram->memx);
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}
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}
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#define ram_init(s,p) ramfuc_init(&(s)->base, (p))
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#define ram_init(s,p) ramfuc_init(&(s)->base, (p))
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@ -133,7 +133,7 @@ ramfuc_fb_enable(struct ramfuc *ram)
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#define ram_wait(s,r,m,d,n) ramfuc_wait(&(s)->base, (r), (m), (d), (n))
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#define ram_wait(s,r,m,d,n) ramfuc_wait(&(s)->base, (r), (m), (d), (n))
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#define ram_nsec(s,n) ramfuc_nsec(&(s)->base, (n))
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#define ram_nsec(s,n) ramfuc_nsec(&(s)->base, (n))
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#define ram_wait_vblank(s) ramfuc_wait_vblank(&(s)->base)
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#define ram_wait_vblank(s) ramfuc_wait_vblank(&(s)->base)
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#define ram_fb_disable(s) ramfuc_fb_disable(&(s)->base)
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#define ram_block(s) ramfuc_block(&(s)->base)
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#define ram_fb_enable(s) ramfuc_fb_enable(&(s)->base)
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#define ram_unblock(s) ramfuc_unblock(&(s)->base)
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#endif
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#endif
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@ -264,7 +264,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
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u32 mask, data;
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u32 mask, data;
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ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
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ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
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ram_fb_disable(fuc);
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ram_block(fuc);
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ram_wr32(fuc, 0x62c000, 0x0f0f0000);
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ram_wr32(fuc, 0x62c000, 0x0f0f0000);
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/* MR1: turn termination on early, for some reason.. */
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/* MR1: turn termination on early, for some reason.. */
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@ -663,7 +663,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
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if (next->bios.ramcfg_11_07_02)
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if (next->bios.ramcfg_11_07_02)
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nve0_ram_train(fuc, 0x80020000, 0x01000000);
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nve0_ram_train(fuc, 0x80020000, 0x01000000);
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ram_fb_enable(fuc);
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ram_unblock(fuc);
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ram_wr32(fuc, 0x62c000, 0x0f0f0f00);
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ram_wr32(fuc, 0x62c000, 0x0f0f0f00);
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if (next->bios.rammap_11_08_01)
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if (next->bios.rammap_11_08_01)
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@ -693,7 +693,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
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u32 mask, data;
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u32 mask, data;
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ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
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ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
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ram_fb_disable(fuc);
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ram_block(fuc);
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ram_wr32(fuc, 0x62c000, 0x0f0f0000);
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ram_wr32(fuc, 0x62c000, 0x0f0f0000);
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if (vc == 1 && ram_have(fuc, gpio2E)) {
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if (vc == 1 && ram_have(fuc, gpio2E)) {
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@ -916,7 +916,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
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ram_mask(fuc, 0x10f200, 0x80000000, 0x00000000);
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ram_mask(fuc, 0x10f200, 0x80000000, 0x00000000);
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ram_nsec(fuc, 1000);
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ram_nsec(fuc, 1000);
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ram_fb_enable(fuc);
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ram_unblock(fuc);
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ram_wr32(fuc, 0x62c000, 0x0f0f0f00);
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ram_wr32(fuc, 0x62c000, 0x0f0f0f00);
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if (next->bios.rammap_11_08_01)
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if (next->bios.rammap_11_08_01)
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@ -43,9 +43,9 @@ process(PROC_MEMX, #memx_init, #memx_recv)
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*/ .b32 func
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*/ .b32 func
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memx_func_head:
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memx_func_head:
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handler(FB_OFF, 0x0000, 0x0000, #memx_func_enter)
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handler(ENTER , 0x0000, 0x0000, #memx_func_enter)
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memx_func_next:
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memx_func_next:
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handler(FB_ON , 0x0000, 0x0000, #memx_func_leave)
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handler(LEAVE , 0x0000, 0x0000, #memx_func_leave)
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handler(WR32 , 0x0000, 0x0002, #memx_func_wr32)
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handler(WR32 , 0x0000, 0x0002, #memx_func_wr32)
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handler(WAIT , 0x0004, 0x0000, #memx_func_wait)
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handler(WAIT , 0x0004, 0x0000, #memx_func_wait)
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handler(DELAY , 0x0001, 0x0000, #memx_func_delay)
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handler(DELAY , 0x0001, 0x0000, #memx_func_delay)
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@ -19,8 +19,8 @@
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#define MEMX_MSG_EXEC 1
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#define MEMX_MSG_EXEC 1
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/* MEMX: script opcode definitions */
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/* MEMX: script opcode definitions */
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#define MEMX_FB_OFF 0
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#define MEMX_ENTER 0
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#define MEMX_FB_ON 1
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#define MEMX_LEAVE 1
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#define MEMX_WR32 2
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#define MEMX_WR32 2
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#define MEMX_WAIT 3
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#define MEMX_WAIT 3
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#define MEMX_DELAY 4
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#define MEMX_DELAY 4
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@ -151,21 +151,21 @@ nouveau_memx_wait_vblank(struct nouveau_memx *memx)
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}
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}
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void
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void
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nouveau_memx_fb_disable(struct nouveau_memx *memx)
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nouveau_memx_block(struct nouveau_memx *memx)
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{
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{
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struct nouveau_pwr *ppwr = memx->ppwr;
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struct nouveau_pwr *ppwr = memx->ppwr;
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nv_debug(memx->ppwr, " FB OFF\n");
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nv_debug(memx->ppwr, " HOST BLOCKED\n");
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nv_wr32(ppwr, 0x10a1c4, MEMX_FB_OFF);
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nv_wr32(ppwr, 0x10a1c4, MEMX_ENTER);
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}
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}
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void
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void
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nouveau_memx_fb_enable(struct nouveau_memx *memx)
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nouveau_memx_unblock(struct nouveau_memx *memx)
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{
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{
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struct nouveau_pwr *ppwr = memx->ppwr;
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struct nouveau_pwr *ppwr = memx->ppwr;
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nv_debug(memx->ppwr, " FB ON\n");
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nv_debug(memx->ppwr, " HOST UNBLOCKED\n");
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nv_wr32(ppwr, 0x10a1c4, MEMX_FB_ON);
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nv_wr32(ppwr, 0x10a1c4, MEMX_LEAVE);
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}
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}
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#endif
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#endif
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