MIPS: ath79: fix broken ar724x_pci_{read,write} functions
The current ar724x_pci_{read,write} functions are broken. Due to that, pci_read_config_byte returns with bogus values, and pci_write_config_{byte,word} unconditionally clears the accessed PCI configuration registers instead of changing the value of them. The patch fixes the broken functions, thus the PCI configuration space can be accessed correctly. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -22,8 +22,9 @@ static void __iomem *ar724x_pci_devcfg_base;
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static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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int size, uint32_t *value)
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{
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unsigned long flags, addr, tval, mask;
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unsigned long flags;
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void __iomem *base;
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u32 data;
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if (devfn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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@ -31,24 +32,22 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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base = ar724x_pci_devcfg_base;
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spin_lock_irqsave(&ar724x_pci_lock, flags);
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data = __raw_readl(base + (where & ~3));
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switch (size) {
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case 1:
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addr = where & ~3;
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mask = 0xff000000 >> ((where % 4) * 8);
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tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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if (where & 1)
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data >>= 8;
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if (where & 2)
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data >>= 16;
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data &= 0xff;
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break;
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case 2:
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addr = where & ~3;
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mask = 0xffff0000 >> ((where % 4)*8);
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tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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if (where & 2)
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data >>= 16;
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data &= 0xffff;
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break;
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case 4:
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*value = __raw_readl(base + where);
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break;
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default:
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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@ -57,6 +56,7 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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}
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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*value = data;
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return PCIBIOS_SUCCESSFUL;
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}
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@ -64,8 +64,10 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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int size, uint32_t value)
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{
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unsigned long flags, tval, addr, mask;
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unsigned long flags;
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void __iomem *base;
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u32 data;
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int s;
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if (devfn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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@ -73,26 +75,21 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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base = ar724x_pci_devcfg_base;
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spin_lock_irqsave(&ar724x_pci_lock, flags);
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data = __raw_readl(base + (where & ~3));
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switch (size) {
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case 1:
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addr = where & ~3;
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mask = 0xff000000 >> ((where % 4)*8);
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tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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tval |= (value << ((4 - (where % 4))*8)) & mask;
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__raw_writel(tval, base + addr);
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s = ((where & 3) * 8);
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data &= ~(0xff << s);
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data |= ((value & 0xff) << s);
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break;
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case 2:
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addr = where & ~3;
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mask = 0xffff0000 >> ((where % 4)*8);
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tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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tval |= (value << ((4 - (where % 4))*8)) & mask;
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__raw_writel(tval, base + addr);
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s = ((where & 2) * 8);
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data &= ~(0xffff << s);
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data |= ((value & 0xffff) << s);
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break;
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case 4:
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__raw_writel(value, (base + where));
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data = value;
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break;
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default:
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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@ -100,6 +97,9 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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__raw_writel(data, base + (where & ~3));
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/* flush write */
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__raw_readl(base + (where & ~3));
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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return PCIBIOS_SUCCESSFUL;
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