serial: 8250_dw: fix wrong logic in dw8250_check_lcr()
Commitcdcea058e5
("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()") introduce a wrong logic when write val to LCR reg. When CONFIG_64BIT enabled, __raw_writeq is used unconditionally. The __raw_readq/__raw_writeq is introduced by commitbca2092d78
("serial: 8250_dw: Use 64-bit access for OCTEON.") for OCTEON. So for 64BIT && !PORT_OCTEON, we better to use coincident write function. Fixes: cdcea058e510("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()") Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -104,15 +104,16 @@ static void dw8250_check_lcr(struct uart_port *p, int value)
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dw8250_force_idle(p);
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#ifdef CONFIG_64BIT
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__raw_writeq(value & 0xff, offset);
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#else
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if (p->type == PORT_OCTEON)
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__raw_writeq(value & 0xff, offset);
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else
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#endif
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if (p->iotype == UPIO_MEM32)
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writel(value, offset);
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else if (p->iotype == UPIO_MEM32BE)
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iowrite32be(value, offset);
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else
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writeb(value, offset);
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#endif
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}
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/*
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* FIXME: this deadlocks if port->lock is already held
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