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serial: 8250_dw: fix wrong logic in dw8250_check_lcr()

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Commit cdcea058e5 ("serial: 8250_dw: Avoid serial_outx code duplicate
with new dw8250_check_lcr()") introduce a wrong logic when write val to
LCR reg. When CONFIG_64BIT enabled, __raw_writeq is used unconditionally.

The __raw_readq/__raw_writeq is introduced by commit bca2092d78 ("serial:
8250_dw: Use 64-bit access for OCTEON.") for OCTEON.

So for 64BIT && !PORT_OCTEON, we better to use coincident write function.

Fixes: cdcea058e510("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Kefeng Wang 2016-05-02 17:19:46 +08:00 committed by Greg Kroah-Hartman
parent 96317e9e2a
commit 6550be9f62
1 changed files with 4 additions and 3 deletions
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7
drivers/tty/serial/8250/8250_dw.c
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@ -104,15 +104,16 @@ static void dw8250_check_lcr(struct uart_port *p, int value)
dw8250_force_idle(p);
#ifdef CONFIG_64BIT
__raw_writeq(value & 0xff, offset);
#else
if (p->type == PORT_OCTEON)
__raw_writeq(value & 0xff, offset);
else
#endif
if (p->iotype == UPIO_MEM32)
writel(value, offset);
else if (p->iotype == UPIO_MEM32BE)
iowrite32be(value, offset);
else
writeb(value, offset);
#endif
}
/*
* FIXME: this deadlocks if port->lock is already held