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ARM: dts: imx7d: add low power support 

This patch adds low power mode support for i.MX7D, including
FastMix off feature support, low power idle support and A7-M4
AMP power management support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Anson Huang 2019-04-22 09:23:41 +08:00 committed by Dong Aisheng
parent b92e16830e
commit 7052d5ef55
6 changed files with 151 additions and 29 deletions
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1
arch/arm/boot/dts/Makefile
View File

@ -599,6 +599,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-pico-pi.dtb \
imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \
imx7d-sdb-m4.dtb \
imx7d-sdb-reva.dtb \
imx7d-sdb-sht11.dtb \
imx7d-zii-rmu2.dtb \

9
arch/arm/boot/dts/imx7d-sdb-m4.dts 100644
View File

@ -0,0 +1,9 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "imx7d-sdb.dts"
#include "imx7d-sdb-m4.dtsi"

68
arch/arm/boot/dts/imx7d-sdb-m4.dtsi 100644
View File

@ -0,0 +1,68 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
memory {
linux,usable-memory = <0x80000000 0x1ff00000>,
<0xa0000000 0x1ff00000>;
};
m4_tcm: tcml@007f8000 {
compatible = "fsl, m4_tcml";
reg = <0x007f8000 0x8000>;
};
};
&adc1 {
status = "disabled";
};
&adc2 {
status = "disabled";
};
&flexcan1 {
status = "disabled";
};
&flexcan2 {
status = "disabled";
};
&i2c2 {
status = "disabled";
};
&gpt3 {
status = "disabled";
};
&gpt4 {
status = "disabled";
};
&ocram {
reg = <0x00901000 0xf000>;
};
&reg_can2_3v3 {
status = "disabled";
};
&rpmsg{
vdev-nums = <1>;
reg = <0xbfff0000 0x10000>;
status = "okay";
};
&uart2 {
status = "disabled";
};
&wdog3{
status = "disabled";
};

2
arch/arm/boot/dts/imx7d-sdb.dts
View File

@ -405,7 +405,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
status = "okay";
};

63
arch/arm/boot/dts/imx7d.dtsi
View File

@ -22,7 +22,6 @@
reg = <1>;
clock-frequency = <996000000>;
operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&cpu_sleep_wait>;
};
};
@ -77,9 +76,10 @@
<&clks IMX7D_DRAM_ROOT_SRC>, <&clks IMX7D_DRAM_ALT_ROOT_SRC>,
<&clks IMX7D_PLL_DRAM_MAIN_CLK>, <&clks IMX7D_DRAM_ALT_ROOT_CLK>,
<&clks IMX7D_PLL_SYS_PFD2_270M_CLK>, <&clks IMX7D_PLL_SYS_PFD1_332M_CLK>,
<&clks IMX7D_AHB_CHANNEL_ROOT_CLK>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>;
clock-names = "osc", "axi_sel", "ahb_sel", "pfd0_392m", "dram_root", "dram_alt_sel",
"pll_dram", "dram_alt_root", "pfd2_270m", "pfd1_332m", "ahb", "axi";
<&clks IMX7D_AHB_CHANNEL_ROOT_DIV>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>;
clock-names = "osc", "axi_sel", "ahb_sel", "pfd0_392m", "dram_root",
"dram_alt_sel", "pll_dram", "dram_alt_root", "pfd2_270m",
"pfd1_332m", "ahb", "axi";
interrupts = <0 112 0x04>, <0 113 0x04>;
interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
};
@ -90,6 +90,12 @@
clocks = <&clks IMX7D_OCRAM_CLK>;
};
ocram: sram@901000 {
compatible = "mmio-sram";
reg = <0x00901000 0x1f000>;
clocks = <&clks IMX7D_OCRAM_CLK>;
};
ocrams: sram@00180000 {
compatible = "fsl,lpm-sram";
reg = <0x00180000 0x8000>;
@ -97,6 +103,12 @@
status = "disabled";
};
ocrams_mf: sram-mf@00900000 {
compatible = "fsl,mega-fast-sram";
reg = <0x00900000 0x20000>;
clocks = <&clks IMX7D_OCRAM_CLK>;
};
etm@3007d000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x3007d000 0x1000>;
@ -140,9 +152,52 @@
reg = <0x306d0000 0x10000>;
status = "disabled";
};
system_counter_rd: system-counter-rd@306a0000 {
compatible = "fsl,imx7d-system-counter-rd";
reg = <0x306a0000 0x10000>;
status = "disabled";
};
system_counter_cmp: system-counter-cmp@306b0000 {
compatible = "fsl,imx7d-system-counter-cmp";
reg = <0x306b0000 0x10000>;
status = "disabled";
};
system_counter_ctrl: system-counter-ctrl@306c0000 {
compatible = "fsl,imx7d-system-counter-ctrl";
reg = <0x306c0000 0x10000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
&aips3 {
mu: mu@30aa0000 {
compatible = "fsl,imx7d-mu", "fsl,imx6sx-mu";
reg = <0x30aa0000 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_MU_ROOT_CLK>;
clock-names = "mu";
status = "okay";
};
rpmsg: rpmsg{
compatible = "fsl,imx7d-rpmsg";
status = "disabled";
};
sema4: sema4@30ac0000 {
compatible = "fsl,imx7d-sema4";
reg = <0x30ac0000 0x10000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_SEMA4_HS_ROOT_CLK>;
clock-names = "sema4";
status = "okay";
};
usbotg2: usb@30b20000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b20000 0x200>;

37
arch/arm/boot/dts/imx7s.dtsi
View File

@ -53,19 +53,6 @@
#address-cells = <1>;
#size-cells = <0>;
idle-states {
entry-method = "psci";
cpu_sleep_wait: cpu-sleep-wait {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <100>;
exit-latency-us = <50>;
min-residency-us = <1000>;
};
};
cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
@ -73,7 +60,6 @@
clock-frequency = <792000000>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clks IMX7D_CLK_ARM>;
cpu-idle-states = <&cpu_sleep_wait>;
};
};
@ -158,15 +144,6 @@
clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
};
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -316,6 +293,17 @@
<0x31006000 0x2000>;
};
timer {
compatible = "arm,armv7-timer";
arm,cpu-registers-not-fw-configured;
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <8000000>;
};
aips1: aips-bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
@ -628,7 +616,7 @@
};
src: src@30390000 {
compatible = "fsl,imx7d-src", "syscon";
compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon";
reg = <0x30390000 0x10000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
@ -641,6 +629,7 @@
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
fsl,mf-mix-wakeup-irq = <0x54010000 0xc00 0x0 0x1040640>;
#power-domain-cells = <1>;
pgc {