MLK-22824-1: mfd: pca9450: add pca9450 mfd driver
Add new pmic pca9450 driver for i.mx8mn-evk board. Signed-off-by: John Lee <john.lee@nxp.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Anson Huang <anson.huang@nxp.com> (cherry picked from commit 2189979539bb9817d3d8bf0f5489f906d86e673f)5.4-rM2-2.2.x-imx-squashed
Robin Gong
parent
c286e88c71
commit
919ef6d130
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@ -0,0 +1,51 @@
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* NXP PCA9450 Power Management Integrated Circuit (PMIC) bindings
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Required properties:
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- compatible : Should be "nxp,pca9450".
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- reg : I2C slave address.
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- pinctrl-0 : Pinctrl setting for pmic such as interrupt pin.
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- gpio_intr : gpio pin used for interrupt pin.
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- regulators: : List of child nodes that specify the regulator
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initialization data. Including 6 buck regulators
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and 5 ldo regulators.
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Example:
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pmic: pca9450@25 {
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reg = <0x25>;
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compatible = "nxp,pca9450";
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/* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
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pinctrl-0 = <&pinctrl_pmic>;
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gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;
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regulators {
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#address-cells = <1>;
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#size-cells = <0>;
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pca9450,pmic-buck2-uses-i2c-dvs;
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/* Run/Standby voltage */
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pca9450,pmic-buck2-dvs-voltage = <950000>, <850000>;
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buck1_reg: regulator@0 {
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reg = <0>;
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regulator-compatible = "buck1";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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buck2_reg: regulator@1 {
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reg = <1>;
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regulator-compatible = "buck2";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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.....
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};
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};
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@ -1975,6 +1975,14 @@ config MFD_STMFX
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additional drivers must be enabled in order to use the functionality
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of the device.
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config MFD_PCA9450
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bool "PCA9450 Power Management chip"
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depends on I2C=y
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select MFD_CORE
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help
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if you say yes here you get support for the PCA9450
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Power Management chips.
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menu "Multimedia Capabilities Port drivers"
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depends on ARCH_SA1100
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@ -256,4 +256,5 @@ obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
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obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-bd70528.o
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obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
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obj-$(CONFIG_MFD_STMFX) += stmfx.o
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obj-$(CONFIG_MFD_PCA9450) += pca9450.o
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@ -0,0 +1,304 @@
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/*
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* @file pca9450.c -- NXP PCA9450 mfd driver
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Copyright 2019 NXP.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/gpio.h>
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#include <linux/regmap.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/pca9450.h>
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/* @brief pca9450 irq resource */
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static struct resource pmic_resources[] = {
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{
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.start = PCA9450_IRQ,
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.end = PCA9450_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* @brief pca9450 multi function cells */
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static struct mfd_cell pca9450_mfd_cells[] = {
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{
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.name = "pca9450-pmic",
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.num_resources = ARRAY_SIZE(pmic_resources),
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.resources = &pmic_resources[0],
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},
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};
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/* @brief pca9450 irqs */
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static const struct regmap_irq pca9450_irqs[] = {
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[PCA9450_IRQ] = {
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.mask = PCA9450_INT_MASK,
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.reg_offset = 0,
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},
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};
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/* @brief pca9450 irq chip definition */
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static struct regmap_irq_chip pca9450_irq_chip = {
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.name = "pca9450",
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.irqs = pca9450_irqs,
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.num_irqs = ARRAY_SIZE(pca9450_irqs),
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.num_regs = 1,
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.irq_reg_stride = 1,
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.status_base = PCA9450_INT1,
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.mask_base = PCA9450_INT1_MSK,
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.mask_invert = true,
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};
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/*
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* @brief pca9450 irq initialize
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* @param pca9450 pca9450 device to init
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* @param bdinfo platform init data
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* @retval 0 probe success
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* @retval negative error number
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*/
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static int pca9450_irq_init(struct pca9450 *pca9450,
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struct pca9450_board *bdinfo)
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{
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int irq;
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int ret = 0;
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if (!bdinfo) {
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dev_warn(pca9450->dev, "No interrupt support, no pdata\n");
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return -EINVAL;
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}
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dev_info(pca9450->dev, "gpio_intr = %d\n", bdinfo->gpio_intr);
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irq = gpio_to_irq(bdinfo->gpio_intr);
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pca9450->chip_irq = irq;
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dev_info(pca9450->dev, "chip_irq=%d\n", pca9450->chip_irq);
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ret = regmap_add_irq_chip(pca9450->regmap, pca9450->chip_irq,
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IRQF_ONESHOT | IRQF_TRIGGER_FALLING, bdinfo->irq_base,
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&pca9450_irq_chip, &pca9450->irq_data);
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if (ret < 0)
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dev_warn(pca9450->dev, "Failed to add irq_chip %d\n", ret);
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return ret;
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}
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/*
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* @brief pca9450 irq initialize
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* @param pca9450 pca9450 device to init
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* @retval 0 probe success
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* @retval negative error number
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*/
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static int pca9450_irq_exit(struct pca9450 *pca9450)
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{
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if (pca9450->chip_irq > 0)
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regmap_del_irq_chip(pca9450->chip_irq, pca9450->irq_data);
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return 0;
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}
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/*
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* @brief check whether volatile register
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* @param dev kernel device pointer
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* @param reg register index
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*/
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static bool is_volatile_reg(struct device *dev, unsigned int reg)
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{
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/*
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* Caching all regulator registers.
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*/
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return true;
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}
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/* @brief regmap configures */
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static const struct regmap_config pca9450_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.volatile_reg = is_volatile_reg,
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.max_register = PCA9450_MAX_REGISTER - 1,
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.cache_type = REGCACHE_RBTREE,
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};
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#ifdef CONFIG_OF
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static const struct of_device_id pca9450_of_match[] = {
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{ .compatible = "nxp,pca9450", .data = (void *)0},
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{ },
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};
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MODULE_DEVICE_TABLE(of, pca9450_of_match);
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/*
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* @brief parse device tree data of pca9450
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* @param client client object provided by system
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* @param chip_id return chip id back to caller
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* @return board initialize data
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*/
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static struct pca9450_board *pca9450_parse_dt(struct i2c_client *client,
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int *chip_id)
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{
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struct device_node *np = client->dev.of_node;
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struct pca9450_board *board_info;
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unsigned int prop;
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const struct of_device_id *match;
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int r = 0;
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match = of_match_device(pca9450_of_match, &client->dev);
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if (!match) {
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dev_err(&client->dev, "Failed to find matching dt id\n");
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return NULL;
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}
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chip_id = (int *)match->data;
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board_info = devm_kzalloc(&client->dev, sizeof(*board_info),
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GFP_KERNEL);
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if (!board_info)
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return NULL;
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board_info->gpio_intr = of_get_named_gpio(np, "gpio_intr", 0);
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if (!gpio_is_valid(board_info->gpio_intr)) {
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dev_err(&client->dev, "no pmic intr pin available\n");
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goto err_intr;
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}
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r = of_property_read_u32(np, "irq_base", &prop);
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if (!r)
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board_info->irq_base = prop;
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else
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board_info->irq_base = -1;
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return board_info;
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err_intr:
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devm_kfree(&client->dev, board_info);
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return NULL;
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}
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#endif
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/*
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* @brief probe pca9450 device
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* @param i2c client object provided by system
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* @param id chip id
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* @retval 0 probe success
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* @retval negative error number
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*/
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static int pca9450_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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struct pca9450 *pca9450;
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struct pca9450_board *pmic_plat_data;
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struct pca9450_board *of_pmic_plat_data = NULL;
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int chip_id = id->driver_data;
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int ret = 0;
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pmic_plat_data = dev_get_platdata(&i2c->dev);
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if (!pmic_plat_data && i2c->dev.of_node) {
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pmic_plat_data = pca9450_parse_dt(i2c, &chip_id);
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of_pmic_plat_data = pmic_plat_data;
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}
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if (!pmic_plat_data)
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return -EINVAL;
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pca9450 = kzalloc(sizeof(struct pca9450), GFP_KERNEL);
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if (pca9450 == NULL)
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return -ENOMEM;
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pca9450->of_plat_data = of_pmic_plat_data;
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i2c_set_clientdata(i2c, pca9450);
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pca9450->dev = &i2c->dev;
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pca9450->i2c_client = i2c;
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pca9450->id = chip_id;
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mutex_init(&pca9450->io_mutex);
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pca9450->regmap = devm_regmap_init_i2c(i2c, &pca9450_regmap_config);
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if (IS_ERR(pca9450->regmap)) {
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ret = PTR_ERR(pca9450->regmap);
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dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret);
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return ret;
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}
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ret = pca9450_reg_read(pca9450, PCA9450_REG_DEV_ID);
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if (ret < 0) {
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dev_err(pca9450->dev, "%s(): Read PCA9450_REG_DEVICE failed!\n",
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__func__);
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goto err;
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}
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dev_info(pca9450->dev, "Device ID=0x%X\n", ret);
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pca9450_irq_init(pca9450, of_pmic_plat_data);
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ret = mfd_add_devices(pca9450->dev, -1,
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pca9450_mfd_cells, ARRAY_SIZE(pca9450_mfd_cells),
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NULL, 0,
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regmap_irq_get_domain(pca9450->irq_data));
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if (ret < 0)
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goto err;
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return ret;
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err:
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mfd_remove_devices(pca9450->dev);
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kfree(pca9450);
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return ret;
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}
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/*
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* @brief remove pca9450 device
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* @param i2c client object provided by system
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* @return 0
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*/
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static int pca9450_i2c_remove(struct i2c_client *i2c)
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{
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struct pca9450 *pca9450 = i2c_get_clientdata(i2c);
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pca9450_irq_exit(pca9450);
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mfd_remove_devices(pca9450->dev);
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kfree(pca9450);
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return 0;
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}
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static const struct i2c_device_id pca9450_i2c_id[] = {
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{ "pca9450", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, pca9450_i2c_id);
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static struct i2c_driver pca9450_i2c_driver = {
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.driver = {
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.name = "pca9450",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(pca9450_of_match),
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},
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.probe = pca9450_i2c_probe,
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.remove = pca9450_i2c_remove,
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.id_table = pca9450_i2c_id,
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};
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static int __init pca9450_i2c_init(void)
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{
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return i2c_add_driver(&pca9450_i2c_driver);
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}
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/* init early so consumer devices can complete system boot */
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subsys_initcall(pca9450_i2c_init);
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static void __exit pca9450_i2c_exit(void)
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{
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i2c_del_driver(&pca9450_i2c_driver);
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}
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module_exit(pca9450_i2c_exit);
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MODULE_AUTHOR("John Lee <john.lee@nxp.com>");
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MODULE_DESCRIPTION("PCA9450 chip multi-function driver");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,355 @@
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/**
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* @file pca9450.h NXP PCA9450 header file
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*
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* Copyright 2019 NXP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __LINUX_MFD_PCA9450_H
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#define __LINUX_MFD_PCA9450_H
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#include <linux/regmap.h>
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enum {
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PCA9450_BUCK1 = 0,
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PCA9450_BUCK2,
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PCA9450_BUCK3,
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PCA9450_BUCK4,
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PCA9450_BUCK5,
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PCA9450_BUCK6,
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PCA9450_LDO1,
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PCA9450_LDO2,
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PCA9450_LDO3,
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PCA9450_LDO4,
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PCA9450_LDO5,
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PCA9450_REGULATOR_CNT,
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};
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#define PCA9450_SUPPLY_STATE_ENABLED 0x1
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#define PCA9450_BUCK1_VOLTAGE_NUM 0x80
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#define PCA9450_BUCK2_VOLTAGE_NUM 0x80
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#define PCA9450_BUCK3_VOLTAGE_NUM 0x80
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#define PCA9450_BUCK4_VOLTAGE_NUM 0x80
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#define PCA9450_BUCK5_VOLTAGE_NUM 0x80
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#define PCA9450_BUCK6_VOLTAGE_NUM 0x80
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#define PCA9450_LDO1_VOLTAGE_NUM 0x08
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#define PCA9450_LDO2_VOLTAGE_NUM 0x08
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#define PCA9450_LDO3_VOLTAGE_NUM 0x20
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#define PCA9450_LDO4_VOLTAGE_NUM 0x20
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#define PCA9450_LDO5_VOLTAGE_NUM 0x10
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enum {
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PCA9450_REG_DEV_ID = 0x00,
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PCA9450_INT1 = 0x01,
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PCA9450_INT1_MSK = 0x02,
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PCA9450_STATUS1 = 0x03,
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PCA9450_STATUS2 = 0x04,
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PCA9450_PWRON_STAT = 0x05,
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PCA9450_SW_RST = 0x06,
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PCA9450_PWR_CTRL = 0x07,
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PCA9450_RESET_CTRL = 0x08,
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PCA9450_CONFIG1 = 0x09,
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PCA9450_CONFIG2 = 0x0A,
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PCA9450_BUCK123_DVS = 0x0C,
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PCA9450_BUCK1OUT_LIMIT = 0x0D,
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PCA9450_BUCK2OUT_LIMIT = 0x0E,
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PCA9450_BUCK3OUT_LIMIT = 0x0F,
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PCA9450_BUCK1CTRL = 0x10,
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PCA9450_BUCK1OUT_DVS0 = 0x11,
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PCA9450_BUCK1OUT_DVS1 = 0x12,
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PCA9450_BUCK2CTRL = 0x13,
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PCA9450_BUCK2OUT_DVS0 = 0x14,
|
||||
PCA9450_BUCK2OUT_DVS1 = 0x15,
|
||||
PCA9450_BUCK3CTRL = 0x16,
|
||||
PCA9450_BUCK3OUT_DVS0 = 0x17,
|
||||
PCA9450_BUCK3OUT_DVS1 = 0x18,
|
||||
PCA9450_BUCK4CTRL = 0x19,
|
||||
PCA9450_BUCK4OUT = 0x1A,
|
||||
PCA9450_BUCK5CTRL = 0x1B,
|
||||
PCA9450_BUCK5OUT = 0x1C,
|
||||
PCA9450_BUCK6CTRL = 0x1D,
|
||||
PCA9450_BUCK6OUT = 0x1E,
|
||||
PCA9450_LDO_AD_CTRL = 0x20,
|
||||
PCA9450_LDO1CTRL = 0x21,
|
||||
PCA9450_LDO2CTRL = 0x22,
|
||||
PCA9450_LDO3CTRL = 0x23,
|
||||
PCA9450_LDO4CTRL = 0x24,
|
||||
PCA9450_LDO5CTRL_L = 0x25,
|
||||
PCA9450_LDO5CTRL_H = 0x26,
|
||||
PCA9450_LOADSW_CTRL = 0x2A,
|
||||
PCA9450_VRFLT1_STS = 0x2B,
|
||||
PCA9450_VRFLT2_STS = 0x2C,
|
||||
PCA9450_VRFLT1_MASK = 0x2D,
|
||||
PCA9450_VRFLT2_MASK = 0x2E,
|
||||
PCA9450_MAX_REGISTER = 0x2F,
|
||||
};
|
||||
|
||||
/* PCA9450 BUCK ENMODE bits */
|
||||
#define BUCK_ENMODE_OFF 0x00
|
||||
#define BUCK_ENMODE_ONREQ 0x01
|
||||
#define BUCK_ENMODE_ONREQ_STBYREQ 0x02
|
||||
#define BUCK_ENMODE_ON 0x03
|
||||
|
||||
/* PCA9450_REG_BUCK1_CTRL bits */
|
||||
#define BUCK1_RAMP_MASK 0xC0
|
||||
#define BUCK1_RAMP_25MV 0x0
|
||||
#define BUCK1_RAMP_12P5MV 0x1
|
||||
#define BUCK1_RAMP_6P25MV 0x2
|
||||
#define BUCK1_RAMP_3P125MV 0x3
|
||||
#define BUCK1_DVS_CTRL 0x10
|
||||
#define BUCK1_AD 0x08
|
||||
#define BUCK1_FPWM 0x04
|
||||
#define BUCK1_ENMODE_MASK 0x03
|
||||
|
||||
/* PCA9450_REG_BUCK2_CTRL bits */
|
||||
#define BUCK2_RAMP_MASK 0xC0
|
||||
#define BUCK2_RAMP_25MV 0x0
|
||||
#define BUCK2_RAMP_12P5MV 0x1
|
||||
#define BUCK2_RAMP_6P25MV 0x2
|
||||
#define BUCK2_RAMP_3P125MV 0x3
|
||||
#define BUCK2_DVS_CTRL 0x10
|
||||
#define BUCK2_AD 0x08
|
||||
#define BUCK2_FPWM 0x04
|
||||
#define BUCK2_ENMODE_MASK 0x03
|
||||
|
||||
/* PCA9450_REG_BUCK3_CTRL bits */
|
||||
#define BUCK3_RAMP_MASK 0xC0
|
||||
#define BUCK3_RAMP_25MV 0x0
|
||||
#define BUCK3_RAMP_12P5MV 0x1
|
||||
#define BUCK3_RAMP_6P25MV 0x2
|
||||
#define BUCK3_RAMP_3P125MV 0x3
|
||||
#define BUCK3_DVS_CTRL 0x10
|
||||
#define BUCK3_AD 0x08
|
||||
#define BUCK3_FPWM 0x04
|
||||
#define BUCK3_ENMODE_MASK 0x03
|
||||
|
||||
/* PCA9450_REG_BUCK4_CTRL bits */
|
||||
#define BUCK4_AD 0x08
|
||||
#define BUCK4_FPWM 0x04
|
||||
#define BUCK4_ENMODE_MASK 0x03
|
||||
|
||||
/* PCA9450_REG_BUCK5_CTRL bits */
|
||||
#define BUCK5_AD 0x08
|
||||
#define BUCK5_FPWM 0x04
|
||||
#define BUCK5_ENMODE_MASK 0x03
|
||||
|
||||
/* PCA9450_REG_BUCK6_CTRL bits */
|
||||
#define BUCK6_AD 0x08
|
||||
#define BUCK6_FPWM 0x04
|
||||
#define BUCK6_ENMODE_MASK 0x03
|
||||
|
||||
/* PCA9450_BUCK1OUT_DVS0 bits */
|
||||
#define BUCK1OUT_DVS0_MASK 0x7F
|
||||
#define BUCK1OUT_DVS0_DEFAULT 0x14
|
||||
|
||||
/* PCA9450_BUCK1OUT_DVS1 bits */
|
||||
#define BUCK1OUT_DVS1_MASK 0x7F
|
||||
#define BUCK1OUT_DVS1_DEFAULT 0x14
|
||||
|
||||
/* PCA9450_BUCK2OUT_DVS0 bits */
|
||||
#define BUCK2OUT_DVS0_MASK 0x7F
|
||||
#define BUCK2OUT_DVS0_DEFAULT 0x14
|
||||
|
||||
/* PCA9450_BUCK2OUT_DVS1 bits */
|
||||
#define BUCK2OUT_DVS1_MASK 0x7F
|
||||
#define BUCK2OUT_DVS1_DEFAULT 0x14
|
||||
|
||||
/* PCA9450_BUCK3OUT_DVS0 bits */
|
||||
#define BUCK3OUT_DVS0_MASK 0x7F
|
||||
#define BUCK3OUT_DVS0_DEFAULT 0x14
|
||||
|
||||
/* PCA9450_BUCK3OUT_DVS1 bits */
|
||||
#define BUCK3OUT_DVS1_MASK 0x7F
|
||||
#define BUCK3OUT_DVS1_DEFAULT 0x14
|
||||
|
||||
/* PCA9450_REG_BUCK4OUT bits */
|
||||
#define BUCK4OUT_MASK 0x7F
|
||||
#define BUCK4OUT_DEFAULT 0x6C
|
||||
|
||||
/* PCA9450_REG_BUCK5OUT bits */
|
||||
#define BUCK5OUT_MASK 0x7F
|
||||
#define BUCK5OUT_DEFAULT 0x30
|
||||
|
||||
/* PCA9450_REG_BUCK6OUT bits */
|
||||
#define BUCK6OUT_MASK 0x7F
|
||||
#define BUCK6OUT_DEFAULT 0x14
|
||||
|
||||
/* PCA9450_REG_IRQ bits */
|
||||
#define IRQ_PWRON 0x80
|
||||
#define IRQ_WDOGB 0x40
|
||||
#define IRQ_VR_FLT1 0x10
|
||||
#define IRQ_VR_FLT2 0x08
|
||||
#define IRQ_LOWVSYS 0x04
|
||||
#define IRQ_THERM_105 0x02
|
||||
#define IRQ_THERM_125 0x01
|
||||
|
||||
/* PCA9450 interrupt masks */
|
||||
enum {
|
||||
PCA9450_INT_MASK = 0xDF,
|
||||
};
|
||||
/* PCA9450 interrupt irqs */
|
||||
enum {
|
||||
PCA9450_IRQ = 0x0,
|
||||
};
|
||||
|
||||
/* PCA9450_REG_LDO1_VOLT bits */
|
||||
#define LDO1_EN_MASK 0xC0
|
||||
#define LDO1OUT_MASK 0x07
|
||||
|
||||
/* PCA9450_REG_LDO2_VOLT bits */
|
||||
#define LDO2_EN_MASK 0xC0
|
||||
#define LDO2OUT_MASK 0x07
|
||||
|
||||
/* PCA9450_REG_LDO3_VOLT bits */
|
||||
#define LDO3_EN_MASK 0xC0
|
||||
#define LDO3OUT_MASK 0x0F
|
||||
|
||||
/* PCA9450_REG_LDO4_VOLT bits */
|
||||
#define LDO4_EN_MASK 0xC0
|
||||
#define LDO4OUT_MASK 0x0F
|
||||
|
||||
/* PCA9450_REG_LDO5_VOLT bits */
|
||||
#define LDO5L_EN_MASK 0xC0
|
||||
#define LDO5LOUT_MASK 0x0F
|
||||
|
||||
#define LDO5H_EN_MASK 0xC0
|
||||
#define LDO5HOUT_MASK 0x0F
|
||||
|
||||
/*
|
||||
* @brief Board platform data may be used to initialize regulators.
|
||||
*/
|
||||
|
||||
struct pca9450_board {
|
||||
struct regulator_init_data *init_data[PCA9450_REGULATOR_CNT];
|
||||
int gpio_intr;
|
||||
int irq_base;
|
||||
};
|
||||
|
||||
/*
|
||||
* @brief pca9450 sub-driver chip access routines
|
||||
*/
|
||||
|
||||
struct pca9450 {
|
||||
struct device *dev;
|
||||
struct i2c_client *i2c_client;
|
||||
struct regmap *regmap;
|
||||
struct mutex io_mutex;
|
||||
unsigned int id;
|
||||
|
||||
/* IRQ Handling */
|
||||
int chip_irq;
|
||||
struct regmap_irq_chip_data *irq_data;
|
||||
|
||||
/* Client devices */
|
||||
struct pca9450_pmic *pmic;
|
||||
struct pca9450_power *power;
|
||||
|
||||
struct pca9450_board *of_plat_data;
|
||||
};
|
||||
|
||||
static inline int pca9450_chip_id(struct pca9450 *pca9450)
|
||||
{
|
||||
return pca9450->id;
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief pca9450_reg_read
|
||||
* read single register's value of pca9450
|
||||
* @param pca9450 device to read
|
||||
* @param reg register address
|
||||
* @return register value if success
|
||||
* error number if fail
|
||||
*/
|
||||
static inline int pca9450_reg_read(struct pca9450 *pca9450, u8 reg)
|
||||
{
|
||||
int r, val;
|
||||
|
||||
r = regmap_read(pca9450->regmap, reg, &val);
|
||||
if (r < 0)
|
||||
return r;
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief pca9450_reg_write
|
||||
* write single register of pca9450
|
||||
* @param pca9450 device to write
|
||||
* @param reg register address
|
||||
* @param val value to write
|
||||
* @retval 0 if success
|
||||
* @retval negative error number if fail
|
||||
*/
|
||||
|
||||
static inline int pca9450_reg_write(struct pca9450 *pca9450, u8 reg,
|
||||
unsigned int val)
|
||||
{
|
||||
return regmap_write(pca9450->regmap, reg, val);
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief pca9450_set_bits
|
||||
* set bits in one register of pca9450
|
||||
* @param pca9450 device to read
|
||||
* @param reg register address
|
||||
* @param mask mask bits
|
||||
* @retval 0 if success
|
||||
* @retval negative error number if fail
|
||||
*/
|
||||
static inline int pca9450_set_bits(struct pca9450 *pca9450, u8 reg, u8 mask)
|
||||
{
|
||||
return regmap_update_bits(pca9450->regmap, reg, mask, mask);
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief pca9450_clear_bits
|
||||
* clear bits in one register of pca9450
|
||||
* @param pca9450 device to read
|
||||
* @param reg register address
|
||||
* @param mask mask bits
|
||||
* @retval 0 if success
|
||||
* @retval negative error number if fail
|
||||
*/
|
||||
|
||||
static inline int pca9450_clear_bits(struct pca9450 *pca9450, u8 reg,
|
||||
u8 mask)
|
||||
{
|
||||
return regmap_update_bits(pca9450->regmap, reg, mask, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief pca9450_update_bits
|
||||
* update bits in one register of pca9450
|
||||
* @param pca9450 device to read
|
||||
* @param reg register address
|
||||
* @param mask mask bits
|
||||
* @param val value to update
|
||||
* @retval 0 if success
|
||||
* @retval negative error number if fail
|
||||
*/
|
||||
|
||||
static inline int pca9450_update_bits(struct pca9450 *pca9450, u8 reg,
|
||||
u8 mask, u8 val)
|
||||
{
|
||||
return regmap_update_bits(pca9450->regmap, reg, mask, val);
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief pca9450 platform data type
|
||||
*/
|
||||
struct pca9450_gpo_plat_data {
|
||||
u32 drv;
|
||||
int gpio_base;
|
||||
};
|
||||
|
||||
u8 ext_pca9450_reg_read8(u8 reg);
|
||||
int ext_pca9450_reg_write8(int reg, u8 val);
|
||||
#endif /* __LINUX_MFD_PCA9450_H */
|
||||
Loading…
Reference in New Issue