staging: sm750fb: change definition of SYSTEM_CTRL multi-bit fields
Use more straight-forward definitions for multi-bit fields of SYSTEM_CTRL register and replace FIELD_GET/SET for these fields with open-coded implementation. Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -12,7 +12,7 @@ void ddk750_setDPMS(DPMS_t state)
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DPMS, state));
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DPMS, state));
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} else {
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} else {
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value = PEEK32(SYSTEM_CTRL);
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value = PEEK32(SYSTEM_CTRL);
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value = FIELD_VALUE(value, SYSTEM_CTRL, DPMS, state);
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value = (value & ~SYSTEM_CTRL_DPMS_MASK) | state;
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POKE32(SYSTEM_CTRL, value);
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POKE32(SYSTEM_CTRL, value);
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}
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}
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}
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}
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@ -11,11 +11,11 @@
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#define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1)
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#define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1)
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#define SYSTEM_CTRL 0x000000
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#define SYSTEM_CTRL 0x000000
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#define SYSTEM_CTRL_DPMS 31:30
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#define SYSTEM_CTRL_DPMS_MASK (0x3 << 30)
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#define SYSTEM_CTRL_DPMS_VPHP 0
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#define SYSTEM_CTRL_DPMS_VPHP (0x0 << 30)
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#define SYSTEM_CTRL_DPMS_VPHN 1
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#define SYSTEM_CTRL_DPMS_VPHN (0x1 << 30)
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#define SYSTEM_CTRL_DPMS_VNHP 2
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#define SYSTEM_CTRL_DPMS_VNHP (0x2 << 30)
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#define SYSTEM_CTRL_DPMS_VNHN 3
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#define SYSTEM_CTRL_DPMS_VNHN (0x3 << 30)
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#define SYSTEM_CTRL_PCI_BURST BIT(29)
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#define SYSTEM_CTRL_PCI_BURST BIT(29)
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#define SYSTEM_CTRL_PCI_MASTER BIT(25)
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#define SYSTEM_CTRL_PCI_MASTER BIT(25)
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#define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24)
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#define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24)
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@ -31,11 +31,11 @@
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#define SYSTEM_CTRL_DE_ABORT BIT(13)
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#define SYSTEM_CTRL_DE_ABORT BIT(13)
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#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK BIT(11)
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#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK BIT(11)
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#define SYSTEM_CTRL_PCI_RETRY_OFF BIT(7)
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#define SYSTEM_CTRL_PCI_RETRY_OFF BIT(7)
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE 5:4
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK (0x3 << 4)
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1 0
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1 (0x0 << 4)
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2 1
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2 (0x1 << 4)
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4 2
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4 (0x2 << 4)
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8 3
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#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8 (0x3 << 4)
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#define SYSTEM_CTRL_CRT_TRISTATE BIT(3)
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#define SYSTEM_CTRL_CRT_TRISTATE BIT(3)
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#define SYSTEM_CTRL_PCIMEM_TRISTATE BIT(2)
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#define SYSTEM_CTRL_PCIMEM_TRISTATE BIT(2)
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#define SYSTEM_CTRL_LOCALMEM_TRISTATE BIT(1)
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#define SYSTEM_CTRL_LOCALMEM_TRISTATE BIT(1)
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@ -112,6 +112,7 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev)
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}
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}
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if (getChipType() != SM750LE) {
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if (getChipType() != SM750LE) {
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unsigned int val;
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/* does user need CRT ?*/
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/* does user need CRT ?*/
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if (sm750_dev->nocrt) {
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if (sm750_dev->nocrt) {
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POKE32(MISC_CTRL,
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POKE32(MISC_CTRL,
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@ -119,20 +120,18 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev)
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MISC_CTRL,
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MISC_CTRL,
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DAC_POWER, OFF));
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DAC_POWER, OFF));
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/* shut off dpms */
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/* shut off dpms */
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POKE32(SYSTEM_CTRL,
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val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
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FIELD_SET(PEEK32(SYSTEM_CTRL),
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val |= SYSTEM_CTRL_DPMS_VPHN;
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SYSTEM_CTRL,
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POKE32(SYSTEM_CTRL, val);
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DPMS, VNHN));
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} else {
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} else {
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POKE32(MISC_CTRL,
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POKE32(MISC_CTRL,
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FIELD_SET(PEEK32(MISC_CTRL),
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FIELD_SET(PEEK32(MISC_CTRL),
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MISC_CTRL,
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MISC_CTRL,
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DAC_POWER, ON));
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DAC_POWER, ON));
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/* turn on dpms */
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/* turn on dpms */
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POKE32(SYSTEM_CTRL,
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val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
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FIELD_SET(PEEK32(SYSTEM_CTRL),
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val |= SYSTEM_CTRL_DPMS_VPHP;
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SYSTEM_CTRL,
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POKE32(SYSTEM_CTRL, val);
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DPMS, VPHP));
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}
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}
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switch (sm750_dev->pnltype) {
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switch (sm750_dev->pnltype) {
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@ -448,8 +447,9 @@ int hw_sm750_setBLANK(struct lynxfb_output *output, int blank)
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}
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}
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if (output->paths & sm750_crt) {
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if (output->paths & sm750_crt) {
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unsigned int val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
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POKE32(SYSTEM_CTRL, FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms));
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POKE32(SYSTEM_CTRL, val | dpms);
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
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}
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}
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