ASoC: Use explicit sequence for WM8903 bias off
This makes no real difference compared to the write sequencer sequence that was previously used but can run without a clock being provided. Also remove the write sequencer support code as this was the last use of it. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
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@ -229,8 +229,6 @@ struct wm8903_priv {
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/* Reference count */
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int class_w_users;
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struct completion wseq;
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struct snd_soc_jack *mic_jack;
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int mic_det;
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int mic_short;
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@ -262,41 +260,6 @@ static int wm8903_volatile_register(struct snd_soc_codec *codec, unsigned int re
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}
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}
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static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start)
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{
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u16 reg[5];
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struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
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BUG_ON(start > 48);
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/* Enable the sequencer if it's not already on */
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reg[0] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_0);
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snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0,
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reg[0] | WM8903_WSEQ_ENA);
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dev_dbg(codec->dev, "Starting sequence at %d\n", start);
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snd_soc_write(codec, WM8903_WRITE_SEQUENCER_3,
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start | WM8903_WSEQ_START);
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/* Wait for it to complete. If we have the interrupt wired up then
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* that will break us out of the poll early.
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*/
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do {
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wait_for_completion_timeout(&wm8903->wseq,
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msecs_to_jiffies(10));
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reg[4] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_4);
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} while (reg[4] & WM8903_WSEQ_BUSY);
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dev_dbg(codec->dev, "Sequence complete\n");
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/* Disable the sequencer again if we enabled it */
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snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, reg[0]);
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return 0;
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}
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static void wm8903_reset(struct snd_soc_codec *codec)
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{
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snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0);
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@ -1213,11 +1176,26 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec,
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break;
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case SND_SOC_BIAS_OFF:
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snd_soc_update_bits(codec, WM8903_CLOCK_RATES_2,
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WM8903_CLK_SYS_ENA, WM8903_CLK_SYS_ENA);
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wm8903_run_sequence(codec, 32);
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snd_soc_update_bits(codec, WM8903_CLOCK_RATES_2,
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WM8903_CLK_SYS_ENA, 0);
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snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
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WM8903_BIAS_ENA, 0);
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snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
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WM8903_VMID_SOFT_MASK,
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2 << WM8903_VMID_SOFT_SHIFT);
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snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
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WM8903_VMID_BUF_ENA, 0);
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msleep(290);
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snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
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WM8903_VMID_TIE_ENA | WM8903_BUFIO_ENA |
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WM8903_VMID_IO_ENA | WM8903_VMID_RES_MASK |
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WM8903_VMID_SOFT_MASK |
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WM8903_VMID_BUF_ENA, 0);
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snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
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WM8903_STARTUP_BIAS_ENA, 0);
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break;
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}
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@ -1670,8 +1648,7 @@ static irqreturn_t wm8903_irq(int irq, void *data)
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int_val = snd_soc_read(codec, WM8903_INTERRUPT_STATUS_1) & mask;
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if (int_val & WM8903_WSEQ_BUSY_EINT) {
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dev_dbg(codec->dev, "Write sequencer done\n");
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complete(&wm8903->wseq);
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dev_warn(codec->dev, "Write sequencer done\n");
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}
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/*
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@ -1918,7 +1895,6 @@ static int wm8903_probe(struct snd_soc_codec *codec)
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u16 val;
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wm8903->codec = codec;
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init_completion(&wm8903->wseq);
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ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
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if (ret != 0) {
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