ath9k: turn off RXIQ calibration while re-calibrating radio
TXIQ and RXIQ share the same data path to upload the measurement result, we should turn off RXIQ calibration while re-calibrating radio Signed-off-by: Bala Shanmugam <bkamatch@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -750,6 +750,9 @@ int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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mci_hw->bt_state = MCI_BT_AWAKE;
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REG_CLR_BIT(ah, AR_PHY_TIMING4,
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1 << AR_PHY_TIMING_CONTROL4_DO_GAIN_DC_IQ_CAL_SHIFT);
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if (caldata) {
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caldata->done_txiqcal_once = false;
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caldata->done_txclcal_once = false;
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@ -759,6 +762,9 @@ int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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if (!ath9k_hw_init_cal(ah, chan))
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return -EIO;
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REG_SET_BIT(ah, AR_PHY_TIMING4,
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1 << AR_PHY_TIMING_CONTROL4_DO_GAIN_DC_IQ_CAL_SHIFT);
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exit:
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ar9003_mci_enable_interrupt(ah);
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return 0;
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@ -32,6 +32,7 @@
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#define AR_PHY_SPUR_REG (AR_CHAN_BASE + 0x1c)
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#define AR_PHY_RX_IQCAL_CORR_B0 (AR_CHAN_BASE + 0xdc)
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#define AR_PHY_TX_IQCAL_CONTROL_3 (AR_CHAN_BASE + 0xb0)
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#define AR_PHY_TIMING_CONTROL4_DO_GAIN_DC_IQ_CAL_SHIFT 16
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#define AR_PHY_TIMING11_SPUR_FREQ_SD 0x3FF00000
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#define AR_PHY_TIMING11_SPUR_FREQ_SD_S 20
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