Devicetree fixes for 5.3:
Fix several warnings/errors in validation of binding schemas. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAl0zzmkQHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhw0YYD/9Uq8Oj9WG9NP8QeJt1qZIVIu4GMRqCiijM ApXu9RAsQvaakwRiqaOufFSACIP/yjxHadbncObMWq7uGLT2TVxZwhR8XeOoi+Ft UO/2KosTbTpMeAjFB1Dz/f0IbUa4Ro5ZiP5kohGNi5X/IdsCAC0ypFk3cCIx4Siz /gr+cN+ef9p6cOy+vGzEGRMSDULbun/9cZmctDpMf9ZFUMu8xA/nn6qTEck3mQ2j OX465qPGrstZKlO3C2NVSyUip8/NLhTrUeDCCNTFw6fOIxRCjQfIj0MNMnm+pjO3 /xPDQV0Swv+LjT+HSJA8TyEXKQP28N+v9K9bP4e59PPAf2raGX1khwvMM5bJuy// 2K8mDmAJrP5wy/9aFq8bPdzWQZzfPefDW1PCBNtZybo6OlppDu+4uX7FonjRI/nj 7AzS3qch4v4i1sJmADgysn9yOUgzUvJf/SLD1f5XHsiEa0RXr51QWVxvJaRs24wS U/vzyZq6vqtTBSOzXpjIK0Yj+D7f05qT0MsPK5lbynCdByLli3xhbte8AwGg57RW 4CtPTZLdPVvIlCZ3jNOZXq9OizRSBokaj155YvSKQ9nzcnbHfEF4JctJQ+K3tdwS 6s4FVrgNxtXN9KidfBCnWDj+1eS1ZxeCmKo1Ypxhj9/t80NXt7b7dwEJ8H91/YuU GfLancHPHQ== =IkH4 -----END PGP SIGNATURE----- Merge tag 'devicetree-fixes-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree fixes from Rob Herring: "Fix several warnings/errors in validation of binding schemas" * tag 'devicetree-fixes-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: pinctrl: stm32: Fix missing 'clocks' property in examples dt-bindings: iio: ad7124: Fix dtc warnings in example dt-bindings: iio: avia-hx711: Fix avdd-supply typo in example dt-bindings: pinctrl: aspeed: Fix AST2500 example errors dt-bindings: pinctrl: aspeed: Fix 'compatible' schema errors dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodes dt-bindings: Ensure child nodes are of type 'object'alistair/sunxi64-5.4-dsi
commit
c7bf0a0f37
|
@ -42,6 +42,7 @@ properties:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^.*@[0-9a-fA-F]+$":
|
"^.*@[0-9a-fA-F]+$":
|
||||||
|
type: object
|
||||||
properties:
|
properties:
|
||||||
reg:
|
reg:
|
||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
|
|
@ -114,42 +114,47 @@ patternProperties:
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
adc@0 {
|
spi {
|
||||||
compatible = "adi,ad7124-4";
|
|
||||||
reg = <0>;
|
|
||||||
spi-max-frequency = <5000000>;
|
|
||||||
interrupts = <25 2>;
|
|
||||||
interrupt-parent = <&gpio>;
|
|
||||||
refin1-supply = <&adc_vref>;
|
|
||||||
clocks = <&ad7124_mclk>;
|
|
||||||
clock-names = "mclk";
|
|
||||||
|
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
channel@0 {
|
adc@0 {
|
||||||
|
compatible = "adi,ad7124-4";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
diff-channels = <0 1>;
|
spi-max-frequency = <5000000>;
|
||||||
adi,reference-select = <0>;
|
interrupts = <25 2>;
|
||||||
adi,buffered-positive;
|
interrupt-parent = <&gpio>;
|
||||||
};
|
refin1-supply = <&adc_vref>;
|
||||||
|
clocks = <&ad7124_mclk>;
|
||||||
|
clock-names = "mclk";
|
||||||
|
|
||||||
channel@1 {
|
#address-cells = <1>;
|
||||||
reg = <1>;
|
#size-cells = <0>;
|
||||||
bipolar;
|
|
||||||
diff-channels = <2 3>;
|
|
||||||
adi,reference-select = <0>;
|
|
||||||
adi,buffered-positive;
|
|
||||||
adi,buffered-negative;
|
|
||||||
};
|
|
||||||
|
|
||||||
channel@2 {
|
channel@0 {
|
||||||
reg = <2>;
|
reg = <0>;
|
||||||
diff-channels = <4 5>;
|
diff-channels = <0 1>;
|
||||||
};
|
adi,reference-select = <0>;
|
||||||
|
adi,buffered-positive;
|
||||||
|
};
|
||||||
|
|
||||||
channel@3 {
|
channel@1 {
|
||||||
reg = <3>;
|
reg = <1>;
|
||||||
diff-channels = <6 7>;
|
bipolar;
|
||||||
|
diff-channels = <2 3>;
|
||||||
|
adi,reference-select = <0>;
|
||||||
|
adi,buffered-positive;
|
||||||
|
adi,buffered-negative;
|
||||||
|
};
|
||||||
|
|
||||||
|
channel@2 {
|
||||||
|
reg = <2>;
|
||||||
|
diff-channels = <4 5>;
|
||||||
|
};
|
||||||
|
|
||||||
|
channel@3 {
|
||||||
|
reg = <3>;
|
||||||
|
diff-channels = <6 7>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -61,6 +61,6 @@ examples:
|
||||||
compatible = "avia,hx711";
|
compatible = "avia,hx711";
|
||||||
sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
|
sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
|
||||||
dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
|
dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
|
||||||
avdd-suppy = <&avdd>;
|
avdd-supply = <&avdd>;
|
||||||
clock-frequency = <100000>;
|
clock-frequency = <100000>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -55,6 +55,7 @@ patternProperties:
|
||||||
"^pinctrl-[0-9]+$": true
|
"^pinctrl-[0-9]+$": true
|
||||||
|
|
||||||
"^nand@[a-f0-9]+$":
|
"^nand@[a-f0-9]+$":
|
||||||
|
type: object
|
||||||
properties:
|
properties:
|
||||||
reg:
|
reg:
|
||||||
minimum: 0
|
minimum: 0
|
||||||
|
|
|
@ -40,6 +40,7 @@ properties:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^nand@[a-f0-9]$":
|
"^nand@[a-f0-9]$":
|
||||||
|
type: object
|
||||||
properties:
|
properties:
|
||||||
reg:
|
reg:
|
||||||
description:
|
description:
|
||||||
|
|
|
@ -22,7 +22,9 @@ description: |+
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
compatible:
|
compatible:
|
||||||
enum: [ aspeed,ast2400-pinctrl, aspeed,g4-pinctrl ]
|
enum:
|
||||||
|
- aspeed,ast2400-pinctrl
|
||||||
|
- aspeed,g4-pinctrl
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
'^.*$':
|
'^.*$':
|
||||||
|
|
|
@ -22,7 +22,9 @@ description: |+
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
compatible:
|
compatible:
|
||||||
enum: [ aspeed,ast2500-pinctrl, aspeed,g5-pinctrl ]
|
enum:
|
||||||
|
- aspeed,ast2500-pinctrl
|
||||||
|
- aspeed,g5-pinctrl
|
||||||
aspeed,external-nodes:
|
aspeed,external-nodes:
|
||||||
minItems: 2
|
minItems: 2
|
||||||
maxItems: 2
|
maxItems: 2
|
||||||
|
@ -74,9 +76,6 @@ required:
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
compatible = "simple-bus";
|
|
||||||
ranges;
|
|
||||||
|
|
||||||
apb {
|
apb {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -89,7 +88,7 @@ examples:
|
||||||
|
|
||||||
pinctrl: pinctrl {
|
pinctrl: pinctrl {
|
||||||
compatible = "aspeed,g5-pinctrl";
|
compatible = "aspeed,g5-pinctrl";
|
||||||
aspeed,external-nodes = <&gfx &lhc>;
|
aspeed,external-nodes = <&gfx>, <&lhc>;
|
||||||
|
|
||||||
pinctrl_i2c3_default: i2c3_default {
|
pinctrl_i2c3_default: i2c3_default {
|
||||||
function = "I2C3";
|
function = "I2C3";
|
||||||
|
|
|
@ -55,6 +55,7 @@ properties:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
'^gpio@[0-9a-f]*$':
|
'^gpio@[0-9a-f]*$':
|
||||||
|
type: object
|
||||||
properties:
|
properties:
|
||||||
gpio-controller: true
|
gpio-controller: true
|
||||||
'#gpio-cells':
|
'#gpio-cells':
|
||||||
|
@ -113,8 +114,10 @@ patternProperties:
|
||||||
- st,bank-name
|
- st,bank-name
|
||||||
|
|
||||||
'-[0-9]*$':
|
'-[0-9]*$':
|
||||||
|
type: object
|
||||||
patternProperties:
|
patternProperties:
|
||||||
'^pins':
|
'^pins':
|
||||||
|
type: object
|
||||||
description: |
|
description: |
|
||||||
A pinctrl node should contain at least one subnode representing the
|
A pinctrl node should contain at least one subnode representing the
|
||||||
pinctrl group available on the machine. Each subnode will list the
|
pinctrl group available on the machine. Each subnode will list the
|
||||||
|
@ -194,6 +197,7 @@ required:
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
|
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
|
||||||
|
#include <dt-bindings/mfd/stm32f4-rcc.h>
|
||||||
//Example 1
|
//Example 1
|
||||||
pinctrl@40020000 {
|
pinctrl@40020000 {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -207,6 +211,7 @@ examples:
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
reg = <0x0 0x400>;
|
reg = <0x0 0x400>;
|
||||||
resets = <&reset_ahb1 0>;
|
resets = <&reset_ahb1 0>;
|
||||||
|
clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
|
||||||
st,bank-name = "GPIOA";
|
st,bank-name = "GPIOA";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -224,6 +229,7 @@ examples:
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
reg = <0x1000 0x400>;
|
reg = <0x1000 0x400>;
|
||||||
resets = <&reset_ahb1 0>;
|
resets = <&reset_ahb1 0>;
|
||||||
|
clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;
|
||||||
st,bank-name = "GPIOB";
|
st,bank-name = "GPIOB";
|
||||||
gpio-ranges = <&pinctrl 0 0 16>;
|
gpio-ranges = <&pinctrl 0 0 16>;
|
||||||
};
|
};
|
||||||
|
@ -233,6 +239,7 @@ examples:
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
reg = <0x2000 0x400>;
|
reg = <0x2000 0x400>;
|
||||||
resets = <&reset_ahb1 0>;
|
resets = <&reset_ahb1 0>;
|
||||||
|
clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;
|
||||||
st,bank-name = "GPIOC";
|
st,bank-name = "GPIOC";
|
||||||
ngpios = <5>;
|
ngpios = <5>;
|
||||||
gpio-ranges = <&pinctrl 0 16 3>,
|
gpio-ranges = <&pinctrl 0 16 3>,
|
||||||
|
|
|
@ -10,97 +10,76 @@ maintainers:
|
||||||
- Paul Walmsley <paul.walmsley@sifive.com>
|
- Paul Walmsley <paul.walmsley@sifive.com>
|
||||||
- Palmer Dabbelt <palmer@sifive.com>
|
- Palmer Dabbelt <palmer@sifive.com>
|
||||||
|
|
||||||
allOf:
|
|
||||||
- $ref: /schemas/cpus.yaml#
|
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
$nodename:
|
compatible:
|
||||||
const: cpus
|
items:
|
||||||
description: Container of cpu nodes
|
- enum:
|
||||||
|
- sifive,rocket0
|
||||||
|
- sifive,e5
|
||||||
|
- sifive,e51
|
||||||
|
- sifive,u54-mc
|
||||||
|
- sifive,u54
|
||||||
|
- sifive,u5
|
||||||
|
- const: riscv
|
||||||
|
description:
|
||||||
|
Identifies that the hart uses the RISC-V instruction set
|
||||||
|
and identifies the type of the hart.
|
||||||
|
|
||||||
'#address-cells':
|
mmu-type:
|
||||||
const: 1
|
allOf:
|
||||||
description: |
|
- $ref: "/schemas/types.yaml#/definitions/string"
|
||||||
A single unsigned 32-bit integer uniquely identifies each RISC-V
|
- enum:
|
||||||
hart in a system. (See the "reg" node under the "cpu" node,
|
- riscv,sv32
|
||||||
below).
|
- riscv,sv39
|
||||||
|
- riscv,sv48
|
||||||
|
description:
|
||||||
|
Identifies the MMU address translation mode used on this
|
||||||
|
hart. These values originate from the RISC-V Privileged
|
||||||
|
Specification document, available from
|
||||||
|
https://riscv.org/specifications/
|
||||||
|
|
||||||
'#size-cells':
|
riscv,isa:
|
||||||
const: 0
|
allOf:
|
||||||
|
- $ref: "/schemas/types.yaml#/definitions/string"
|
||||||
|
- enum:
|
||||||
|
- rv64imac
|
||||||
|
- rv64imafdc
|
||||||
|
description:
|
||||||
|
Identifies the specific RISC-V instruction set architecture
|
||||||
|
supported by the hart. These are documented in the RISC-V
|
||||||
|
User-Level ISA document, available from
|
||||||
|
https://riscv.org/specifications/
|
||||||
|
|
||||||
|
timebase-frequency:
|
||||||
|
type: integer
|
||||||
|
minimum: 1
|
||||||
|
description:
|
||||||
|
Specifies the clock frequency of the system timer in Hz.
|
||||||
|
This value is common to all harts on a single system image.
|
||||||
|
|
||||||
|
interrupt-controller:
|
||||||
|
type: object
|
||||||
|
description: Describes the CPU's local interrupt controller
|
||||||
|
|
||||||
patternProperties:
|
|
||||||
'^cpu@[0-9a-f]+$':
|
|
||||||
properties:
|
properties:
|
||||||
|
'#interrupt-cells':
|
||||||
|
const: 1
|
||||||
|
|
||||||
compatible:
|
compatible:
|
||||||
type: array
|
const: riscv,cpu-intc
|
||||||
items:
|
|
||||||
- enum:
|
|
||||||
- sifive,rocket0
|
|
||||||
- sifive,e5
|
|
||||||
- sifive,e51
|
|
||||||
- sifive,u54-mc
|
|
||||||
- sifive,u54
|
|
||||||
- sifive,u5
|
|
||||||
- const: riscv
|
|
||||||
description:
|
|
||||||
Identifies that the hart uses the RISC-V instruction set
|
|
||||||
and identifies the type of the hart.
|
|
||||||
|
|
||||||
mmu-type:
|
interrupt-controller: true
|
||||||
allOf:
|
|
||||||
- $ref: "/schemas/types.yaml#/definitions/string"
|
|
||||||
- enum:
|
|
||||||
- riscv,sv32
|
|
||||||
- riscv,sv39
|
|
||||||
- riscv,sv48
|
|
||||||
description:
|
|
||||||
Identifies the MMU address translation mode used on this
|
|
||||||
hart. These values originate from the RISC-V Privileged
|
|
||||||
Specification document, available from
|
|
||||||
https://riscv.org/specifications/
|
|
||||||
|
|
||||||
riscv,isa:
|
|
||||||
allOf:
|
|
||||||
- $ref: "/schemas/types.yaml#/definitions/string"
|
|
||||||
- enum:
|
|
||||||
- rv64imac
|
|
||||||
- rv64imafdc
|
|
||||||
description:
|
|
||||||
Identifies the specific RISC-V instruction set architecture
|
|
||||||
supported by the hart. These are documented in the RISC-V
|
|
||||||
User-Level ISA document, available from
|
|
||||||
https://riscv.org/specifications/
|
|
||||||
|
|
||||||
timebase-frequency:
|
|
||||||
type: integer
|
|
||||||
minimum: 1
|
|
||||||
description:
|
|
||||||
Specifies the clock frequency of the system timer in Hz.
|
|
||||||
This value is common to all harts on a single system image.
|
|
||||||
|
|
||||||
interrupt-controller:
|
|
||||||
type: object
|
|
||||||
description: Describes the CPU's local interrupt controller
|
|
||||||
|
|
||||||
properties:
|
|
||||||
'#interrupt-cells':
|
|
||||||
const: 1
|
|
||||||
|
|
||||||
compatible:
|
|
||||||
const: riscv,cpu-intc
|
|
||||||
|
|
||||||
interrupt-controller: true
|
|
||||||
|
|
||||||
required:
|
|
||||||
- '#interrupt-cells'
|
|
||||||
- compatible
|
|
||||||
- interrupt-controller
|
|
||||||
|
|
||||||
required:
|
required:
|
||||||
- riscv,isa
|
- '#interrupt-cells'
|
||||||
- timebase-frequency
|
- compatible
|
||||||
- interrupt-controller
|
- interrupt-controller
|
||||||
|
|
||||||
|
required:
|
||||||
|
- riscv,isa
|
||||||
|
- timebase-frequency
|
||||||
|
- interrupt-controller
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
// Example 1: SiFive Freedom U540G Development Kit
|
// Example 1: SiFive Freedom U540G Development Kit
|
||||||
|
|
|
@ -50,6 +50,7 @@ properties:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^.*@[0-9a-f]+":
|
"^.*@[0-9a-f]+":
|
||||||
|
type: object
|
||||||
properties:
|
properties:
|
||||||
reg:
|
reg:
|
||||||
items:
|
items:
|
||||||
|
|
|
@ -55,6 +55,7 @@ properties:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^.*@[0-9a-f]+":
|
"^.*@[0-9a-f]+":
|
||||||
|
type: object
|
||||||
properties:
|
properties:
|
||||||
reg:
|
reg:
|
||||||
items:
|
items:
|
||||||
|
|
Loading…
Reference in New Issue