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ARM: dts: r7s72100: Correct RTC interrupt types

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According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the realtime clock interrupts are level not
edge interrupts.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2018-05-07 15:24:49 +02:00 committed by Simon Horman
parent c02cc235a2
commit cad8e5a7a1
1 changed files with 3 additions and 3 deletions
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6
arch/arm/boot/dts/r7s72100.dtsi
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@ -682,9 +682,9 @@
rtc: rtc@fcff1000 { rtc: rtc@fcff1000 {
compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc"; compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
reg = <0xfcff1000 0x2e>; reg = <0xfcff1000 0x2e>;
interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 277 IRQ_TYPE_EDGE_RISING <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 278 IRQ_TYPE_EDGE_RISING>; <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "alarm", "period", "carry"; interrupt-names = "alarm", "period", "carry";
clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>, clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
<&rtc_x3_clk>, <&extal_clk>; <&rtc_x3_clk>, <&extal_clk>;