m68knommu: make cache push code ColdFire generic
Currently the code to push cache lines is only available to version 4 cores. Version 3 cores may also need to use this if we support copy- back caches on them. Move this code to make it more generic, and useful for all version ColdFire cores. With this in place we can now have a single cache_flush_all() code path that does all the right things on all version cores. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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@ -30,9 +30,13 @@
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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#ifndef __flush_cache_all
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void mcf_cache_push(void);
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static inline void __flush_cache_all(void)
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{
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#ifdef CACHE_PUSH
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mcf_cache_push();
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#endif
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#ifdef CACHE_INVALIDATE
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__asm__ __volatile__ (
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"movel %0, %%d0\n\t"
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@ -41,6 +45,5 @@ static inline void __flush_cache_all(void)
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: : "i" (CACHE_INVALIDATE) : "d0" );
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#endif
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}
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#endif /* __flush_cache_all */
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#endif /* _M68KNOMMU_CACHEFLUSH_H */
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@ -83,46 +83,12 @@
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#define ACR2_MODE (0x000f0000+INSN_CACHE_MODE)
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#define ACR3_MODE 0
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#ifndef __ASSEMBLY__
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#if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_WT)
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#define flush_dcache_range(a, l) do { asm("nop"); } while (0)
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#endif
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static inline void __m54xx_flush_cache_all(void)
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{
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__asm__ __volatile__ (
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#if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP)
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/*
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* Use cpushl to push and invalidate all cache lines.
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* Gas doesn't seem to know how to generate the ColdFire
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* cpushl instruction... Oh well, bit stuff it for now.
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*/
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"clrl %%d0\n\t"
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"1:\n\t"
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"movel %%d0,%%a0\n\t"
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"2:\n\t"
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".word 0xf468\n\t"
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"addl %0,%%a0\n\t"
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"cmpl %1,%%a0\n\t"
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"blt 2b\n\t"
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"addql #1,%%d0\n\t"
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"cmpil %2,%%d0\n\t"
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"bne 1b\n\t"
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/* Copyback cache mode must push dirty cache lines first */
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#define CACHE_PUSH
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#endif
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"movel %3,%%d0\n\t"
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"movec %%d0,%%CACR\n\t"
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"nop\n\t" /* forces flush of Store Buffer */
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: /* No output */
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: "i" (CACHE_LINE_SIZE),
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"i" (DCACHE_SIZE / CACHE_WAYS),
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"i" (CACHE_WAYS),
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"i" (CACHE_INVALIDATE)
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: "d0", "a0" );
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}
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#define __flush_cache_all() __m54xx_flush_cache_all()
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#endif /* __ASSEMBLY__ */
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#endif /* m54xxacr_h */
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@ -14,7 +14,7 @@
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asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
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obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o
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obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o
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obj-$(CONFIG_M5206) += timers.o intc.o
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obj-$(CONFIG_M5206e) += timers.o intc.o
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obj-$(CONFIG_M520x) += pit.o intc-simr.o
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48
arch/m68knommu/platform/coldfire/cache.c
Normal file
48
arch/m68knommu/platform/coldfire/cache.c
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@ -0,0 +1,48 @@
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/***************************************************************************/
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/*
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* cache.c -- general ColdFire Cache maintainence code
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*
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* Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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/***************************************************************************/
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#ifdef CACHE_PUSH
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/***************************************************************************/
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/*
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* Use cpushl to push all dirty cache lines back to memory.
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* Older versions of GAS don't seem to know how to generate the
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* ColdFire cpushl instruction... Oh well, bit stuff it for now.
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*/
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void mcf_cache_push(void)
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{
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__asm__ __volatile__ (
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"clrl %%d0\n\t"
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"1:\n\t"
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"movel %%d0,%%a0\n\t"
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"2:\n\t"
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".word 0xf468\n\t"
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"addl %0,%%a0\n\t"
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"cmpl %1,%%a0\n\t"
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"blt 2b\n\t"
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"addql #1,%%d0\n\t"
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"cmpil %2,%%d0\n\t"
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"bne 1b\n\t"
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: /* No output */
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: "i" (CACHE_LINE_SIZE),
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"i" (DCACHE_SIZE / CACHE_WAYS),
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"i" (CACHE_WAYS)
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: "d0", "a0" );
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}
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/***************************************************************************/
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#endif /* CACHE_PUSH */
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/***************************************************************************/
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