Merge branch 'linus' into irq/core
Reason: Get upstream fixes integrated before further modifications. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
commit
df8d291f28
|
@ -7,9 +7,9 @@ Each LED is represented as a sub-node of the gpio-leds device. Each
|
||||||
node's name represents the name of the corresponding LED.
|
node's name represents the name of the corresponding LED.
|
||||||
|
|
||||||
LED sub-node properties:
|
LED sub-node properties:
|
||||||
- gpios : Should specify the LED's GPIO, see "Specifying GPIO information
|
- gpios : Should specify the LED's GPIO, see "gpios property" in
|
||||||
for devices" in Documentation/devicetree/booting-without-of.txt. Active
|
Documentation/devicetree/gpio.txt. Active low LEDs should be
|
||||||
low LEDs should be indicated using flags in the GPIO specifier.
|
indicated using flags in the GPIO specifier.
|
||||||
- label : (optional) The label for this LED. If omitted, the label is
|
- label : (optional) The label for this LED. If omitted, the label is
|
||||||
taken from the node name (excluding the unit address).
|
taken from the node name (excluding the unit address).
|
||||||
- linux,default-trigger : (optional) This parameter, if present, is a
|
- linux,default-trigger : (optional) This parameter, if present, is a
|
||||||
|
|
|
@ -30,6 +30,7 @@ national National Semiconductor
|
||||||
nintendo Nintendo
|
nintendo Nintendo
|
||||||
nvidia NVIDIA
|
nvidia NVIDIA
|
||||||
nxp NXP Semiconductors
|
nxp NXP Semiconductors
|
||||||
|
picochip Picochip Ltd
|
||||||
powervr Imagination Technologies
|
powervr Imagination Technologies
|
||||||
qcom Qualcomm, Inc.
|
qcom Qualcomm, Inc.
|
||||||
ramtron Ramtron International
|
ramtron Ramtron International
|
||||||
|
|
|
@ -7,21 +7,29 @@ Supported chips:
|
||||||
Addresses scanned: I2C 0x18 - 0x1f
|
Addresses scanned: I2C 0x18 - 0x1f
|
||||||
Datasheets:
|
Datasheets:
|
||||||
http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
|
http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
|
||||||
* IDT TSE2002B3, TS3000B3
|
* Atmel AT30TS00
|
||||||
Prefix: 'tse2002b3', 'ts3000b3'
|
Prefix: 'at30ts00'
|
||||||
Addresses scanned: I2C 0x18 - 0x1f
|
Addresses scanned: I2C 0x18 - 0x1f
|
||||||
Datasheets:
|
Datasheets:
|
||||||
http://www.idt.com/products/getdoc.cfm?docid=18715691
|
http://www.atmel.com/Images/doc8585.pdf
|
||||||
http://www.idt.com/products/getdoc.cfm?docid=18715692
|
* IDT TSE2002B3, TSE2002GB2, TS3000B3, TS3000GB2
|
||||||
|
Prefix: 'tse2002', 'ts3000'
|
||||||
|
Addresses scanned: I2C 0x18 - 0x1f
|
||||||
|
Datasheets:
|
||||||
|
http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
|
||||||
|
http://www.idt.com/sites/default/files/documents/IDT_TSE2002GB2A1_DST_20111107_120303145914.pdf
|
||||||
|
http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
|
||||||
|
http://www.idt.com/sites/default/files/documents/IDT_TS3000GB2A1_DST_20111104_120303151012.pdf
|
||||||
* Maxim MAX6604
|
* Maxim MAX6604
|
||||||
Prefix: 'max6604'
|
Prefix: 'max6604'
|
||||||
Addresses scanned: I2C 0x18 - 0x1f
|
Addresses scanned: I2C 0x18 - 0x1f
|
||||||
Datasheets:
|
Datasheets:
|
||||||
http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
|
http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
|
||||||
* Microchip MCP9805, MCP98242, MCP98243, MCP9843
|
* Microchip MCP9804, MCP9805, MCP98242, MCP98243, MCP9843
|
||||||
Prefixes: 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
|
Prefixes: 'mcp9804', 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
|
||||||
Addresses scanned: I2C 0x18 - 0x1f
|
Addresses scanned: I2C 0x18 - 0x1f
|
||||||
Datasheets:
|
Datasheets:
|
||||||
|
http://ww1.microchip.com/downloads/en/DeviceDoc/22203C.pdf
|
||||||
http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
|
http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
|
||||||
http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
|
http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
|
||||||
http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
|
http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
|
||||||
|
@ -48,6 +56,12 @@ Supported chips:
|
||||||
Datasheets:
|
Datasheets:
|
||||||
http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf
|
http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf
|
||||||
http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf
|
http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf
|
||||||
|
* ST Microelectronics STTS2002, STTS3000
|
||||||
|
Prefix: 'stts2002', 'stts3000'
|
||||||
|
Addresses scanned: I2C 0x18 - 0x1f
|
||||||
|
Datasheets:
|
||||||
|
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00225278.pdf
|
||||||
|
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/CD00270920.pdf
|
||||||
* JEDEC JC 42.4 compliant temperature sensor chips
|
* JEDEC JC 42.4 compliant temperature sensor chips
|
||||||
Prefix: 'jc42'
|
Prefix: 'jc42'
|
||||||
Addresses scanned: I2C 0x18 - 0x1f
|
Addresses scanned: I2C 0x18 - 0x1f
|
||||||
|
|
|
@ -13,7 +13,8 @@ Detection
|
||||||
|
|
||||||
All ALPS touchpads should respond to the "E6 report" command sequence:
|
All ALPS touchpads should respond to the "E6 report" command sequence:
|
||||||
E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
|
E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
|
||||||
00-00-64.
|
00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
|
||||||
|
if some buttons are pressed.
|
||||||
|
|
||||||
If the E6 report is successful, the touchpad model is identified using the "E7
|
If the E6 report is successful, the touchpad model is identified using the "E7
|
||||||
report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
|
report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
|
||||||
|
|
|
@ -2211,6 +2211,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
|
|
||||||
default: off.
|
default: off.
|
||||||
|
|
||||||
|
printk.always_kmsg_dump=
|
||||||
|
Trigger kmsg_dump for cases other than kernel oops or
|
||||||
|
panics
|
||||||
|
Format: <bool> (1/Y/y=enable, 0/N/n=disable)
|
||||||
|
default: disabled
|
||||||
|
|
||||||
printk.time= Show timing data prefixed to each printk message line
|
printk.time= Show timing data prefixed to each printk message line
|
||||||
Format: <bool> (1/Y/y=enable, 0/N/n=disable)
|
Format: <bool> (1/Y/y=enable, 0/N/n=disable)
|
||||||
|
|
||||||
|
|
21
MAINTAINERS
21
MAINTAINERS
|
@ -269,7 +269,6 @@ S: Orphan
|
||||||
F: drivers/platform/x86/wmi.c
|
F: drivers/platform/x86/wmi.c
|
||||||
|
|
||||||
AD1889 ALSA SOUND DRIVER
|
AD1889 ALSA SOUND DRIVER
|
||||||
M: Kyle McMartin <kyle@mcmartin.ca>
|
|
||||||
M: Thibaut Varene <T-Bone@parisc-linux.org>
|
M: Thibaut Varene <T-Bone@parisc-linux.org>
|
||||||
W: http://wiki.parisc-linux.org/AD1889
|
W: http://wiki.parisc-linux.org/AD1889
|
||||||
L: linux-parisc@vger.kernel.org
|
L: linux-parisc@vger.kernel.org
|
||||||
|
@ -963,7 +962,7 @@ F: drivers/tty/serial/msm_serial.c
|
||||||
F: drivers/platform/msm/
|
F: drivers/platform/msm/
|
||||||
F: drivers/*/pm8???-*
|
F: drivers/*/pm8???-*
|
||||||
F: include/linux/mfd/pm8xxx/
|
F: include/linux/mfd/pm8xxx/
|
||||||
T: git git://codeaurora.org/quic/kernel/davidb/linux-msm.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
||||||
ARM/TOSA MACHINE SUPPORT
|
ARM/TOSA MACHINE SUPPORT
|
||||||
|
@ -1311,7 +1310,7 @@ F: drivers/atm/
|
||||||
F: include/linux/atm*
|
F: include/linux/atm*
|
||||||
|
|
||||||
ATMEL AT91 MCI DRIVER
|
ATMEL AT91 MCI DRIVER
|
||||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
W: http://www.atmel.com/products/AT91/
|
W: http://www.atmel.com/products/AT91/
|
||||||
W: http://www.at91.com/
|
W: http://www.at91.com/
|
||||||
|
@ -1319,7 +1318,7 @@ S: Maintained
|
||||||
F: drivers/mmc/host/at91_mci.c
|
F: drivers/mmc/host/at91_mci.c
|
||||||
|
|
||||||
ATMEL AT91 / AT32 MCI DRIVER
|
ATMEL AT91 / AT32 MCI DRIVER
|
||||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/mmc/host/atmel-mci.c
|
F: drivers/mmc/host/atmel-mci.c
|
||||||
F: drivers/mmc/host/atmel-mci-regs.h
|
F: drivers/mmc/host/atmel-mci-regs.h
|
||||||
|
@ -3047,7 +3046,6 @@ F: drivers/hwspinlock/hwspinlock_*
|
||||||
F: include/linux/hwspinlock.h
|
F: include/linux/hwspinlock.h
|
||||||
|
|
||||||
HARMONY SOUND DRIVER
|
HARMONY SOUND DRIVER
|
||||||
M: Kyle McMartin <kyle@mcmartin.ca>
|
|
||||||
L: linux-parisc@vger.kernel.org
|
L: linux-parisc@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: sound/parisc/harmony.*
|
F: sound/parisc/harmony.*
|
||||||
|
@ -3782,7 +3780,7 @@ F: Documentation/kdump/
|
||||||
|
|
||||||
KERNEL AUTOMOUNTER v4 (AUTOFS4)
|
KERNEL AUTOMOUNTER v4 (AUTOFS4)
|
||||||
M: Ian Kent <raven@themaw.net>
|
M: Ian Kent <raven@themaw.net>
|
||||||
L: autofs@linux.kernel.org
|
L: autofs@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: fs/autofs4/
|
F: fs/autofs4/
|
||||||
|
|
||||||
|
@ -4687,7 +4685,7 @@ NTFS FILESYSTEM
|
||||||
M: Anton Altaparmakov <anton@tuxera.com>
|
M: Anton Altaparmakov <anton@tuxera.com>
|
||||||
L: linux-ntfs-dev@lists.sourceforge.net
|
L: linux-ntfs-dev@lists.sourceforge.net
|
||||||
W: http://www.tuxera.com/
|
W: http://www.tuxera.com/
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs-2.6.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs.git
|
||||||
S: Supported
|
S: Supported
|
||||||
F: Documentation/filesystems/ntfs.txt
|
F: Documentation/filesystems/ntfs.txt
|
||||||
F: fs/ntfs/
|
F: fs/ntfs/
|
||||||
|
@ -5000,9 +4998,8 @@ F: Documentation/blockdev/paride.txt
|
||||||
F: drivers/block/paride/
|
F: drivers/block/paride/
|
||||||
|
|
||||||
PARISC ARCHITECTURE
|
PARISC ARCHITECTURE
|
||||||
M: Kyle McMartin <kyle@mcmartin.ca>
|
|
||||||
M: Helge Deller <deller@gmx.de>
|
|
||||||
M: "James E.J. Bottomley" <jejb@parisc-linux.org>
|
M: "James E.J. Bottomley" <jejb@parisc-linux.org>
|
||||||
|
M: Helge Deller <deller@gmx.de>
|
||||||
L: linux-parisc@vger.kernel.org
|
L: linux-parisc@vger.kernel.org
|
||||||
W: http://www.parisc-linux.org/
|
W: http://www.parisc-linux.org/
|
||||||
Q: http://patchwork.kernel.org/project/linux-parisc/list/
|
Q: http://patchwork.kernel.org/project/linux-parisc/list/
|
||||||
|
@ -5861,7 +5858,7 @@ S: Maintained
|
||||||
F: drivers/mmc/host/sdhci-spear.c
|
F: drivers/mmc/host/sdhci-spear.c
|
||||||
|
|
||||||
SECURITY SUBSYSTEM
|
SECURITY SUBSYSTEM
|
||||||
M: James Morris <jmorris@namei.org>
|
M: James Morris <james.l.morris@oracle.com>
|
||||||
L: linux-security-module@vger.kernel.org (suggested Cc:)
|
L: linux-security-module@vger.kernel.org (suggested Cc:)
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
|
||||||
W: http://security.wiki.kernel.org/
|
W: http://security.wiki.kernel.org/
|
||||||
|
@ -5874,7 +5871,7 @@ S: Supported
|
||||||
|
|
||||||
SELINUX SECURITY MODULE
|
SELINUX SECURITY MODULE
|
||||||
M: Stephen Smalley <sds@tycho.nsa.gov>
|
M: Stephen Smalley <sds@tycho.nsa.gov>
|
||||||
M: James Morris <jmorris@namei.org>
|
M: James Morris <james.l.morris@oracle.com>
|
||||||
M: Eric Paris <eparis@parisplace.org>
|
M: Eric Paris <eparis@parisplace.org>
|
||||||
L: selinux@tycho.nsa.gov (subscribers-only, general discussion)
|
L: selinux@tycho.nsa.gov (subscribers-only, general discussion)
|
||||||
W: http://selinuxproject.org
|
W: http://selinuxproject.org
|
||||||
|
@ -7274,7 +7271,7 @@ WATCHDOG DEVICE DRIVERS
|
||||||
M: Wim Van Sebroeck <wim@iguana.be>
|
M: Wim Van Sebroeck <wim@iguana.be>
|
||||||
L: linux-watchdog@vger.kernel.org
|
L: linux-watchdog@vger.kernel.org
|
||||||
W: http://www.linux-watchdog.org/
|
W: http://www.linux-watchdog.org/
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog.git
|
T: git git://www.linux-watchdog.org/linux-watchdog.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/watchdog/
|
F: Documentation/watchdog/
|
||||||
F: drivers/watchdog/
|
F: drivers/watchdog/
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
||||||
VERSION = 3
|
VERSION = 3
|
||||||
PATCHLEVEL = 3
|
PATCHLEVEL = 3
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc4
|
EXTRAVERSION = -rc7
|
||||||
NAME = Saber-toothed Squirrel
|
NAME = Saber-toothed Squirrel
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
@ -108,7 +108,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
||||||
" lda $31,3b-2b(%0)\n"
|
" lda $31,3b-2b(%0)\n"
|
||||||
" .previous\n"
|
" .previous\n"
|
||||||
: "+r"(ret), "=&r"(prev), "=&r"(cmp)
|
: "+r"(ret), "=&r"(prev), "=&r"(cmp)
|
||||||
: "r"(uaddr), "r"((long)oldval), "r"(newval)
|
: "r"(uaddr), "r"((long)(int)oldval), "r"(newval)
|
||||||
: "memory");
|
: "memory");
|
||||||
|
|
||||||
*uval = prev;
|
*uval = prev;
|
||||||
|
|
|
@ -1280,7 +1280,7 @@ config ARM_ERRATA_743622
|
||||||
depends on CPU_V7
|
depends on CPU_V7
|
||||||
help
|
help
|
||||||
This option enables the workaround for the 743622 Cortex-A9
|
This option enables the workaround for the 743622 Cortex-A9
|
||||||
(r2p0..r2p2) erratum. Under very rare conditions, a faulty
|
(r2p*) erratum. Under very rare conditions, a faulty
|
||||||
optimisation in the Cortex-A9 Store Buffer may lead to data
|
optimisation in the Cortex-A9 Store Buffer may lead to data
|
||||||
corruption. This workaround sets a specific bit in the diagnostic
|
corruption. This workaround sets a specific bit in the diagnostic
|
||||||
register of the Cortex-A9 which disables the Store Buffer
|
register of the Cortex-A9 which disables the Store Buffer
|
||||||
|
|
1
arch/arm/boot/.gitignore
vendored
1
arch/arm/boot/.gitignore
vendored
|
@ -3,3 +3,4 @@ zImage
|
||||||
xipImage
|
xipImage
|
||||||
bootpImage
|
bootpImage
|
||||||
uImage
|
uImage
|
||||||
|
*.dtb
|
||||||
|
|
|
@ -320,13 +320,6 @@ err0:
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* If we set up a device for bus mastering, we need to check the latency
|
|
||||||
* timer as we don't have even crappy BIOSes to set it properly.
|
|
||||||
* The implementation is from arch/i386/pci/i386.c
|
|
||||||
*/
|
|
||||||
unsigned int pcibios_max_latency = 255;
|
|
||||||
|
|
||||||
/* ITE bridge requires setting latency timer to avoid early bus access
|
/* ITE bridge requires setting latency timer to avoid early bus access
|
||||||
termination by PCI bus master devices
|
termination by PCI bus master devices
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
|
||||||
struct pl330_thread *thrd = ch_id;
|
struct pl330_thread *thrd = ch_id;
|
||||||
struct pl330_dmac *pl330;
|
struct pl330_dmac *pl330;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
int ret = 0, active = thrd->req_running;
|
int ret = 0, active;
|
||||||
|
|
||||||
if (!thrd || thrd->free || thrd->dmac->state == DYING)
|
if (!thrd || thrd->free || thrd->dmac->state == DYING)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
pl330 = thrd->dmac;
|
pl330 = thrd->dmac;
|
||||||
|
active = thrd->req_running;
|
||||||
|
|
||||||
spin_lock_irqsave(&pl330->lock, flags);
|
spin_lock_irqsave(&pl330->lock, flags);
|
||||||
|
|
||||||
|
|
|
@ -137,6 +137,11 @@
|
||||||
disable_irq
|
disable_irq
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
|
.macro save_and_disable_irqs_notrace, oldcpsr
|
||||||
|
mrs \oldcpsr, cpsr
|
||||||
|
disable_irq_notrace
|
||||||
|
.endm
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Restore interrupt state previously stored in a register. We don't
|
* Restore interrupt state previously stored in a register. We don't
|
||||||
* guarantee that this will preserve the flags.
|
* guarantee that this will preserve the flags.
|
||||||
|
|
|
@ -41,7 +41,7 @@ enum pl330_dstcachectrl {
|
||||||
DCCTRL1, /* Bufferable only */
|
DCCTRL1, /* Bufferable only */
|
||||||
DCCTRL2, /* Cacheable, but do not allocate */
|
DCCTRL2, /* Cacheable, but do not allocate */
|
||||||
DCCTRL3, /* Cacheable and bufferable, but do not allocate */
|
DCCTRL3, /* Cacheable and bufferable, but do not allocate */
|
||||||
DINVALID1 = 8,
|
DINVALID1, /* AWCACHE = 0x1000 */
|
||||||
DINVALID2,
|
DINVALID2,
|
||||||
DCCTRL6, /* Cacheable write-through, allocate on writes only */
|
DCCTRL6, /* Cacheable write-through, allocate on writes only */
|
||||||
DCCTRL7, /* Cacheable write-back, allocate on writes only */
|
DCCTRL7, /* Cacheable write-back, allocate on writes only */
|
||||||
|
|
|
@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
|
||||||
|
|
||||||
u64 armpmu_event_update(struct perf_event *event,
|
u64 armpmu_event_update(struct perf_event *event,
|
||||||
struct hw_perf_event *hwc,
|
struct hw_perf_event *hwc,
|
||||||
int idx, int overflow);
|
int idx);
|
||||||
|
|
||||||
int armpmu_event_set_period(struct perf_event *event,
|
int armpmu_event_set_period(struct perf_event *event,
|
||||||
struct hw_perf_event *hwc,
|
struct hw_perf_event *hwc,
|
||||||
|
|
|
@ -22,6 +22,7 @@
|
||||||
#include <asm/hw_breakpoint.h>
|
#include <asm/hw_breakpoint.h>
|
||||||
#include <asm/ptrace.h>
|
#include <asm/ptrace.h>
|
||||||
#include <asm/types.h>
|
#include <asm/types.h>
|
||||||
|
#include <asm/system.h>
|
||||||
|
|
||||||
#ifdef __KERNEL__
|
#ifdef __KERNEL__
|
||||||
#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
|
#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
|
||||||
|
|
|
@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
|
||||||
|
|
||||||
memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
|
memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
|
||||||
|
|
||||||
|
vma.vm_flags = VM_EXEC;
|
||||||
vma.vm_mm = mm;
|
vma.vm_mm = mm;
|
||||||
|
|
||||||
flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
|
flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
|
||||||
|
|
|
@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
|
||||||
u64
|
u64
|
||||||
armpmu_event_update(struct perf_event *event,
|
armpmu_event_update(struct perf_event *event,
|
||||||
struct hw_perf_event *hwc,
|
struct hw_perf_event *hwc,
|
||||||
int idx, int overflow)
|
int idx)
|
||||||
{
|
{
|
||||||
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
||||||
u64 delta, prev_raw_count, new_raw_count;
|
u64 delta, prev_raw_count, new_raw_count;
|
||||||
|
@ -193,13 +193,7 @@ again:
|
||||||
new_raw_count) != prev_raw_count)
|
new_raw_count) != prev_raw_count)
|
||||||
goto again;
|
goto again;
|
||||||
|
|
||||||
new_raw_count &= armpmu->max_period;
|
delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
|
||||||
prev_raw_count &= armpmu->max_period;
|
|
||||||
|
|
||||||
if (overflow)
|
|
||||||
delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
|
|
||||||
else
|
|
||||||
delta = new_raw_count - prev_raw_count;
|
|
||||||
|
|
||||||
local64_add(delta, &event->count);
|
local64_add(delta, &event->count);
|
||||||
local64_sub(delta, &hwc->period_left);
|
local64_sub(delta, &hwc->period_left);
|
||||||
|
@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
|
||||||
if (hwc->idx < 0)
|
if (hwc->idx < 0)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
armpmu_event_update(event, hwc, hwc->idx, 0);
|
armpmu_event_update(event, hwc, hwc->idx);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
|
||||||
if (!(hwc->state & PERF_HES_STOPPED)) {
|
if (!(hwc->state & PERF_HES_STOPPED)) {
|
||||||
armpmu->disable(hwc, hwc->idx);
|
armpmu->disable(hwc, hwc->idx);
|
||||||
barrier(); /* why? */
|
barrier(); /* why? */
|
||||||
armpmu_event_update(event, hwc, hwc->idx, 0);
|
armpmu_event_update(event, hwc, hwc->idx);
|
||||||
hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
|
||||||
hwc->config_base |= (unsigned long)mapping;
|
hwc->config_base |= (unsigned long)mapping;
|
||||||
|
|
||||||
if (!hwc->sample_period) {
|
if (!hwc->sample_period) {
|
||||||
hwc->sample_period = armpmu->max_period;
|
/*
|
||||||
|
* For non-sampling runs, limit the sample_period to half
|
||||||
|
* of the counter width. That way, the new counter value
|
||||||
|
* is far less likely to overtake the previous one unless
|
||||||
|
* you have some serious IRQ latency issues.
|
||||||
|
*/
|
||||||
|
hwc->sample_period = armpmu->max_period >> 1;
|
||||||
hwc->last_period = hwc->sample_period;
|
hwc->last_period = hwc->sample_period;
|
||||||
local64_set(&hwc->period_left, hwc->sample_period);
|
local64_set(&hwc->period_left, hwc->sample_period);
|
||||||
}
|
}
|
||||||
|
@ -679,6 +679,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
|
||||||
armpmu->type = ARM_PMU_DEVICE_CPU;
|
armpmu->type = ARM_PMU_DEVICE_CPU;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PMU hardware loses all context when a CPU goes offline.
|
||||||
|
* When a CPU is hotplugged back in, since some hardware registers are
|
||||||
|
* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
|
||||||
|
* junk values out of them.
|
||||||
|
*/
|
||||||
|
static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
|
||||||
|
unsigned long action, void *hcpu)
|
||||||
|
{
|
||||||
|
if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
|
||||||
|
return NOTIFY_DONE;
|
||||||
|
|
||||||
|
if (cpu_pmu && cpu_pmu->reset)
|
||||||
|
cpu_pmu->reset(NULL);
|
||||||
|
|
||||||
|
return NOTIFY_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
|
||||||
|
.notifier_call = pmu_cpu_notify,
|
||||||
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CPU PMU identification and registration.
|
* CPU PMU identification and registration.
|
||||||
*/
|
*/
|
||||||
|
@ -730,6 +752,7 @@ init_hw_perf_events(void)
|
||||||
pr_info("enabled with %s PMU driver, %d counters available\n",
|
pr_info("enabled with %s PMU driver, %d counters available\n",
|
||||||
cpu_pmu->name, cpu_pmu->num_events);
|
cpu_pmu->name, cpu_pmu->num_events);
|
||||||
cpu_pmu_init(cpu_pmu);
|
cpu_pmu_init(cpu_pmu);
|
||||||
|
register_cpu_notifier(&pmu_cpu_notifier);
|
||||||
armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
|
armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
|
||||||
} else {
|
} else {
|
||||||
pr_info("no hardware support available\n");
|
pr_info("no hardware support available\n");
|
||||||
|
|
|
@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
|
||||||
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int counter_is_active(unsigned long pmcr, int idx)
|
|
||||||
{
|
|
||||||
unsigned long mask = 0;
|
|
||||||
if (idx == ARMV6_CYCLE_COUNTER)
|
|
||||||
mask = ARMV6_PMCR_CCOUNT_IEN;
|
|
||||||
else if (idx == ARMV6_COUNTER0)
|
|
||||||
mask = ARMV6_PMCR_COUNT0_IEN;
|
|
||||||
else if (idx == ARMV6_COUNTER1)
|
|
||||||
mask = ARMV6_PMCR_COUNT1_IEN;
|
|
||||||
|
|
||||||
if (mask)
|
|
||||||
return pmcr & mask;
|
|
||||||
|
|
||||||
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static irqreturn_t
|
static irqreturn_t
|
||||||
armv6pmu_handle_irq(int irq_num,
|
armv6pmu_handle_irq(int irq_num,
|
||||||
void *dev)
|
void *dev)
|
||||||
|
@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
|
||||||
struct perf_event *event = cpuc->events[idx];
|
struct perf_event *event = cpuc->events[idx];
|
||||||
struct hw_perf_event *hwc;
|
struct hw_perf_event *hwc;
|
||||||
|
|
||||||
if (!counter_is_active(pmcr, idx))
|
/* Ignore if we don't have an event. */
|
||||||
|
if (!event)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
hwc = &event->hw;
|
hwc = &event->hw;
|
||||||
armpmu_event_update(event, hwc, idx, 1);
|
armpmu_event_update(event, hwc, idx);
|
||||||
data.period = event->hw.last_period;
|
data.period = event->hw.last_period;
|
||||||
if (!armpmu_event_set_period(event, hwc, idx))
|
if (!armpmu_event_set_period(event, hwc, idx))
|
||||||
continue;
|
continue;
|
||||||
|
|
|
@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
|
||||||
|
|
||||||
counter = ARMV7_IDX_TO_COUNTER(idx);
|
counter = ARMV7_IDX_TO_COUNTER(idx);
|
||||||
asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
|
asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
|
||||||
|
isb();
|
||||||
|
/* Clear the overflow flag in case an interrupt is pending. */
|
||||||
|
asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
|
||||||
|
isb();
|
||||||
|
|
||||||
return idx;
|
return idx;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
||||||
struct perf_event *event = cpuc->events[idx];
|
struct perf_event *event = cpuc->events[idx];
|
||||||
struct hw_perf_event *hwc;
|
struct hw_perf_event *hwc;
|
||||||
|
|
||||||
|
/* Ignore if we don't have an event. */
|
||||||
|
if (!event)
|
||||||
|
continue;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* We have a single interrupt for all counters. Check that
|
* We have a single interrupt for all counters. Check that
|
||||||
* each counter has overflowed before we process it.
|
* each counter has overflowed before we process it.
|
||||||
|
@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
hwc = &event->hw;
|
hwc = &event->hw;
|
||||||
armpmu_event_update(event, hwc, idx, 1);
|
armpmu_event_update(event, hwc, idx);
|
||||||
data.period = event->hw.last_period;
|
data.period = event->hw.last_period;
|
||||||
if (!armpmu_event_set_period(event, hwc, idx))
|
if (!armpmu_event_set_period(event, hwc, idx))
|
||||||
continue;
|
continue;
|
||||||
|
|
|
@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
|
||||||
struct perf_event *event = cpuc->events[idx];
|
struct perf_event *event = cpuc->events[idx];
|
||||||
struct hw_perf_event *hwc;
|
struct hw_perf_event *hwc;
|
||||||
|
|
||||||
|
if (!event)
|
||||||
|
continue;
|
||||||
|
|
||||||
if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
|
if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
hwc = &event->hw;
|
hwc = &event->hw;
|
||||||
armpmu_event_update(event, hwc, idx, 1);
|
armpmu_event_update(event, hwc, idx);
|
||||||
data.period = event->hw.last_period;
|
data.period = event->hw.last_period;
|
||||||
if (!armpmu_event_set_period(event, hwc, idx))
|
if (!armpmu_event_set_period(event, hwc, idx))
|
||||||
continue;
|
continue;
|
||||||
|
@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
|
||||||
struct perf_event *event = cpuc->events[idx];
|
struct perf_event *event = cpuc->events[idx];
|
||||||
struct hw_perf_event *hwc;
|
struct hw_perf_event *hwc;
|
||||||
|
|
||||||
if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx))
|
if (!event)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
hwc = &event->hw;
|
hwc = &event->hw;
|
||||||
armpmu_event_update(event, hwc, idx, 1);
|
armpmu_event_update(event, hwc, idx);
|
||||||
data.period = event->hw.last_period;
|
data.period = event->hw.last_period;
|
||||||
if (!armpmu_event_set_period(event, hwc, idx))
|
if (!armpmu_event_set_period(event, hwc, idx))
|
||||||
continue;
|
continue;
|
||||||
|
@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
|
||||||
static void
|
static void
|
||||||
xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||||
{
|
{
|
||||||
unsigned long flags, ien, evtsel;
|
unsigned long flags, ien, evtsel, of_flags;
|
||||||
struct pmu_hw_events *events = cpu_pmu->get_hw_events();
|
struct pmu_hw_events *events = cpu_pmu->get_hw_events();
|
||||||
|
|
||||||
ien = xscale2pmu_read_int_enable();
|
ien = xscale2pmu_read_int_enable();
|
||||||
|
@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||||
switch (idx) {
|
switch (idx) {
|
||||||
case XSCALE_CYCLE_COUNTER:
|
case XSCALE_CYCLE_COUNTER:
|
||||||
ien &= ~XSCALE2_CCOUNT_INT_EN;
|
ien &= ~XSCALE2_CCOUNT_INT_EN;
|
||||||
|
of_flags = XSCALE2_CCOUNT_OVERFLOW;
|
||||||
break;
|
break;
|
||||||
case XSCALE_COUNTER0:
|
case XSCALE_COUNTER0:
|
||||||
ien &= ~XSCALE2_COUNT0_INT_EN;
|
ien &= ~XSCALE2_COUNT0_INT_EN;
|
||||||
evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
|
evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
|
||||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
|
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
|
||||||
|
of_flags = XSCALE2_COUNT0_OVERFLOW;
|
||||||
break;
|
break;
|
||||||
case XSCALE_COUNTER1:
|
case XSCALE_COUNTER1:
|
||||||
ien &= ~XSCALE2_COUNT1_INT_EN;
|
ien &= ~XSCALE2_COUNT1_INT_EN;
|
||||||
evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
|
evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
|
||||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
|
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
|
||||||
|
of_flags = XSCALE2_COUNT1_OVERFLOW;
|
||||||
break;
|
break;
|
||||||
case XSCALE_COUNTER2:
|
case XSCALE_COUNTER2:
|
||||||
ien &= ~XSCALE2_COUNT2_INT_EN;
|
ien &= ~XSCALE2_COUNT2_INT_EN;
|
||||||
evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
|
evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
|
||||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
|
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
|
||||||
|
of_flags = XSCALE2_COUNT2_OVERFLOW;
|
||||||
break;
|
break;
|
||||||
case XSCALE_COUNTER3:
|
case XSCALE_COUNTER3:
|
||||||
ien &= ~XSCALE2_COUNT3_INT_EN;
|
ien &= ~XSCALE2_COUNT3_INT_EN;
|
||||||
evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
|
evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
|
||||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
|
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
|
||||||
|
of_flags = XSCALE2_COUNT3_OVERFLOW;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
||||||
|
@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||||
raw_spin_lock_irqsave(&events->pmu_lock, flags);
|
raw_spin_lock_irqsave(&events->pmu_lock, flags);
|
||||||
xscale2pmu_write_event_select(evtsel);
|
xscale2pmu_write_event_select(evtsel);
|
||||||
xscale2pmu_write_int_enable(ien);
|
xscale2pmu_write_int_enable(ien);
|
||||||
|
xscale2pmu_write_overflow_flags(of_flags);
|
||||||
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -23,6 +23,7 @@
|
||||||
#include <linux/perf_event.h>
|
#include <linux/perf_event.h>
|
||||||
#include <linux/hw_breakpoint.h>
|
#include <linux/hw_breakpoint.h>
|
||||||
#include <linux/regset.h>
|
#include <linux/regset.h>
|
||||||
|
#include <linux/audit.h>
|
||||||
|
|
||||||
#include <asm/pgtable.h>
|
#include <asm/pgtable.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
|
@ -904,6 +905,12 @@ long arch_ptrace(struct task_struct *child, long request,
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef __ARMEB__
|
||||||
|
#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
|
||||||
|
#else
|
||||||
|
#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
|
||||||
|
#endif
|
||||||
|
|
||||||
asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
|
asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
|
||||||
{
|
{
|
||||||
unsigned long ip;
|
unsigned long ip;
|
||||||
|
@ -918,7 +925,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
|
||||||
if (!ip)
|
if (!ip)
|
||||||
audit_syscall_exit(regs);
|
audit_syscall_exit(regs);
|
||||||
else
|
else
|
||||||
audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0,
|
audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0,
|
||||||
regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
|
regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
|
||||||
|
|
||||||
if (!test_thread_flag(TIF_SYSCALL_TRACE))
|
if (!test_thread_flag(TIF_SYSCALL_TRACE))
|
||||||
|
|
|
@ -129,7 +129,7 @@ static struct notifier_block twd_cpufreq_nb = {
|
||||||
|
|
||||||
static int twd_cpufreq_init(void)
|
static int twd_cpufreq_init(void)
|
||||||
{
|
{
|
||||||
if (!IS_ERR(twd_clk))
|
if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
|
||||||
return cpufreq_register_notifier(&twd_cpufreq_nb,
|
return cpufreq_register_notifier(&twd_cpufreq_nb,
|
||||||
CPUFREQ_TRANSITION_NOTIFIER);
|
CPUFREQ_TRANSITION_NOTIFIER);
|
||||||
|
|
||||||
|
|
|
@ -38,10 +38,6 @@
|
||||||
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
||||||
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
||||||
|
|
||||||
static struct at_dma_platform_data atdma_pdata = {
|
|
||||||
.nr_channels = 8,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource hdmac_resources[] = {
|
static struct resource hdmac_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
.start = AT91SAM9G45_BASE_DMA,
|
.start = AT91SAM9G45_BASE_DMA,
|
||||||
|
@ -56,12 +52,11 @@ static struct resource hdmac_resources[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct platform_device at_hdmac_device = {
|
static struct platform_device at_hdmac_device = {
|
||||||
.name = "at_hdmac",
|
.name = "at91sam9g45_dma",
|
||||||
.id = -1,
|
.id = -1,
|
||||||
.dev = {
|
.dev = {
|
||||||
.dma_mask = &hdmac_dmamask,
|
.dma_mask = &hdmac_dmamask,
|
||||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||||
.platform_data = &atdma_pdata,
|
|
||||||
},
|
},
|
||||||
.resource = hdmac_resources,
|
.resource = hdmac_resources,
|
||||||
.num_resources = ARRAY_SIZE(hdmac_resources),
|
.num_resources = ARRAY_SIZE(hdmac_resources),
|
||||||
|
@ -69,8 +64,14 @@ static struct platform_device at_hdmac_device = {
|
||||||
|
|
||||||
void __init at91_add_device_hdmac(void)
|
void __init at91_add_device_hdmac(void)
|
||||||
{
|
{
|
||||||
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
|
#if defined(CONFIG_OF)
|
||||||
dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
|
struct device_node *of_node =
|
||||||
|
of_find_node_by_name(NULL, "dma-controller");
|
||||||
|
|
||||||
|
if (of_node)
|
||||||
|
of_node_put(of_node);
|
||||||
|
else
|
||||||
|
#endif
|
||||||
platform_device_register(&at_hdmac_device);
|
platform_device_register(&at_hdmac_device);
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -33,10 +33,6 @@
|
||||||
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
||||||
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
||||||
|
|
||||||
static struct at_dma_platform_data atdma_pdata = {
|
|
||||||
.nr_channels = 2,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource hdmac_resources[] = {
|
static struct resource hdmac_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
.start = AT91SAM9RL_BASE_DMA,
|
.start = AT91SAM9RL_BASE_DMA,
|
||||||
|
@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct platform_device at_hdmac_device = {
|
static struct platform_device at_hdmac_device = {
|
||||||
.name = "at_hdmac",
|
.name = "at91sam9rl_dma",
|
||||||
.id = -1,
|
.id = -1,
|
||||||
.dev = {
|
.dev = {
|
||||||
.dma_mask = &hdmac_dmamask,
|
.dma_mask = &hdmac_dmamask,
|
||||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||||
.platform_data = &atdma_pdata,
|
|
||||||
},
|
},
|
||||||
.resource = hdmac_resources,
|
.resource = hdmac_resources,
|
||||||
.num_resources = ARRAY_SIZE(hdmac_resources),
|
.num_resources = ARRAY_SIZE(hdmac_resources),
|
||||||
|
@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = {
|
||||||
|
|
||||||
void __init at91_add_device_hdmac(void)
|
void __init at91_add_device_hdmac(void)
|
||||||
{
|
{
|
||||||
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
|
|
||||||
platform_device_register(&at_hdmac_device);
|
platform_device_register(&at_hdmac_device);
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -34,6 +34,7 @@
|
||||||
#include <mach/ep93xx_spi.h>
|
#include <mach/ep93xx_spi.h>
|
||||||
#include <mach/gpio-ep93xx.h>
|
#include <mach/gpio-ep93xx.h>
|
||||||
|
|
||||||
|
#include <asm/hardware/vic.h>
|
||||||
#include <asm/mach-types.h>
|
#include <asm/mach-types.h>
|
||||||
#include <asm/mach/map.h>
|
#include <asm/mach/map.h>
|
||||||
#include <asm/mach/arch.h>
|
#include <asm/mach/arch.h>
|
||||||
|
@ -361,6 +362,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
|
||||||
.atag_offset = 0x100,
|
.atag_offset = 0x100,
|
||||||
.map_io = vision_map_io,
|
.map_io = vision_map_io,
|
||||||
.init_irq = ep93xx_init_irq,
|
.init_irq = ep93xx_init_irq,
|
||||||
|
.handle_irq = vic_handle_irq,
|
||||||
.timer = &ep93xx_timer,
|
.timer = &ep93xx_timer,
|
||||||
.init_machine = vision_init_machine,
|
.init_machine = vision_init_machine,
|
||||||
.restart = ep93xx_restart,
|
.restart = ep93xx_restart,
|
||||||
|
|
|
@ -13,6 +13,7 @@
|
||||||
#include <linux/i2c.h>
|
#include <linux/i2c.h>
|
||||||
#include <linux/gpio_keys.h>
|
#include <linux/gpio_keys.h>
|
||||||
#include <linux/gpio.h>
|
#include <linux/gpio.h>
|
||||||
|
#include <linux/interrupt.h>
|
||||||
#include <linux/fb.h>
|
#include <linux/fb.h>
|
||||||
#include <linux/mfd/max8998.h>
|
#include <linux/mfd/max8998.h>
|
||||||
#include <linux/regulator/machine.h>
|
#include <linux/regulator/machine.h>
|
||||||
|
@ -595,6 +596,7 @@ static struct mxt_platform_data qt602240_platform_data = {
|
||||||
.threshold = 0x28,
|
.threshold = 0x28,
|
||||||
.voltage = 2800000, /* 2.8V */
|
.voltage = 2800000, /* 2.8V */
|
||||||
.orient = MXT_DIAGONAL,
|
.orient = MXT_DIAGONAL,
|
||||||
|
.irqflags = IRQF_TRIGGER_FALLING,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct i2c_board_info i2c3_devs[] __initdata = {
|
static struct i2c_board_info i2c3_devs[] __initdata = {
|
||||||
|
|
|
@ -61,7 +61,7 @@
|
||||||
*/
|
*/
|
||||||
#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
|
#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
|
||||||
#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
|
#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
|
||||||
#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
|
#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
|
||||||
#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
|
#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
|
||||||
#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
|
#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
|
||||||
#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
|
#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
|
||||||
|
|
|
@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
|
||||||
.event_group = &lpc32xx_event_pin_regs,
|
.event_group = &lpc32xx_event_pin_regs,
|
||||||
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
|
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
|
||||||
},
|
},
|
||||||
|
[IRQ_LPC32XX_GPI_28] = {
|
||||||
|
.event_group = &lpc32xx_event_pin_regs,
|
||||||
|
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
|
||||||
|
},
|
||||||
[IRQ_LPC32XX_GPIO_00] = {
|
[IRQ_LPC32XX_GPIO_00] = {
|
||||||
.event_group = &lpc32xx_event_int_regs,
|
.event_group = &lpc32xx_event_int_regs,
|
||||||
.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
|
.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
|
||||||
|
@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
|
||||||
|
|
||||||
if (state)
|
if (state)
|
||||||
eventreg |= lpc32xx_events[d->irq].mask;
|
eventreg |= lpc32xx_events[d->irq].mask;
|
||||||
else
|
else {
|
||||||
eventreg &= ~lpc32xx_events[d->irq].mask;
|
eventreg &= ~lpc32xx_events[d->irq].mask;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* When disabling the wakeup, clear the latched
|
||||||
|
* event
|
||||||
|
*/
|
||||||
|
__raw_writel(lpc32xx_events[d->irq].mask,
|
||||||
|
lpc32xx_events[d->irq].
|
||||||
|
event_group->rawstat_reg);
|
||||||
|
}
|
||||||
|
|
||||||
__raw_writel(eventreg,
|
__raw_writel(eventreg,
|
||||||
lpc32xx_events[d->irq].event_group->enab_reg);
|
lpc32xx_events[d->irq].event_group->enab_reg);
|
||||||
|
|
||||||
|
@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)
|
||||||
|
|
||||||
/* Setup SIC1 */
|
/* Setup SIC1 */
|
||||||
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
|
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
|
||||||
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
|
__raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
|
||||||
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
|
__raw_writel(SIC1_ATR_DEFAULT,
|
||||||
|
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
|
||||||
|
|
||||||
/* Setup SIC2 */
|
/* Setup SIC2 */
|
||||||
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
|
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
|
||||||
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
|
__raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
|
||||||
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
|
__raw_writel(SIC2_ATR_DEFAULT,
|
||||||
|
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
|
||||||
|
|
||||||
/* Configure supported IRQ's */
|
/* Configure supported IRQ's */
|
||||||
for (i = 0; i < NR_IRQS; i++) {
|
for (i = 0; i < NR_IRQS; i++) {
|
||||||
|
|
|
@ -88,6 +88,7 @@ struct uartinit {
|
||||||
char *uart_ck_name;
|
char *uart_ck_name;
|
||||||
u32 ck_mode_mask;
|
u32 ck_mode_mask;
|
||||||
void __iomem *pdiv_clk_reg;
|
void __iomem *pdiv_clk_reg;
|
||||||
|
resource_size_t mapbase;
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct uartinit uartinit_data[] __initdata = {
|
static struct uartinit uartinit_data[] __initdata = {
|
||||||
|
@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
||||||
.ck_mode_mask =
|
.ck_mode_mask =
|
||||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
|
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
|
||||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
|
.pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
|
||||||
|
.mapbase = LPC32XX_UART5_BASE,
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
|
#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
|
||||||
|
@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
||||||
.ck_mode_mask =
|
.ck_mode_mask =
|
||||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
|
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
|
||||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
|
.pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
|
||||||
|
.mapbase = LPC32XX_UART3_BASE,
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
|
#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
|
||||||
|
@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
||||||
.ck_mode_mask =
|
.ck_mode_mask =
|
||||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
|
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
|
||||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
|
.pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
|
||||||
|
.mapbase = LPC32XX_UART4_BASE,
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
|
#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
|
||||||
|
@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
||||||
.ck_mode_mask =
|
.ck_mode_mask =
|
||||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
|
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
|
||||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
|
.pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
|
||||||
|
.mapbase = LPC32XX_UART6_BASE,
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)
|
||||||
|
|
||||||
/* pre-UART clock divider set to 1 */
|
/* pre-UART clock divider set to 1 */
|
||||||
__raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
|
__raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Force a flush of the RX FIFOs to work around a
|
||||||
|
* HW bug
|
||||||
|
*/
|
||||||
|
puart = uartinit_data[i].mapbase;
|
||||||
|
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
|
||||||
|
__raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
|
||||||
|
j = LPC32XX_SUART_FIFO_SIZE;
|
||||||
|
while (j--)
|
||||||
|
tmp = __raw_readl(
|
||||||
|
LPC32XX_UART_DLL_FIFO(puart));
|
||||||
|
__raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
|
||||||
}
|
}
|
||||||
|
|
||||||
/* This needs to be done after all UART clocks are setup */
|
/* This needs to be done after all UART clocks are setup */
|
||||||
__raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
|
__raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
|
||||||
for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) {
|
for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
|
||||||
/* Force a flush of the RX FIFOs to work around a HW bug */
|
/* Force a flush of the RX FIFOs to work around a HW bug */
|
||||||
puart = serial_std_platform_data[i].mapbase;
|
puart = serial_std_platform_data[i].mapbase;
|
||||||
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
|
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
|
||||||
|
|
|
@ -17,7 +17,6 @@
|
||||||
#include <linux/mtd/partitions.h>
|
#include <linux/mtd/partitions.h>
|
||||||
#include <linux/mtd/nand.h>
|
#include <linux/mtd/nand.h>
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/gpio.h>
|
|
||||||
|
|
||||||
#include <asm/mach-types.h>
|
#include <asm/mach-types.h>
|
||||||
#include <asm/mach/arch.h>
|
#include <asm/mach/arch.h>
|
||||||
|
|
|
@ -24,7 +24,6 @@
|
||||||
#include <mach/dma.h>
|
#include <mach/dma.h>
|
||||||
#include <mach/devices.h>
|
#include <mach/devices.h>
|
||||||
#include <mach/mfp.h>
|
#include <mach/mfp.h>
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/dma-mapping.h>
|
#include <linux/dma-mapping.h>
|
||||||
#include <mach/pxa168.h>
|
#include <mach/pxa168.h>
|
||||||
|
|
||||||
|
|
|
@ -12,7 +12,6 @@
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/smc91x.h>
|
#include <linux/smc91x.h>
|
||||||
#include <linux/gpio.h>
|
|
||||||
|
|
||||||
#include <asm/mach-types.h>
|
#include <asm/mach-types.h>
|
||||||
#include <asm/mach/arch.h>
|
#include <asm/mach/arch.h>
|
||||||
|
|
|
@ -416,13 +416,13 @@ static void __init innovator_init(void)
|
||||||
#ifdef CONFIG_ARCH_OMAP15XX
|
#ifdef CONFIG_ARCH_OMAP15XX
|
||||||
if (cpu_is_omap1510()) {
|
if (cpu_is_omap1510()) {
|
||||||
omap1_usb_init(&innovator1510_usb_config);
|
omap1_usb_init(&innovator1510_usb_config);
|
||||||
innovator_config[1].data = &innovator1510_lcd_config;
|
innovator_config[0].data = &innovator1510_lcd_config;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_ARCH_OMAP16XX
|
#ifdef CONFIG_ARCH_OMAP16XX
|
||||||
if (cpu_is_omap1610()) {
|
if (cpu_is_omap1610()) {
|
||||||
omap1_usb_init(&h2_usb_config);
|
omap1_usb_init(&h2_usb_config);
|
||||||
innovator_config[1].data = &innovator1610_lcd_config;
|
innovator_config[0].data = &innovator1610_lcd_config;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
omap_board_config = innovator_config;
|
omap_board_config = innovator_config;
|
||||||
|
|
|
@ -364,8 +364,8 @@ config OMAP3_SDRC_AC_TIMING
|
||||||
going on could result in system crashes;
|
going on could result in system crashes;
|
||||||
|
|
||||||
config OMAP4_ERRATA_I688
|
config OMAP4_ERRATA_I688
|
||||||
bool "OMAP4 errata: Async Bridge Corruption (BROKEN)"
|
bool "OMAP4 errata: Async Bridge Corruption"
|
||||||
depends on ARCH_OMAP4 && BROKEN
|
depends on ARCH_OMAP4
|
||||||
select ARCH_HAS_BARRIERS
|
select ARCH_HAS_BARRIERS
|
||||||
help
|
help
|
||||||
If a data is stalled inside asynchronous bridge because of back
|
If a data is stalled inside asynchronous bridge because of back
|
||||||
|
|
|
@ -371,7 +371,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
|
||||||
else
|
else
|
||||||
*openp = 0;
|
*openp = 0;
|
||||||
|
|
||||||
|
#ifdef CONFIG_MMC_OMAP
|
||||||
omap_mmc_notify_cover_event(mmc_device, index, *openp);
|
omap_mmc_notify_cover_event(mmc_device, index, *openp);
|
||||||
|
#else
|
||||||
|
pr_warn("MMC: notify cover event not available\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static int n8x0_mmc_late_init(struct device *dev)
|
static int n8x0_mmc_late_init(struct device *dev)
|
||||||
|
|
|
@ -381,7 +381,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
|
||||||
gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
|
gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
|
||||||
|
|
||||||
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
|
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
|
||||||
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||||
|
|
||||||
platform_device_register(&leds_gpio);
|
platform_device_register(&leds_gpio);
|
||||||
|
|
||||||
|
|
|
@ -132,6 +132,7 @@ void omap3_map_io(void);
|
||||||
void am33xx_map_io(void);
|
void am33xx_map_io(void);
|
||||||
void omap4_map_io(void);
|
void omap4_map_io(void);
|
||||||
void ti81xx_map_io(void);
|
void ti81xx_map_io(void);
|
||||||
|
void omap_barriers_init(void);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* omap_test_timeout - busy-loop, testing a condition
|
* omap_test_timeout - busy-loop, testing a condition
|
||||||
|
|
|
@ -65,7 +65,6 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
|
||||||
struct timespec ts_preidle, ts_postidle, ts_idle;
|
struct timespec ts_preidle, ts_postidle, ts_idle;
|
||||||
u32 cpu1_state;
|
u32 cpu1_state;
|
||||||
int idle_time;
|
int idle_time;
|
||||||
int new_state_idx;
|
|
||||||
int cpu_id = smp_processor_id();
|
int cpu_id = smp_processor_id();
|
||||||
|
|
||||||
/* Used to keep track of the total time in idle */
|
/* Used to keep track of the total time in idle */
|
||||||
|
@ -84,8 +83,8 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
|
||||||
*/
|
*/
|
||||||
cpu1_state = pwrdm_read_pwrst(cpu1_pd);
|
cpu1_state = pwrdm_read_pwrst(cpu1_pd);
|
||||||
if (cpu1_state != PWRDM_POWER_OFF) {
|
if (cpu1_state != PWRDM_POWER_OFF) {
|
||||||
new_state_idx = drv->safe_state_index;
|
index = drv->safe_state_index;
|
||||||
cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]);
|
cx = cpuidle_get_statedata(&dev->states_usage[index]);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (index > 0)
|
if (index > 0)
|
||||||
|
|
|
@ -19,6 +19,8 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/smsc911x.h>
|
#include <linux/smsc911x.h>
|
||||||
|
#include <linux/regulator/fixed.h>
|
||||||
|
#include <linux/regulator/machine.h>
|
||||||
|
|
||||||
#include <plat/board.h>
|
#include <plat/board.h>
|
||||||
#include <plat/gpmc.h>
|
#include <plat/gpmc.h>
|
||||||
|
@ -42,6 +44,50 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
|
||||||
.flags = SMSC911X_USE_16BIT,
|
.flags = SMSC911X_USE_16BIT,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
|
||||||
|
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
|
||||||
|
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Generic regulator definition to satisfy smsc911x */
|
||||||
|
static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
|
||||||
|
.constraints = {
|
||||||
|
.min_uV = 3300000,
|
||||||
|
.max_uV = 3300000,
|
||||||
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||||
|
| REGULATOR_MODE_STANDBY,
|
||||||
|
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||||
|
| REGULATOR_CHANGE_STATUS,
|
||||||
|
},
|
||||||
|
.num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
|
||||||
|
.consumer_supplies = gpmc_smsc911x_supply,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
|
||||||
|
.supply_name = "gpmc_smsc911x",
|
||||||
|
.microvolts = 3300000,
|
||||||
|
.gpio = -EINVAL,
|
||||||
|
.startup_delay = 0,
|
||||||
|
.enable_high = 0,
|
||||||
|
.enabled_at_boot = 1,
|
||||||
|
.init_data = &gpmc_smsc911x_reg_init_data,
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Platform device id of 42 is a temporary fix to avoid conflicts
|
||||||
|
* with other reg-fixed-voltage devices. The real fix should
|
||||||
|
* involve the driver core providing a way of dynamically
|
||||||
|
* assigning a unique id on registration for platform devices
|
||||||
|
* in the same name space.
|
||||||
|
*/
|
||||||
|
static struct platform_device gpmc_smsc911x_regulator = {
|
||||||
|
.name = "reg-fixed-voltage",
|
||||||
|
.id = 42,
|
||||||
|
.dev = {
|
||||||
|
.platform_data = &gpmc_smsc911x_fixed_reg_data,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initialize smsc911x device connected to the GPMC. Note that we
|
* Initialize smsc911x device connected to the GPMC. Note that we
|
||||||
* assume that pin multiplexing is done in the board-*.c file,
|
* assume that pin multiplexing is done in the board-*.c file,
|
||||||
|
@ -55,6 +101,12 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
|
||||||
|
|
||||||
gpmc_cfg = board_data;
|
gpmc_cfg = board_data;
|
||||||
|
|
||||||
|
ret = platform_device_register(&gpmc_smsc911x_regulator);
|
||||||
|
if (ret < 0) {
|
||||||
|
pr_err("Unable to register smsc911x regulators: %d\n", ret);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
|
if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
|
||||||
pr_err("Failed to request GPMC mem region\n");
|
pr_err("Failed to request GPMC mem region\n");
|
||||||
return;
|
return;
|
||||||
|
|
|
@ -428,6 +428,7 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int omap_hsmmc_done;
|
||||||
#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
|
#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
|
||||||
|
|
||||||
void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
|
void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
|
||||||
|
@ -491,6 +492,11 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
|
||||||
{
|
{
|
||||||
u32 reg;
|
u32 reg;
|
||||||
|
|
||||||
|
if (omap_hsmmc_done)
|
||||||
|
return;
|
||||||
|
|
||||||
|
omap_hsmmc_done = 1;
|
||||||
|
|
||||||
if (!cpu_is_omap44xx()) {
|
if (!cpu_is_omap44xx()) {
|
||||||
if (cpu_is_omap2430()) {
|
if (cpu_is_omap2430()) {
|
||||||
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
|
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
|
||||||
|
|
|
@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
|
||||||
case 0xb944:
|
case 0xb944:
|
||||||
omap_revision = AM335X_REV_ES1_0;
|
omap_revision = AM335X_REV_ES1_0;
|
||||||
*cpu_rev = "1.0";
|
*cpu_rev = "1.0";
|
||||||
|
break;
|
||||||
case 0xb8f2:
|
case 0xb8f2:
|
||||||
switch (rev) {
|
switch (rev) {
|
||||||
case 0:
|
case 0:
|
||||||
|
|
|
@ -307,6 +307,7 @@ void __init omapam33xx_map_common_io(void)
|
||||||
void __init omap44xx_map_common_io(void)
|
void __init omap44xx_map_common_io(void)
|
||||||
{
|
{
|
||||||
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
|
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
|
||||||
|
omap_barriers_init();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -281,8 +281,16 @@ static struct omap_mbox mbox_iva_info = {
|
||||||
.ops = &omap2_mbox_ops,
|
.ops = &omap2_mbox_ops,
|
||||||
.priv = &omap2_mbox_iva_priv,
|
.priv = &omap2_mbox_iva_priv,
|
||||||
};
|
};
|
||||||
|
#endif
|
||||||
|
|
||||||
struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL };
|
#ifdef CONFIG_ARCH_OMAP2
|
||||||
|
struct omap_mbox *omap2_mboxes[] = {
|
||||||
|
&mbox_dsp_info,
|
||||||
|
#ifdef CONFIG_SOC_OMAP2420
|
||||||
|
&mbox_iva_info,
|
||||||
|
#endif
|
||||||
|
NULL
|
||||||
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_ARCH_OMAP4)
|
#if defined(CONFIG_ARCH_OMAP4)
|
||||||
|
|
|
@ -218,7 +218,7 @@ static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init
|
static int
|
||||||
omap_mux_get_by_name(const char *muxname,
|
omap_mux_get_by_name(const char *muxname,
|
||||||
struct omap_mux_partition **found_partition,
|
struct omap_mux_partition **found_partition,
|
||||||
struct omap_mux **found_mux)
|
struct omap_mux **found_mux)
|
||||||
|
|
|
@ -150,7 +150,8 @@ err_out:
|
||||||
platform_device_put(omap_iommu_pdev[i]);
|
platform_device_put(omap_iommu_pdev[i]);
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
module_init(omap_iommu_init);
|
/* must be ready before omap3isp is probed */
|
||||||
|
subsys_initcall(omap_iommu_init);
|
||||||
|
|
||||||
static void __exit omap_iommu_exit(void)
|
static void __exit omap_iommu_exit(void)
|
||||||
{
|
{
|
||||||
|
|
|
@ -24,12 +24,14 @@
|
||||||
|
|
||||||
#include <plat/irqs.h>
|
#include <plat/irqs.h>
|
||||||
#include <plat/sram.h>
|
#include <plat/sram.h>
|
||||||
|
#include <plat/omap-secure.h>
|
||||||
|
|
||||||
#include <mach/hardware.h>
|
#include <mach/hardware.h>
|
||||||
#include <mach/omap-wakeupgen.h>
|
#include <mach/omap-wakeupgen.h>
|
||||||
|
|
||||||
#include "common.h"
|
#include "common.h"
|
||||||
#include "omap4-sar-layout.h"
|
#include "omap4-sar-layout.h"
|
||||||
|
#include <linux/export.h>
|
||||||
|
|
||||||
#ifdef CONFIG_CACHE_L2X0
|
#ifdef CONFIG_CACHE_L2X0
|
||||||
static void __iomem *l2cache_base;
|
static void __iomem *l2cache_base;
|
||||||
|
@ -43,6 +45,9 @@ static void __iomem *sar_ram_base;
|
||||||
|
|
||||||
void __iomem *dram_sync, *sram_sync;
|
void __iomem *dram_sync, *sram_sync;
|
||||||
|
|
||||||
|
static phys_addr_t paddr;
|
||||||
|
static u32 size;
|
||||||
|
|
||||||
void omap_bus_sync(void)
|
void omap_bus_sync(void)
|
||||||
{
|
{
|
||||||
if (dram_sync && sram_sync) {
|
if (dram_sync && sram_sync) {
|
||||||
|
@ -51,19 +56,22 @@ void omap_bus_sync(void)
|
||||||
isb();
|
isb();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(omap_bus_sync);
|
||||||
|
|
||||||
static int __init omap_barriers_init(void)
|
/* Steal one page physical memory for barrier implementation */
|
||||||
|
int __init omap_barrier_reserve_memblock(void)
|
||||||
{
|
{
|
||||||
struct map_desc dram_io_desc[1];
|
|
||||||
phys_addr_t paddr;
|
|
||||||
u32 size;
|
|
||||||
|
|
||||||
if (!cpu_is_omap44xx())
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
size = ALIGN(PAGE_SIZE, SZ_1M);
|
size = ALIGN(PAGE_SIZE, SZ_1M);
|
||||||
paddr = arm_memblock_steal(size, SZ_1M);
|
paddr = arm_memblock_steal(size, SZ_1M);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void __init omap_barriers_init(void)
|
||||||
|
{
|
||||||
|
struct map_desc dram_io_desc[1];
|
||||||
|
|
||||||
dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
|
dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
|
||||||
dram_io_desc[0].pfn = __phys_to_pfn(paddr);
|
dram_io_desc[0].pfn = __phys_to_pfn(paddr);
|
||||||
dram_io_desc[0].length = size;
|
dram_io_desc[0].length = size;
|
||||||
|
@ -75,9 +83,10 @@ static int __init omap_barriers_init(void)
|
||||||
pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
|
pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
|
||||||
(long long) paddr, dram_io_desc[0].virtual);
|
(long long) paddr, dram_io_desc[0].virtual);
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
core_initcall(omap_barriers_init);
|
#else
|
||||||
|
void __init omap_barriers_init(void)
|
||||||
|
{}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void __init gic_init_irq(void)
|
void __init gic_init_irq(void)
|
||||||
|
|
|
@ -174,14 +174,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
|
||||||
freq = clk->rate;
|
freq = clk->rate;
|
||||||
clk_put(clk);
|
clk_put(clk);
|
||||||
|
|
||||||
|
rcu_read_lock();
|
||||||
opp = opp_find_freq_ceil(dev, &freq);
|
opp = opp_find_freq_ceil(dev, &freq);
|
||||||
if (IS_ERR(opp)) {
|
if (IS_ERR(opp)) {
|
||||||
|
rcu_read_unlock();
|
||||||
pr_err("%s: unable to find boot up OPP for vdd_%s\n",
|
pr_err("%s: unable to find boot up OPP for vdd_%s\n",
|
||||||
__func__, vdd_name);
|
__func__, vdd_name);
|
||||||
goto exit;
|
goto exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
bootup_volt = opp_get_voltage(opp);
|
bootup_volt = opp_get_voltage(opp);
|
||||||
|
rcu_read_unlock();
|
||||||
if (!bootup_volt) {
|
if (!bootup_volt) {
|
||||||
pr_err("%s: unable to find voltage corresponding "
|
pr_err("%s: unable to find voltage corresponding "
|
||||||
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
|
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
|
||||||
|
|
|
@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
|
||||||
.constraints = {
|
.constraints = {
|
||||||
.min_uV = 3300000,
|
.min_uV = 3300000,
|
||||||
.max_uV = 3300000,
|
.max_uV = 3300000,
|
||||||
.apply_uV = true,
|
|
||||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||||
| REGULATOR_MODE_STANDBY,
|
| REGULATOR_MODE_STANDBY,
|
||||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||||
|
|
|
@ -486,7 +486,7 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
|
||||||
void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
|
void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
|
||||||
{
|
{
|
||||||
struct omap_hwmod *oh[2];
|
struct omap_hwmod *oh[2];
|
||||||
struct omap_device *od;
|
struct platform_device *pdev;
|
||||||
int bus_id = -1;
|
int bus_id = -1;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
@ -522,11 +522,11 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
|
pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
|
||||||
(void *)&usbhs_data, sizeof(usbhs_data),
|
(void *)&usbhs_data, sizeof(usbhs_data),
|
||||||
omap_uhhtll_latency,
|
omap_uhhtll_latency,
|
||||||
ARRAY_SIZE(omap_uhhtll_latency), false);
|
ARRAY_SIZE(omap_uhhtll_latency), false);
|
||||||
if (IS_ERR(od)) {
|
if (IS_ERR(pdev)) {
|
||||||
pr_err("Could not build hwmod devices %s,%s\n",
|
pr_err("Could not build hwmod devices %s,%s\n",
|
||||||
USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
|
USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
|
||||||
return;
|
return;
|
||||||
|
|
|
@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void)
|
||||||
* XXX Will depend on the process, validation, and binning
|
* XXX Will depend on the process, validation, and binning
|
||||||
* for the currently-running IC
|
* for the currently-running IC
|
||||||
*/
|
*/
|
||||||
|
#ifdef CONFIG_PM_OPP
|
||||||
if (cpu_is_omap3630()) {
|
if (cpu_is_omap3630()) {
|
||||||
omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
|
omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
|
||||||
omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
|
omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
|
||||||
|
@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void)
|
||||||
omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
|
omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
|
||||||
omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
|
omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
if (cpu_is_omap3517() || cpu_is_omap3505())
|
if (cpu_is_omap3517() || cpu_is_omap3505())
|
||||||
voltdms = voltagedomains_am35xx;
|
voltdms = voltagedomains_am35xx;
|
||||||
|
|
|
@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void)
|
||||||
* XXX Will depend on the process, validation, and binning
|
* XXX Will depend on the process, validation, and binning
|
||||||
* for the currently-running IC
|
* for the currently-running IC
|
||||||
*/
|
*/
|
||||||
|
#ifdef CONFIG_PM_OPP
|
||||||
omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
|
omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
|
||||||
omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
|
omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
|
||||||
omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
|
omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
|
||||||
|
#endif
|
||||||
|
|
||||||
for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
|
for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
|
||||||
voltdm->sys_clk.name = sys_clk_name;
|
voltdm->sys_clk.name = sys_clk_name;
|
||||||
|
|
|
@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
extern struct syscore_ops pxa_irq_syscore_ops;
|
extern struct syscore_ops pxa_irq_syscore_ops;
|
||||||
extern struct syscore_ops pxa_gpio_syscore_ops;
|
|
||||||
extern struct syscore_ops pxa2xx_mfp_syscore_ops;
|
extern struct syscore_ops pxa2xx_mfp_syscore_ops;
|
||||||
extern struct syscore_ops pxa3xx_mfp_syscore_ops;
|
extern struct syscore_ops pxa3xx_mfp_syscore_ops;
|
||||||
|
|
||||||
|
|
|
@ -45,6 +45,7 @@
|
||||||
#include <mach/hx4700.h>
|
#include <mach/hx4700.h>
|
||||||
#include <mach/irda.h>
|
#include <mach/irda.h>
|
||||||
|
|
||||||
|
#include <sound/ak4641.h>
|
||||||
#include <video/platform_lcd.h>
|
#include <video/platform_lcd.h>
|
||||||
#include <video/w100fb.h>
|
#include <video/w100fb.h>
|
||||||
|
|
||||||
|
@ -764,6 +765,28 @@ static struct i2c_board_info __initdata pi2c_board_info[] = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Asahi Kasei AK4641 on I2C
|
||||||
|
*/
|
||||||
|
|
||||||
|
static struct ak4641_platform_data ak4641_info = {
|
||||||
|
.gpio_power = GPIO27_HX4700_CODEC_ON,
|
||||||
|
.gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct i2c_board_info i2c_board_info[] __initdata = {
|
||||||
|
{
|
||||||
|
I2C_BOARD_INFO("ak4641", 0x12),
|
||||||
|
.platform_data = &ak4641_info,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device audio = {
|
||||||
|
.name = "hx4700-audio",
|
||||||
|
.id = -1,
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* PCMCIA
|
* PCMCIA
|
||||||
*/
|
*/
|
||||||
|
@ -790,6 +813,7 @@ static struct platform_device *devices[] __initdata = {
|
||||||
&gpio_vbus,
|
&gpio_vbus,
|
||||||
&power_supply,
|
&power_supply,
|
||||||
&strataflash,
|
&strataflash,
|
||||||
|
&audio,
|
||||||
&pcmcia,
|
&pcmcia,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -827,6 +851,7 @@ static void __init hx4700_init(void)
|
||||||
pxa_set_ficp_info(&ficp_info);
|
pxa_set_ficp_info(&ficp_info);
|
||||||
pxa27x_set_i2c_power_info(NULL);
|
pxa27x_set_i2c_power_info(NULL);
|
||||||
pxa_set_i2c_info(NULL);
|
pxa_set_i2c_info(NULL);
|
||||||
|
i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
|
||||||
i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
|
i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
|
||||||
pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
|
pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
|
||||||
spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
|
spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
|
||||||
|
|
|
@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
/* running before pxa_gpio_probe() */
|
||||||
|
#ifdef CONFIG_CPU_PXA26x
|
||||||
|
pxa_last_gpio = 89;
|
||||||
|
#else
|
||||||
|
pxa_last_gpio = 84;
|
||||||
|
#endif
|
||||||
for (i = 0; i <= pxa_last_gpio; i++)
|
for (i = 0; i <= pxa_last_gpio; i++)
|
||||||
gpio_desc[i].valid = 1;
|
gpio_desc[i].valid = 1;
|
||||||
|
|
||||||
|
@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void)
|
||||||
{
|
{
|
||||||
int i, gpio;
|
int i, gpio;
|
||||||
|
|
||||||
|
pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
|
||||||
for (i = 0; i <= pxa_last_gpio; i++) {
|
for (i = 0; i <= pxa_last_gpio; i++) {
|
||||||
/* skip GPIO2, 5, 6, 7, 8, they are not
|
/* skip GPIO2, 5, 6, 7, 8, they are not
|
||||||
* valid pins allow configuration
|
* valid pins allow configuration
|
||||||
|
|
|
@ -25,7 +25,6 @@
|
||||||
#include <linux/suspend.h>
|
#include <linux/suspend.h>
|
||||||
#include <linux/syscore_ops.h>
|
#include <linux/syscore_ops.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/gpio.h>
|
|
||||||
|
|
||||||
#include <asm/mach/map.h>
|
#include <asm/mach/map.h>
|
||||||
#include <asm/suspend.h>
|
#include <asm/suspend.h>
|
||||||
|
@ -209,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
|
||||||
INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
|
INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
|
||||||
INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
|
INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
|
||||||
INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
|
INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
|
||||||
|
INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clk_lookup pxa25x_hwuart_clkreg =
|
static struct clk_lookup pxa25x_hwuart_clkreg =
|
||||||
|
@ -368,7 +368,6 @@ static int __init pxa25x_init(void)
|
||||||
|
|
||||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||||
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
||||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
|
||||||
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
||||||
|
|
||||||
ret = platform_add_devices(pxa25x_devices,
|
ret = platform_add_devices(pxa25x_devices,
|
||||||
|
|
|
@ -22,7 +22,6 @@
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/i2c/pxa-i2c.h>
|
#include <linux/i2c/pxa-i2c.h>
|
||||||
#include <linux/gpio.h>
|
|
||||||
|
|
||||||
#include <asm/mach/map.h>
|
#include <asm/mach/map.h>
|
||||||
#include <mach/hardware.h>
|
#include <mach/hardware.h>
|
||||||
|
@ -230,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
|
||||||
INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
|
INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
|
||||||
INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
|
INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
|
||||||
INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
|
INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
|
||||||
|
INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
|
||||||
};
|
};
|
||||||
|
|
||||||
#ifdef CONFIG_PM
|
#ifdef CONFIG_PM
|
||||||
|
@ -456,7 +456,6 @@ static int __init pxa27x_init(void)
|
||||||
|
|
||||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||||
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
||||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
|
||||||
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
||||||
|
|
||||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||||
|
|
|
@ -462,7 +462,6 @@ static int __init pxa3xx_init(void)
|
||||||
|
|
||||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||||
register_syscore_ops(&pxa3xx_mfp_syscore_ops);
|
register_syscore_ops(&pxa3xx_mfp_syscore_ops);
|
||||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
|
||||||
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
||||||
|
|
||||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||||
|
|
|
@ -283,7 +283,6 @@ static int __init pxa95x_init(void)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
|
||||||
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
||||||
|
|
||||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||||
|
|
|
@ -15,7 +15,6 @@
|
||||||
#include <linux/i2c.h>
|
#include <linux/i2c.h>
|
||||||
#include <linux/i2c/pxa-i2c.h>
|
#include <linux/i2c/pxa-i2c.h>
|
||||||
#include <linux/mfd/88pm860x.h>
|
#include <linux/mfd/88pm860x.h>
|
||||||
#include <linux/gpio.h>
|
|
||||||
|
|
||||||
#include <asm/mach-types.h>
|
#include <asm/mach-types.h>
|
||||||
#include <asm/mach/arch.h>
|
#include <asm/mach/arch.h>
|
||||||
|
|
|
@ -168,6 +168,7 @@ struct battery_thresh sharpsl_battery_levels_noac[] = {
|
||||||
#define MAXCTRL_SEL_SH 4
|
#define MAXCTRL_SEL_SH 4
|
||||||
#define MAXCTRL_STR (1u << 7)
|
#define MAXCTRL_STR (1u << 7)
|
||||||
|
|
||||||
|
extern int max1111_read_channel(int);
|
||||||
/*
|
/*
|
||||||
* Read MAX1111 ADC
|
* Read MAX1111 ADC
|
||||||
*/
|
*/
|
||||||
|
@ -177,8 +178,6 @@ int sharpsl_pm_pxa_read_max1111(int channel)
|
||||||
if (machine_is_tosa())
|
if (machine_is_tosa())
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
extern int max1111_read_channel(int);
|
|
||||||
|
|
||||||
/* max1111 accepts channels from 0-3, however,
|
/* max1111 accepts channels from 0-3, however,
|
||||||
* it is encoded from 0-7 here in the code.
|
* it is encoded from 0-7 here in the code.
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -172,10 +172,9 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
|
||||||
static unsigned long spitz_charger_wakeup(void)
|
static unsigned long spitz_charger_wakeup(void)
|
||||||
{
|
{
|
||||||
unsigned long ret;
|
unsigned long ret;
|
||||||
ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
|
ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT)
|
||||||
<< GPIO_bit(SPITZ_GPIO_KEY_INT))
|
<< GPIO_bit(SPITZ_GPIO_KEY_INT))
|
||||||
| (!gpio_get_value(SPITZ_GPIO_SYNC)
|
| gpio_get_value(SPITZ_GPIO_SYNC));
|
||||||
<< GPIO_bit(SPITZ_GPIO_SYNC));
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -12,6 +12,6 @@
|
||||||
#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
|
#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
|
||||||
#define __ARCH_ARM_MACH_S3C2440_COMMON_H
|
#define __ARCH_ARM_MACH_S3C2440_COMMON_H
|
||||||
|
|
||||||
void s3c2440_restart(char mode, const char *cmd);
|
void s3c244x_restart(char mode, const char *cmd);
|
||||||
|
|
||||||
#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
|
#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
|
||||||
|
|
|
@ -487,5 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
|
||||||
.init_machine = anubis_init,
|
.init_machine = anubis_init,
|
||||||
.init_irq = s3c24xx_init_irq,
|
.init_irq = s3c24xx_init_irq,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
|
||||||
.init_machine = at2440evb_init,
|
.init_machine = at2440evb_init,
|
||||||
.init_irq = s3c24xx_init_irq,
|
.init_irq = s3c24xx_init_irq,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
|
||||||
.init_irq = s3c24xx_init_irq,
|
.init_irq = s3c24xx_init_irq,
|
||||||
.init_machine = gta02_machine_init,
|
.init_machine = gta02_machine_init,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
|
||||||
.init_machine = mini2440_init,
|
.init_machine = mini2440_init,
|
||||||
.init_irq = s3c24xx_init_irq,
|
.init_irq = s3c24xx_init_irq,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
|
||||||
.init_machine = nexcoder_init,
|
.init_machine = nexcoder_init,
|
||||||
.init_irq = s3c24xx_init_irq,
|
.init_irq = s3c24xx_init_irq,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
|
||||||
.init_irq = s3c24xx_init_irq,
|
.init_irq = s3c24xx_init_irq,
|
||||||
.init_machine = osiris_init,
|
.init_machine = osiris_init,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
|
||||||
.init_irq = s3c24xx_init_irq,
|
.init_irq = s3c24xx_init_irq,
|
||||||
.init_machine = rx1950_init_machine,
|
.init_machine = rx1950_init_machine,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
|
||||||
.init_irq = rx3715_init_irq,
|
.init_irq = rx3715_init_irq,
|
||||||
.init_machine = rx3715_init_machine,
|
.init_machine = rx3715_init_machine,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
|
||||||
.map_io = smdk2440_map_io,
|
.map_io = smdk2440_map_io,
|
||||||
.init_machine = smdk2440_machine_init,
|
.init_machine = smdk2440_machine_init,
|
||||||
.timer = &s3c24xx_timer,
|
.timer = &s3c24xx_timer,
|
||||||
.restart = s3c2440_restart,
|
.restart = s3c244x_restart,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
|
@ -35,7 +35,6 @@
|
||||||
#include <plat/cpu.h>
|
#include <plat/cpu.h>
|
||||||
#include <plat/s3c244x.h>
|
#include <plat/s3c244x.h>
|
||||||
#include <plat/pm.h>
|
#include <plat/pm.h>
|
||||||
#include <plat/watchdog-reset.h>
|
|
||||||
|
|
||||||
#include <plat/gpio-core.h>
|
#include <plat/gpio-core.h>
|
||||||
#include <plat/gpio-cfg.h>
|
#include <plat/gpio-cfg.h>
|
||||||
|
@ -74,15 +73,3 @@ void __init s3c2440_map_io(void)
|
||||||
s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
|
s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
|
||||||
s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
|
s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
|
||||||
}
|
}
|
||||||
|
|
||||||
void s3c2440_restart(char mode, const char *cmd)
|
|
||||||
{
|
|
||||||
if (mode == 's') {
|
|
||||||
soft_restart(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
arch_wdt_reset();
|
|
||||||
|
|
||||||
/* we'll take a jump through zero as a poor second */
|
|
||||||
soft_restart(0);
|
|
||||||
}
|
|
||||||
|
|
|
@ -46,6 +46,7 @@
|
||||||
#include <plat/pm.h>
|
#include <plat/pm.h>
|
||||||
#include <plat/pll.h>
|
#include <plat/pll.h>
|
||||||
#include <plat/nand-core.h>
|
#include <plat/nand-core.h>
|
||||||
|
#include <plat/watchdog-reset.h>
|
||||||
|
|
||||||
static struct map_desc s3c244x_iodesc[] __initdata = {
|
static struct map_desc s3c244x_iodesc[] __initdata = {
|
||||||
IODESC_ENT(CLKPWR),
|
IODESC_ENT(CLKPWR),
|
||||||
|
@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
|
||||||
.suspend = s3c244x_suspend,
|
.suspend = s3c244x_suspend,
|
||||||
.resume = s3c244x_resume,
|
.resume = s3c244x_resume,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
void s3c244x_restart(char mode, const char *cmd)
|
||||||
|
{
|
||||||
|
if (mode == 's')
|
||||||
|
soft_restart(0);
|
||||||
|
|
||||||
|
arch_wdt_reset();
|
||||||
|
|
||||||
|
/* we'll take a jump through zero as a poor second */
|
||||||
|
soft_restart(0);
|
||||||
|
}
|
||||||
|
|
|
@ -30,6 +30,7 @@
|
||||||
#include <linux/serial_sci.h>
|
#include <linux/serial_sci.h>
|
||||||
#include <linux/smsc911x.h>
|
#include <linux/smsc911x.h>
|
||||||
#include <linux/gpio.h>
|
#include <linux/gpio.h>
|
||||||
|
#include <linux/videodev2.h>
|
||||||
#include <linux/input.h>
|
#include <linux/input.h>
|
||||||
#include <linux/input/sh_keysc.h>
|
#include <linux/input/sh_keysc.h>
|
||||||
#include <linux/mmc/host.h>
|
#include <linux/mmc/host.h>
|
||||||
|
@ -37,7 +38,6 @@
|
||||||
#include <linux/mmc/sh_mobile_sdhi.h>
|
#include <linux/mmc/sh_mobile_sdhi.h>
|
||||||
#include <linux/mfd/tmio.h>
|
#include <linux/mfd/tmio.h>
|
||||||
#include <linux/sh_clk.h>
|
#include <linux/sh_clk.h>
|
||||||
#include <linux/dma-mapping.h>
|
|
||||||
#include <video/sh_mobile_lcdc.h>
|
#include <video/sh_mobile_lcdc.h>
|
||||||
#include <video/sh_mipi_dsi.h>
|
#include <video/sh_mipi_dsi.h>
|
||||||
#include <sound/sh_fsi.h>
|
#include <sound/sh_fsi.h>
|
||||||
|
@ -159,19 +159,12 @@ static struct resource sh_mmcif_resources[] = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct sh_mmcif_dma sh_mmcif_dma = {
|
|
||||||
.chan_priv_rx = {
|
|
||||||
.slave_id = SHDMA_SLAVE_MMCIF_RX,
|
|
||||||
},
|
|
||||||
.chan_priv_tx = {
|
|
||||||
.slave_id = SHDMA_SLAVE_MMCIF_TX,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
static struct sh_mmcif_plat_data sh_mmcif_platdata = {
|
static struct sh_mmcif_plat_data sh_mmcif_platdata = {
|
||||||
.sup_pclk = 0,
|
.sup_pclk = 0,
|
||||||
.ocr = MMC_VDD_165_195,
|
.ocr = MMC_VDD_165_195,
|
||||||
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
|
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
|
||||||
.dma = &sh_mmcif_dma,
|
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
|
||||||
|
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct platform_device mmc_device = {
|
static struct platform_device mmc_device = {
|
||||||
|
@ -321,12 +314,11 @@ static struct resource mipidsi0_resources[] = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
#define DSI0PHYCR 0xe615006c
|
|
||||||
static int sh_mipi_set_dot_clock(struct platform_device *pdev,
|
static int sh_mipi_set_dot_clock(struct platform_device *pdev,
|
||||||
void __iomem *base,
|
void __iomem *base,
|
||||||
int enable)
|
int enable)
|
||||||
{
|
{
|
||||||
struct clk *pck;
|
struct clk *pck, *phy;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
pck = clk_get(&pdev->dev, "dsip_clk");
|
pck = clk_get(&pdev->dev, "dsip_clk");
|
||||||
|
@ -335,18 +327,27 @@ static int sh_mipi_set_dot_clock(struct platform_device *pdev,
|
||||||
goto sh_mipi_set_dot_clock_pck_err;
|
goto sh_mipi_set_dot_clock_pck_err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
phy = clk_get(&pdev->dev, "dsiphy_clk");
|
||||||
|
if (IS_ERR(phy)) {
|
||||||
|
ret = PTR_ERR(phy);
|
||||||
|
goto sh_mipi_set_dot_clock_phy_err;
|
||||||
|
}
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
clk_set_rate(pck, clk_round_rate(pck, 24000000));
|
clk_set_rate(pck, clk_round_rate(pck, 24000000));
|
||||||
__raw_writel(0x2a809010, DSI0PHYCR);
|
clk_set_rate(phy, clk_round_rate(pck, 510000000));
|
||||||
clk_enable(pck);
|
clk_enable(pck);
|
||||||
|
clk_enable(phy);
|
||||||
} else {
|
} else {
|
||||||
clk_disable(pck);
|
clk_disable(pck);
|
||||||
|
clk_disable(phy);
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = 0;
|
ret = 0;
|
||||||
|
|
||||||
|
clk_put(phy);
|
||||||
|
sh_mipi_set_dot_clock_phy_err:
|
||||||
clk_put(pck);
|
clk_put(pck);
|
||||||
|
|
||||||
sh_mipi_set_dot_clock_pck_err:
|
sh_mipi_set_dot_clock_pck_err:
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -295,15 +295,6 @@ static struct resource sh_mmcif_resources[] = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct sh_mmcif_dma sh_mmcif_dma = {
|
|
||||||
.chan_priv_rx = {
|
|
||||||
.slave_id = SHDMA_SLAVE_MMCIF_RX,
|
|
||||||
},
|
|
||||||
.chan_priv_tx = {
|
|
||||||
.slave_id = SHDMA_SLAVE_MMCIF_TX,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||||
.sup_pclk = 0,
|
.sup_pclk = 0,
|
||||||
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||||
|
@ -311,7 +302,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||||
MMC_CAP_8_BIT_DATA |
|
MMC_CAP_8_BIT_DATA |
|
||||||
MMC_CAP_NEEDS_POLL,
|
MMC_CAP_NEEDS_POLL,
|
||||||
.get_cd = slot_cn7_get_cd,
|
.get_cd = slot_cn7_get_cd,
|
||||||
.dma = &sh_mmcif_dma,
|
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
|
||||||
|
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct platform_device sh_mmcif_device = {
|
static struct platform_device sh_mmcif_device = {
|
||||||
|
|
|
@ -143,11 +143,10 @@ static struct gpio_keys_button gpio_buttons[] = {
|
||||||
static struct gpio_keys_platform_data gpio_key_info = {
|
static struct gpio_keys_platform_data gpio_key_info = {
|
||||||
.buttons = gpio_buttons,
|
.buttons = gpio_buttons,
|
||||||
.nbuttons = ARRAY_SIZE(gpio_buttons),
|
.nbuttons = ARRAY_SIZE(gpio_buttons),
|
||||||
.poll_interval = 250, /* polled for now */
|
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct platform_device gpio_keys_device = {
|
static struct platform_device gpio_keys_device = {
|
||||||
.name = "gpio-keys-polled", /* polled for now */
|
.name = "gpio-keys",
|
||||||
.id = -1,
|
.id = -1,
|
||||||
.dev = {
|
.dev = {
|
||||||
.platform_data = &gpio_key_info,
|
.platform_data = &gpio_key_info,
|
||||||
|
|
|
@ -43,7 +43,6 @@
|
||||||
#include <linux/smsc911x.h>
|
#include <linux/smsc911x.h>
|
||||||
#include <linux/sh_intc.h>
|
#include <linux/sh_intc.h>
|
||||||
#include <linux/tca6416_keypad.h>
|
#include <linux/tca6416_keypad.h>
|
||||||
#include <linux/usb/r8a66597.h>
|
|
||||||
#include <linux/usb/renesas_usbhs.h>
|
#include <linux/usb/renesas_usbhs.h>
|
||||||
#include <linux/dma-mapping.h>
|
#include <linux/dma-mapping.h>
|
||||||
|
|
||||||
|
@ -145,11 +144,6 @@
|
||||||
* 1-2 short | VBUS 5V | Host
|
* 1-2 short | VBUS 5V | Host
|
||||||
* open | external VBUS | Function
|
* open | external VBUS | Function
|
||||||
*
|
*
|
||||||
* *1
|
|
||||||
* CN31 is used as
|
|
||||||
* CONFIG_USB_R8A66597_HCD Host
|
|
||||||
* CONFIG_USB_RENESAS_USBHS Function
|
|
||||||
*
|
|
||||||
* CAUTION
|
* CAUTION
|
||||||
*
|
*
|
||||||
* renesas_usbhs driver can use external interrupt mode
|
* renesas_usbhs driver can use external interrupt mode
|
||||||
|
@ -161,15 +155,6 @@
|
||||||
* mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
|
* mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
|
||||||
* because Touchscreen is using IRQ7-PORT40.
|
* because Touchscreen is using IRQ7-PORT40.
|
||||||
* It is impossible to use IRQ7 demux on this board.
|
* It is impossible to use IRQ7 demux on this board.
|
||||||
*
|
|
||||||
* We can use external interrupt mode USB-Function on "USB1".
|
|
||||||
* USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
|
|
||||||
* But don't select both drivers in same time.
|
|
||||||
* These uses same IRQ number for request_irq(), and aren't supporting
|
|
||||||
* IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
|
|
||||||
*
|
|
||||||
* Actually these are old/new version of USB driver.
|
|
||||||
* This mean its register will be broken if it supports shared IRQ,
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -207,6 +192,16 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* FSI - AK4642
|
||||||
|
*
|
||||||
|
* it needs amixer settings for playing
|
||||||
|
*
|
||||||
|
* amixer set "Headphone" on
|
||||||
|
* amixer set "HPOUTL Mixer DACH" on
|
||||||
|
* amixer set "HPOUTR Mixer DACH" on
|
||||||
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* FIXME !!
|
* FIXME !!
|
||||||
*
|
*
|
||||||
|
@ -676,51 +671,16 @@ static struct platform_device usbhs0_device = {
|
||||||
* Use J30 to select between Host and Function. This setting
|
* Use J30 to select between Host and Function. This setting
|
||||||
* can however not be detected by software. Hotplug of USBHS1
|
* can however not be detected by software. Hotplug of USBHS1
|
||||||
* is provided via IRQ8.
|
* is provided via IRQ8.
|
||||||
|
*
|
||||||
|
* Current USB1 works as "USB Host".
|
||||||
|
* - set J30 "short"
|
||||||
|
*
|
||||||
|
* If you want to use it as "USB gadget",
|
||||||
|
* - J30 "open"
|
||||||
|
* - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
|
||||||
|
* - add .get_vbus = usbhs_get_vbus in usbhs1_private
|
||||||
*/
|
*/
|
||||||
#define IRQ8 evt2irq(0x0300)
|
#define IRQ8 evt2irq(0x0300)
|
||||||
|
|
||||||
/* USBHS1 USB Host support via r8a66597_hcd */
|
|
||||||
static void usb1_host_port_power(int port, int power)
|
|
||||||
{
|
|
||||||
if (!power) /* only power-on is supported for now */
|
|
||||||
return;
|
|
||||||
|
|
||||||
/* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
|
|
||||||
__raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct r8a66597_platdata usb1_host_data = {
|
|
||||||
.on_chip = 1,
|
|
||||||
.port_power = usb1_host_port_power,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource usb1_host_resources[] = {
|
|
||||||
[0] = {
|
|
||||||
.name = "USBHS1",
|
|
||||||
.start = 0xe68b0000,
|
|
||||||
.end = 0xe68b00e6 - 1,
|
|
||||||
.flags = IORESOURCE_MEM,
|
|
||||||
},
|
|
||||||
[1] = {
|
|
||||||
.start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
|
|
||||||
.flags = IORESOURCE_IRQ,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device usb1_host_device = {
|
|
||||||
.name = "r8a66597_hcd",
|
|
||||||
.id = 1,
|
|
||||||
.dev = {
|
|
||||||
.dma_mask = NULL, /* not use dma */
|
|
||||||
.coherent_dma_mask = 0xffffffff,
|
|
||||||
.platform_data = &usb1_host_data,
|
|
||||||
},
|
|
||||||
.num_resources = ARRAY_SIZE(usb1_host_resources),
|
|
||||||
.resource = usb1_host_resources,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* USBHS1 USB Function support via renesas_usbhs */
|
|
||||||
|
|
||||||
#define USB_PHY_MODE (1 << 4)
|
#define USB_PHY_MODE (1 << 4)
|
||||||
#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
|
#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
|
||||||
#define USB_PHY_ON (1 << 1)
|
#define USB_PHY_ON (1 << 1)
|
||||||
|
@ -776,7 +736,7 @@ static void usbhs1_hardware_exit(struct platform_device *pdev)
|
||||||
|
|
||||||
static int usbhs1_get_id(struct platform_device *pdev)
|
static int usbhs1_get_id(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
return USBHS_GADGET;
|
return USBHS_HOST;
|
||||||
}
|
}
|
||||||
|
|
||||||
static u32 usbhs1_pipe_cfg[] = {
|
static u32 usbhs1_pipe_cfg[] = {
|
||||||
|
@ -807,7 +767,6 @@ static struct usbhs_private usbhs1_private = {
|
||||||
.hardware_exit = usbhs1_hardware_exit,
|
.hardware_exit = usbhs1_hardware_exit,
|
||||||
.get_id = usbhs1_get_id,
|
.get_id = usbhs1_get_id,
|
||||||
.phy_reset = usbhs_phy_reset,
|
.phy_reset = usbhs_phy_reset,
|
||||||
.get_vbus = usbhs_get_vbus,
|
|
||||||
},
|
},
|
||||||
.driver_param = {
|
.driver_param = {
|
||||||
.buswait_bwait = 4,
|
.buswait_bwait = 4,
|
||||||
|
@ -1184,15 +1143,6 @@ static struct resource sh_mmcif_resources[] = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct sh_mmcif_dma sh_mmcif_dma = {
|
|
||||||
.chan_priv_rx = {
|
|
||||||
.slave_id = SHDMA_SLAVE_MMCIF_RX,
|
|
||||||
},
|
|
||||||
.chan_priv_tx = {
|
|
||||||
.slave_id = SHDMA_SLAVE_MMCIF_TX,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||||
.sup_pclk = 0,
|
.sup_pclk = 0,
|
||||||
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||||
|
@ -1200,7 +1150,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
||||||
MMC_CAP_8_BIT_DATA |
|
MMC_CAP_8_BIT_DATA |
|
||||||
MMC_CAP_NEEDS_POLL,
|
MMC_CAP_NEEDS_POLL,
|
||||||
.get_cd = slot_cn7_get_cd,
|
.get_cd = slot_cn7_get_cd,
|
||||||
.dma = &sh_mmcif_dma,
|
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
|
||||||
|
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct platform_device sh_mmcif_device = {
|
static struct platform_device sh_mmcif_device = {
|
||||||
|
@ -1311,7 +1262,6 @@ static struct platform_device *mackerel_devices[] __initdata = {
|
||||||
&nor_flash_device,
|
&nor_flash_device,
|
||||||
&smc911x_device,
|
&smc911x_device,
|
||||||
&lcdc_device,
|
&lcdc_device,
|
||||||
&usb1_host_device,
|
|
||||||
&usbhs1_device,
|
&usbhs1_device,
|
||||||
&usbhs0_device,
|
&usbhs0_device,
|
||||||
&leds_device,
|
&leds_device,
|
||||||
|
@ -1473,9 +1423,6 @@ static void __init mackerel_init(void)
|
||||||
gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
|
gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
|
||||||
gpio_request(GPIO_FN_IDIN_1_113, NULL);
|
gpio_request(GPIO_FN_IDIN_1_113, NULL);
|
||||||
|
|
||||||
/* USB phy tweak to make the r8a66597_hcd host driver work */
|
|
||||||
__raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */
|
|
||||||
|
|
||||||
/* enable FSI2 port A (ak4643) */
|
/* enable FSI2 port A (ak4643) */
|
||||||
gpio_request(GPIO_FN_FSIAIBT, NULL);
|
gpio_request(GPIO_FN_FSIAIBT, NULL);
|
||||||
gpio_request(GPIO_FN_FSIAILR, NULL);
|
gpio_request(GPIO_FN_FSIAILR, NULL);
|
||||||
|
|
|
@ -365,6 +365,114 @@ static struct clk div6_clks[DIV6_NR] = {
|
||||||
dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
|
dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* DSI DIV */
|
||||||
|
static unsigned long dsiphy_recalc(struct clk *clk)
|
||||||
|
{
|
||||||
|
u32 value;
|
||||||
|
|
||||||
|
value = __raw_readl(clk->mapping->base);
|
||||||
|
|
||||||
|
/* FIXME */
|
||||||
|
if (!(value & 0x000B8000))
|
||||||
|
return clk->parent->rate;
|
||||||
|
|
||||||
|
value &= 0x3f;
|
||||||
|
value += 1;
|
||||||
|
|
||||||
|
if ((value < 12) ||
|
||||||
|
(value > 33)) {
|
||||||
|
pr_err("DSIPHY has wrong value (%d)", value);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
return clk->parent->rate / value;
|
||||||
|
}
|
||||||
|
|
||||||
|
static long dsiphy_round_rate(struct clk *clk, unsigned long rate)
|
||||||
|
{
|
||||||
|
return clk_rate_mult_range_round(clk, 12, 33, rate);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void dsiphy_disable(struct clk *clk)
|
||||||
|
{
|
||||||
|
u32 value;
|
||||||
|
|
||||||
|
value = __raw_readl(clk->mapping->base);
|
||||||
|
value &= ~0x000B8000;
|
||||||
|
|
||||||
|
__raw_writel(value , clk->mapping->base);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int dsiphy_enable(struct clk *clk)
|
||||||
|
{
|
||||||
|
u32 value;
|
||||||
|
int multi;
|
||||||
|
|
||||||
|
value = __raw_readl(clk->mapping->base);
|
||||||
|
multi = (value & 0x3f) + 1;
|
||||||
|
|
||||||
|
if ((multi < 12) || (multi > 33))
|
||||||
|
return -EIO;
|
||||||
|
|
||||||
|
__raw_writel(value | 0x000B8000, clk->mapping->base);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int dsiphy_set_rate(struct clk *clk, unsigned long rate)
|
||||||
|
{
|
||||||
|
u32 value;
|
||||||
|
int idx;
|
||||||
|
|
||||||
|
idx = rate / clk->parent->rate;
|
||||||
|
if ((idx < 12) || (idx > 33))
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
idx += -1;
|
||||||
|
|
||||||
|
value = __raw_readl(clk->mapping->base);
|
||||||
|
value = (value & ~0x3f) + idx;
|
||||||
|
|
||||||
|
__raw_writel(value, clk->mapping->base);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct clk_ops dsiphy_clk_ops = {
|
||||||
|
.recalc = dsiphy_recalc,
|
||||||
|
.round_rate = dsiphy_round_rate,
|
||||||
|
.set_rate = dsiphy_set_rate,
|
||||||
|
.enable = dsiphy_enable,
|
||||||
|
.disable = dsiphy_disable,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct clk_mapping dsi0phy_clk_mapping = {
|
||||||
|
.phys = DSI0PHYCR,
|
||||||
|
.len = 4,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct clk_mapping dsi1phy_clk_mapping = {
|
||||||
|
.phys = DSI1PHYCR,
|
||||||
|
.len = 4,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct clk dsi0phy_clk = {
|
||||||
|
.ops = &dsiphy_clk_ops,
|
||||||
|
.parent = &div6_clks[DIV6_DSI0P], /* late install */
|
||||||
|
.mapping = &dsi0phy_clk_mapping,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct clk dsi1phy_clk = {
|
||||||
|
.ops = &dsiphy_clk_ops,
|
||||||
|
.parent = &div6_clks[DIV6_DSI1P], /* late install */
|
||||||
|
.mapping = &dsi1phy_clk_mapping,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct clk *late_main_clks[] = {
|
||||||
|
&dsi0phy_clk,
|
||||||
|
&dsi1phy_clk,
|
||||||
|
};
|
||||||
|
|
||||||
enum { MSTP001,
|
enum { MSTP001,
|
||||||
MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
|
MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
|
||||||
MSTP219,
|
MSTP219,
|
||||||
|
@ -429,6 +537,8 @@ static struct clk_lookup lookups[] = {
|
||||||
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
|
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
|
||||||
CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
|
CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
|
||||||
CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
|
CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
|
||||||
|
CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
|
||||||
|
CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
|
||||||
|
|
||||||
/* MSTP32 clocks */
|
/* MSTP32 clocks */
|
||||||
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
|
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
|
||||||
|
@ -504,6 +614,9 @@ void __init sh73a0_clock_init(void)
|
||||||
if (!ret)
|
if (!ret)
|
||||||
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
|
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
|
||||||
|
|
||||||
|
for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
|
||||||
|
ret = clk_register(late_main_clks[k]);
|
||||||
|
|
||||||
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
|
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
|
||||||
|
|
||||||
if (!ret)
|
if (!ret)
|
||||||
|
|
|
@ -515,8 +515,8 @@ enum {
|
||||||
SHDMA_SLAVE_MMCIF_RX,
|
SHDMA_SLAVE_MMCIF_RX,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* PINT interrupts are located at Linux IRQ 768 and up */
|
/* PINT interrupts are located at Linux IRQ 800 and up */
|
||||||
#define SH73A0_PINT0_IRQ(irq) ((irq) + 768)
|
#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
|
||||||
#define SH73A0_PINT1_IRQ(irq) ((irq) + 800)
|
#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
|
||||||
|
|
||||||
#endif /* __ASM_SH73A0_H__ */
|
#endif /* __ASM_SH73A0_H__ */
|
||||||
|
|
|
@ -19,6 +19,7 @@
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
|
#include <linux/module.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/sh_intc.h>
|
#include <linux/sh_intc.h>
|
||||||
|
@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void)
|
||||||
setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
|
setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
|
||||||
|
|
||||||
n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
|
n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
|
||||||
|
WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n);
|
||||||
irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
|
irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
|
||||||
handle_level_irq, "level");
|
handle_level_irq, "level");
|
||||||
set_irq_flags(n, IRQF_VALID); /* yuck */
|
set_irq_flags(n, IRQF_VALID); /* yuck */
|
||||||
|
|
|
@ -2120,7 +2120,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||||
FN_AUDATA3, 0, 0, 0 }
|
FN_AUDATA3, 0, 0, 0 }
|
||||||
},
|
},
|
||||||
{ PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
|
{ PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
|
||||||
3, 1, 1, 1, 1, 1, 1, 3, 3, 1,
|
3, 1, 1, 1, 1, 1, 1, 3, 3,
|
||||||
1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
|
1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
|
||||||
/* IP4_31_29 [3] */
|
/* IP4_31_29 [3] */
|
||||||
FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,
|
FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,
|
||||||
|
|
|
@ -23,6 +23,7 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/gpio.h>
|
#include <linux/gpio.h>
|
||||||
|
#include <mach/irqs.h>
|
||||||
#include <mach/sh7372.h>
|
#include <mach/sh7372.h>
|
||||||
|
|
||||||
#define CPU_ALL_PORT(fn, pfx, sfx) \
|
#define CPU_ALL_PORT(fn, pfx, sfx) \
|
||||||
|
@ -1594,6 +1595,43 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
|
||||||
{ },
|
{ },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
|
||||||
|
#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
|
||||||
|
static struct pinmux_irq pinmux_irqs[] = {
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(0), PORT6_FN0, PORT162_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(1), PORT12_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(2), PORT4_FN0, PORT5_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(3), PORT8_FN0, PORT16_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(4), PORT17_FN0, PORT163_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(5), PORT18_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(6), PORT39_FN0, PORT164_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(7), PORT40_FN0, PORT167_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(8), PORT41_FN0, PORT168_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(9), PORT42_FN0, PORT169_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(10), PORT65_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(11), PORT67_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(12), PORT80_FN0, PORT137_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(13), PORT81_FN0, PORT145_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(14), PORT82_FN0, PORT146_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16L(15), PORT83_FN0, PORT147_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(16), PORT84_FN0, PORT170_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(17), PORT85_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(18), PORT86_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(19), PORT87_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(20), PORT92_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(21), PORT93_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(22), PORT94_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(23), PORT95_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(24), PORT112_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(25), PORT119_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(26), PORT121_FN0, PORT172_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(27), PORT122_FN0, PORT180_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(28), PORT123_FN0, PORT181_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(29), PORT129_FN0, PORT182_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(30), PORT130_FN0, PORT183_FN0),
|
||||||
|
PINMUX_IRQ(EXT_IRQ16H(31), PORT138_FN0, PORT184_FN0),
|
||||||
|
};
|
||||||
|
|
||||||
static struct pinmux_info sh7372_pinmux_info = {
|
static struct pinmux_info sh7372_pinmux_info = {
|
||||||
.name = "sh7372_pfc",
|
.name = "sh7372_pfc",
|
||||||
.reserved_id = PINMUX_RESERVED,
|
.reserved_id = PINMUX_RESERVED,
|
||||||
|
@ -1614,6 +1652,9 @@ static struct pinmux_info sh7372_pinmux_info = {
|
||||||
|
|
||||||
.gpio_data = pinmux_data,
|
.gpio_data = pinmux_data,
|
||||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||||
|
|
||||||
|
.gpio_irq = pinmux_irqs,
|
||||||
|
.gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
|
||||||
};
|
};
|
||||||
|
|
||||||
void sh7372_pinmux_init(void)
|
void sh7372_pinmux_init(void)
|
||||||
|
|
|
@ -80,7 +80,7 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
|
||||||
/* enable cache coherency */
|
/* enable cache coherency */
|
||||||
modify_scu_cpu_psr(0, 3 << (cpu * 8));
|
modify_scu_cpu_psr(0, 3 << (cpu * 8));
|
||||||
|
|
||||||
if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
|
if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
|
||||||
__raw_writel(1 << cpu, __io(WUPCR)); /* wake up */
|
__raw_writel(1 << cpu, __io(WUPCR)); /* wake up */
|
||||||
else
|
else
|
||||||
__raw_writel(1 << cpu, __io(SRESCR)); /* reset */
|
__raw_writel(1 << cpu, __io(SRESCR)); /* reset */
|
||||||
|
|
|
@ -5,7 +5,7 @@ config UX500_SOC_COMMON
|
||||||
default y
|
default y
|
||||||
select ARM_GIC
|
select ARM_GIC
|
||||||
select HAS_MTU
|
select HAS_MTU
|
||||||
select ARM_ERRATA_753970
|
select PL310_ERRATA_753970
|
||||||
select ARM_ERRATA_754322
|
select ARM_ERRATA_754322
|
||||||
select ARM_ERRATA_764369
|
select ARM_ERRATA_764369
|
||||||
|
|
||||||
|
|
|
@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4
|
||||||
select ARM_GIC
|
select ARM_GIC
|
||||||
select ARM_ERRATA_720789
|
select ARM_ERRATA_720789
|
||||||
select ARM_ERRATA_751472
|
select ARM_ERRATA_751472
|
||||||
select ARM_ERRATA_753970
|
select PL310_ERRATA_753970
|
||||||
select HAVE_SMP
|
select HAVE_SMP
|
||||||
select MIGHT_HAVE_CACHE_L2X0
|
select MIGHT_HAVE_CACHE_L2X0
|
||||||
|
|
||||||
|
|
|
@ -631,7 +631,8 @@ comment "Processor Features"
|
||||||
|
|
||||||
config ARM_LPAE
|
config ARM_LPAE
|
||||||
bool "Support for the Large Physical Address Extension"
|
bool "Support for the Large Physical Address Extension"
|
||||||
depends on MMU && CPU_V7
|
depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \
|
||||||
|
!CPU_32v4 && !CPU_32v3
|
||||||
help
|
help
|
||||||
Say Y if you have an ARMv7 processor supporting the LPAE page
|
Say Y if you have an ARMv7 processor supporting the LPAE page
|
||||||
table format and you would like to access memory beyond the
|
table format and you would like to access memory beyond the
|
||||||
|
|
|
@ -55,7 +55,7 @@ loop1:
|
||||||
cmp r1, #2 @ see what cache we have at this level
|
cmp r1, #2 @ see what cache we have at this level
|
||||||
blt skip @ skip if no cache, or just i-cache
|
blt skip @ skip if no cache, or just i-cache
|
||||||
#ifdef CONFIG_PREEMPT
|
#ifdef CONFIG_PREEMPT
|
||||||
save_and_disable_irqs r9 @ make cssr&csidr read atomic
|
save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic
|
||||||
#endif
|
#endif
|
||||||
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
|
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
|
||||||
isb @ isb to sych the new cssr&csidr
|
isb @ isb to sych the new cssr&csidr
|
||||||
|
|
|
@ -230,9 +230,7 @@ __v7_setup:
|
||||||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_ARM_ERRATA_743622
|
#ifdef CONFIG_ARM_ERRATA_743622
|
||||||
teq r6, #0x20 @ present in r2p0
|
teq r5, #0x00200000 @ only present in r2p*
|
||||||
teqne r6, #0x21 @ present in r2p1
|
|
||||||
teqne r6, #0x22 @ present in r2p2
|
|
||||||
mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
||||||
orreq r10, r10, #1 << 6 @ set bit #6
|
orreq r10, r10, #1 << 6 @ set bit #6
|
||||||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||||
|
|
|
@ -69,6 +69,7 @@ void __init omap_reserve(void)
|
||||||
omap_vram_reserve_sdram_memblock();
|
omap_vram_reserve_sdram_memblock();
|
||||||
omap_dsp_reserve_sdram_memblock();
|
omap_dsp_reserve_sdram_memblock();
|
||||||
omap_secure_ram_reserve_memblock();
|
omap_secure_ram_reserve_memblock();
|
||||||
|
omap_barrier_reserve_memblock();
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init omap_init_consistent_dma_size(void)
|
void __init omap_init_consistent_dma_size(void)
|
||||||
|
|
|
@ -428,8 +428,16 @@
|
||||||
#define OMAP_GPMC_NR_IRQS 8
|
#define OMAP_GPMC_NR_IRQS 8
|
||||||
#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
|
#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
|
||||||
|
|
||||||
|
/* PRCM IRQ handler */
|
||||||
|
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||||
|
#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
|
||||||
|
#define OMAP_PRCM_NR_IRQS 64
|
||||||
|
#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
|
||||||
|
#else
|
||||||
|
#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NR_IRQS OMAP_GPMC_IRQ_END
|
#define NR_IRQS OMAP_PRCM_IRQ_END
|
||||||
|
|
||||||
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
|
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
|
||||||
|
|
||||||
|
|
|
@ -10,4 +10,10 @@ static inline void omap_secure_ram_reserve_memblock(void)
|
||||||
{ }
|
{ }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_OMAP4_ERRATA_I688
|
||||||
|
extern int omap_barrier_reserve_memblock(void);
|
||||||
|
#else
|
||||||
|
static inline void omap_barrier_reserve_memblock(void)
|
||||||
|
{ }
|
||||||
|
#endif
|
||||||
#endif /* __OMAP_SECURE_H__ */
|
#endif /* __OMAP_SECURE_H__ */
|
||||||
|
|
|
@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
|
||||||
struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
|
struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
|
||||||
int channel;
|
int channel;
|
||||||
|
|
||||||
for (channel = dma_channels - 1; channel >= 0; cp++, channel--)
|
for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
|
||||||
s3c2410_dma_resume_chan(cp);
|
s3c2410_dma_resume_chan(cp);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1409,7 +1409,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
|
||||||
|
|
||||||
#ifdef CONFIG_S3C_DEV_USB_HSOTG
|
#ifdef CONFIG_S3C_DEV_USB_HSOTG
|
||||||
static struct resource s3c_usb_hsotg_resources[] = {
|
static struct resource s3c_usb_hsotg_resources[] = {
|
||||||
[0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
|
[0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
|
||||||
[1] = DEFINE_RES_IRQ(IRQ_OTG),
|
[1] = DEFINE_RES_IRQ(IRQ_OTG),
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode,
|
||||||
static int clockevent_next_event(unsigned long cycles,
|
static int clockevent_next_event(unsigned long cycles,
|
||||||
struct clock_event_device *clk_event_dev)
|
struct clock_event_device *clk_event_dev)
|
||||||
{
|
{
|
||||||
u16 val;
|
u16 val = readw(gpt_base + CR(CLKEVT));
|
||||||
|
|
||||||
|
if (val & CTRL_ENABLE)
|
||||||
|
writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
|
||||||
|
|
||||||
writew(cycles, gpt_base + LOAD(CLKEVT));
|
writew(cycles, gpt_base + LOAD(CLKEVT));
|
||||||
|
|
||||||
val = readw(gpt_base + CR(CLKEVT));
|
|
||||||
val |= CTRL_ENABLE | CTRL_INT_ENABLE;
|
val |= CTRL_ENABLE | CTRL_INT_ENABLE;
|
||||||
writew(val, gpt_base + CR(CLKEVT));
|
writew(val, gpt_base + CR(CLKEVT));
|
||||||
|
|
||||||
|
|
|
@ -13,7 +13,7 @@ obj-y += linked_dtb.o
|
||||||
endif
|
endif
|
||||||
|
|
||||||
$(obj)/%.dtb: $(src)/dts/%.dts FORCE
|
$(obj)/%.dtb: $(src)/dts/%.dts FORCE
|
||||||
$(call cmd,dtc)
|
$(call if_changed_dep,dtc)
|
||||||
|
|
||||||
quiet_cmd_cp = CP $< $@$2
|
quiet_cmd_cp = CP $< $@$2
|
||||||
cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
|
cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
|
||||||
|
|
|
@ -122,8 +122,8 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
|
||||||
|
|
||||||
extern unsigned long get_wchan(struct task_struct *p);
|
extern unsigned long get_wchan(struct task_struct *p);
|
||||||
|
|
||||||
#define KSTK_EIP(tsk) (task_pt_regs(task)->pc)
|
#define KSTK_EIP(task) (task_pt_regs(task)->pc)
|
||||||
#define KSTK_ESP(tsk) (task_pt_regs(task)->sp)
|
#define KSTK_ESP(task) (task_pt_regs(task)->sp)
|
||||||
|
|
||||||
#define cpu_relax() do { } while (0)
|
#define cpu_relax() do { } while (0)
|
||||||
|
|
||||||
|
|
|
@ -78,7 +78,8 @@
|
||||||
| CF_PAGE_READABLE \
|
| CF_PAGE_READABLE \
|
||||||
| CF_PAGE_WRITABLE \
|
| CF_PAGE_WRITABLE \
|
||||||
| CF_PAGE_EXEC \
|
| CF_PAGE_EXEC \
|
||||||
| CF_PAGE_SYSTEM)
|
| CF_PAGE_SYSTEM \
|
||||||
|
| CF_PAGE_SHARED)
|
||||||
|
|
||||||
#define PAGE_COPY __pgprot(CF_PAGE_VALID \
|
#define PAGE_COPY __pgprot(CF_PAGE_VALID \
|
||||||
| CF_PAGE_ACCESSED \
|
| CF_PAGE_ACCESSED \
|
||||||
|
|
|
@ -87,7 +87,7 @@ void __init paging_init(void)
|
||||||
|
|
||||||
int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
|
int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
|
||||||
{
|
{
|
||||||
unsigned long flags, mmuar;
|
unsigned long flags, mmuar, mmutr;
|
||||||
struct mm_struct *mm;
|
struct mm_struct *mm;
|
||||||
pgd_t *pgd;
|
pgd_t *pgd;
|
||||||
pmd_t *pmd;
|
pmd_t *pmd;
|
||||||
|
@ -137,9 +137,10 @@ int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
|
||||||
if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
|
if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
|
||||||
set_pte(pte, pte_wrprotect(*pte));
|
set_pte(pte, pte_wrprotect(*pte));
|
||||||
|
|
||||||
mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
|
mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V;
|
||||||
(((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
|
if ((mmuar < TASK_UNMAPPED_BASE) || (mmuar >= TASK_SIZE))
|
||||||
>> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
|
mmutr |= (pte->pte & CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT;
|
||||||
|
mmu_write(MMUTR, mmutr);
|
||||||
|
|
||||||
mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
|
mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
|
||||||
((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
|
((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
|
||||||
|
|
|
@ -136,7 +136,7 @@ Luser_return:
|
||||||
movel %sp,%d1 /* get thread_info pointer */
|
movel %sp,%d1 /* get thread_info pointer */
|
||||||
andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
|
andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
|
||||||
movel %d1,%a0
|
movel %d1,%a0
|
||||||
movel %a0@(TINFO_FLAGS),%d1 /* get thread_info->flags */
|
moveb %a0@(TINFO_FLAGS+3),%d1 /* thread_info->flags (low 8 bits) */
|
||||||
jne Lwork_to_do /* still work to do */
|
jne Lwork_to_do /* still work to do */
|
||||||
|
|
||||||
Lreturn:
|
Lreturn:
|
||||||
|
@ -148,8 +148,6 @@ Lwork_to_do:
|
||||||
btst #TIF_NEED_RESCHED,%d1
|
btst #TIF_NEED_RESCHED,%d1
|
||||||
jne reschedule
|
jne reschedule
|
||||||
|
|
||||||
/* GERG: do we need something here for TRACEing?? */
|
|
||||||
|
|
||||||
Lsignal_return:
|
Lsignal_return:
|
||||||
subql #4,%sp /* dummy return address */
|
subql #4,%sp /* dummy return address */
|
||||||
SAVE_SWITCH_STACK
|
SAVE_SWITCH_STACK
|
||||||
|
|
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Reference in a new issue