staging: sm750fb: change definition of POWER_MODE_CTRL multi-bit field
Use more straight-forward definitions for multi-bit field of POWER_MODE_CTRL register and use open-coded implementation for register manipulations. Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
776980cf0f
commit
f41b17fc3f
|
@ -21,7 +21,7 @@ static unsigned int getPowerMode(void)
|
||||||
{
|
{
|
||||||
if (getChipType() == SM750LE)
|
if (getChipType() == SM750LE)
|
||||||
return 0;
|
return 0;
|
||||||
return FIELD_GET(PEEK32(POWER_MODE_CTRL), POWER_MODE_CTRL, MODE);
|
return PEEK32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -33,25 +33,22 @@ void setPowerMode(unsigned int powerMode)
|
||||||
{
|
{
|
||||||
unsigned int control_value = 0;
|
unsigned int control_value = 0;
|
||||||
|
|
||||||
control_value = PEEK32(POWER_MODE_CTRL);
|
control_value = PEEK32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK;
|
||||||
|
|
||||||
if (getChipType() == SM750LE)
|
if (getChipType() == SM750LE)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
switch (powerMode) {
|
switch (powerMode) {
|
||||||
case POWER_MODE_CTRL_MODE_MODE0:
|
case POWER_MODE_CTRL_MODE_MODE0:
|
||||||
control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE,
|
control_value |= POWER_MODE_CTRL_MODE_MODE0;
|
||||||
MODE0);
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case POWER_MODE_CTRL_MODE_MODE1:
|
case POWER_MODE_CTRL_MODE_MODE1:
|
||||||
control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE,
|
control_value |= POWER_MODE_CTRL_MODE_MODE1;
|
||||||
MODE1);
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case POWER_MODE_CTRL_MODE_SLEEP:
|
case POWER_MODE_CTRL_MODE_SLEEP:
|
||||||
control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE,
|
control_value |= POWER_MODE_CTRL_MODE_SLEEP;
|
||||||
SLEEP);
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -501,10 +501,10 @@
|
||||||
#endif
|
#endif
|
||||||
#define POWER_MODE_CTRL_OSC_INPUT BIT(3)
|
#define POWER_MODE_CTRL_OSC_INPUT BIT(3)
|
||||||
#define POWER_MODE_CTRL_ACPI BIT(2)
|
#define POWER_MODE_CTRL_ACPI BIT(2)
|
||||||
#define POWER_MODE_CTRL_MODE 1:0
|
#define POWER_MODE_CTRL_MODE_MASK (0x3 << 0)
|
||||||
#define POWER_MODE_CTRL_MODE_MODE0 0
|
#define POWER_MODE_CTRL_MODE_MODE0 (0x0 << 0)
|
||||||
#define POWER_MODE_CTRL_MODE_MODE1 1
|
#define POWER_MODE_CTRL_MODE_MODE1 (0x1 << 0)
|
||||||
#define POWER_MODE_CTRL_MODE_SLEEP 2
|
#define POWER_MODE_CTRL_MODE_SLEEP (0x2 << 0)
|
||||||
|
|
||||||
#define PCI_MASTER_BASE 0x000050
|
#define PCI_MASTER_BASE 0x000050
|
||||||
#define PCI_MASTER_BASE_ADDRESS 7:0
|
#define PCI_MASTER_BASE_ADDRESS 7:0
|
||||||
|
|
Loading…
Reference in a new issue