drm/i915: lock down pch pll accouting some more
Before I start to make a complete mess out of this, crank up the paranoia level a bit. v2: Kill the has_pch_encoder check in put_shared_dpll - it's invalid as spotted by Ville since we currently only put the dpll when we already have the new pipe config. So a direct pch port -> cpu edp transition will hit this. v3: Now that I've lifted my blinders add the WARN_ON Ville requested. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1432,6 +1432,7 @@ static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
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assert_pch_pll_enabled(dev_priv, pll, NULL);
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return;
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}
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WARN_ON(pll->on);
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DRM_DEBUG_KMS("enabling PCH PLL %x\n", pll->pll_reg);
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@ -1470,6 +1471,7 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
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}
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assert_pch_pll_enabled(dev_priv, pll, NULL);
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WARN_ON(!pll->on);
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if (--pll->active)
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return;
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@ -3069,7 +3071,11 @@ static void intel_put_pch_pll(struct intel_crtc *intel_crtc)
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return;
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}
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--pll->refcount;
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if (--pll->refcount == 0) {
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WARN_ON(pll->on);
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WARN_ON(pll->active);
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}
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intel_crtc->pch_pll = NULL;
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}
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